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1 .1 Introduc tion
The a dvent a nd w ides prea d a vailab ility of relia ble and efficient sta nda rd
power modules has drastica lly cha nged the focus of the power system
designer. In the days of centralized custom power supplies, the designer
needed to understa nd the d etails o f converter operation, and w as often
instrumental in ma king c hoices suc h a s se lec tion of c onverter topology,
operating freq uency a nd c ompone nts. The need for this level of deta iled
knowledge about the internal workings of the converter is largely eliminated
when using standard modules from reliable suppliers, and the designer can
direct his time and energy to system related issues. Most of the converter
topology choices will be transparent to the end user - that is, the
spe cifica tions of the mod ule a nd its performa nce in the end s yste m will not
be affected.
There a re s ome choices , how ever, tha t w ill affect performance a nd the
sys tem d es igner sho uld be familia r with these co nsiderations. The 1999
introd uction o f sync hronous or a ctive rectifica tion in pow er modules ha sdras tica lly improved efficiency, one o f the mos t important sys tem
co nsiderations. Multi-phase or interlea ved to pologies ha ve a n effect on
dynamic response, system decoupling requirements and converter form
fac tor. The de signer should have enough know ledg e o f the trade -offs
associated with these types of design decisions to make an intelligent
selection of power modules.
In this treatment of the principles of power conversion we will give only a brief
summary of the various types of topologies and how they relate to eachother. More focus will be g iven to topologies tha t a re prese ntly use d in
various Artesyn produc ts, w ith the mos t empha sis reserved for disc uss ion of
topological choices that directly affect the specifications or system
performance of the pow er converter.
System designers need no longer be
experts in pow er conversion. The
emergence of high quality standard power
modules and distributed pow er
architectures mean than he can now
concentrate on the actual system design.
How ever, the designer still needs some
knowledge of this important and comp lex
component.
C hapter 1:
Princ iples of Power Conversion
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1.2 Basic Principles
In this section we will review why power conversion is
such a ubiquitous requirement in today's electronic
sys tems . We w ill define the difference b etw een up
conversion and down conversion and also distinguish
between the two circuit techniques used for power
conversion - linear and switchmode regulation.
The Need for Power Conversion
With the exception of the most simple battery powered
devices , a ll electronic eq uipment requires som e s ort of
power conversion. Electronic circuitry operates from DC
voltage sources while power delivery to the user's
system is in the form of AC power. Furthermore, the end
circuitry design is optimized to operate from specific
levels o f DC voltage s o tha t more than one va lue of DC
voltag e is need ed in most sy stems . The lates t ICs now
req uire DC voltag es a s low a s 1V, w hile s ome circuitry
ope rates at DC vo lta ge s up to 100V. The va rious DC
voltage levels sometimes must be sequenced orco ntrolled s o tha t they ca n be turned on a nd off in a
des ired w ay. For most eq uipment, ga lvanic iso lation of
the DC voltages from the po werline is need ed to meet
international safety s tand ards. Other stand ards d efine the
interface between the powerline and the power
co nverter(s). Thes e type s o f req uirements define the nee d
for AC/DC c onve rters.
More s ystems now utilize a distributed pow er
a rchitec ture (DPA) w hich provides a n intermed iate DC
voltage from which the final DC circuit voltages are
derived. Thes e DC /DC c onverters ma y or ma y not req uire
isolation, but retain the need for generating specific and
regulated DC voltage outputs. Sophisticated battery
powered equipment such as laptop computers also
Power Factor Correct ion
require conversion, regulation and control of the DC
ba ttery voltag e in order to meet the needs of the internal
circuitry.
To s umma rize, a lmos t a ll elec tronic eq uipment uses
pow er conversion in one form or ano ther. The pow er
converter performs several functions, and the relative
importance of these functions will sometimes determine
the top ology s elected for a sp ec ific c onverter. The
functions of a power converter include:
Isola t ion from the Pow erline
Me et P owerline S t a nd a rd s
Provide regulated DC Voltage(s)
P o w er S e q ue nc ing a n d C ontro l
Up vs. Down Conversion
One primary delineation between various topologies is
whether the output voltag e of the co nverter is a bove o rbelow the input supply voltage. If the output voltage is
low er than the input voltag e it is referred to a s 'dow n
conversion'. If the output voltage is higher than the input
voltage it is referred to as 'up conversion'. Up conversion
is sometimes referred to in the literature as 'boost' and
down conversion as 'buck'. Often the two terms can be
used interchangeably, but it should be noted that 'boost'
and 'buck' are also the names of much more specific
DC/DC co nverter topologies that will be d isc ussed later
in this chapter. For that reason, we will use 'up
co nversion' and 'dow n co nversion' when referring to the
voltage transformation through the converter in the more
general sense.
POWERAPPS
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Both of these techniques find widespread use in
electronic eq uipment, so me exa mples of w hich a re listed
below:
Co mmon a pplica tions o f up conversion
P owe r Fa c tor Corre c tion (P FC)
Generation of higher voltages in battery powered
equipment
Generation of backlight voltages for LCD displays
UP S sys tems
Common applications of down conversion
Mos t DC/DC powe r module s
Most AC/DC converters
IC Linea r re g ula tors
Linear vs. Switchmode Conversion
There a re tw o ba sic method ologies for ac co mplishing
pow er co nversion. The first is ca lled 'linea r regulation'
bec ause the regulation c harac teristic is ac hieved w ith
one or more semiconductor devices (bipolar transistors
or MOS FETs ) op era ting in their linear reg ion. The s ec ond
methodo logy is ca lled 'sw itchmod e' c onversion. In this
case, the voltage conversion is achieved by switching
one o r more s emicond uctor devices rapidly betwee n their
'on' or co nducting sta te a nd their 'off' or non-co nducting
sta te. We w ill disc uss the de ta ils later, but for now we
can summarize the comparison between the two by
stating that the linear regulator has the advantages of
simplicity, low output noise and excellent regulation
whereas the sw itchmod e co nverters offer the powerful
ad vanta ge of high efficiency.
The ma jority of this cha pter will foc us o n sw itchm od e
co nverter topologies since they a re now the prevalent
choice for most electronic equipment. However, the linear
regulator still has a place and it is important to
understand its performance and limitations, w hich we will
address here.
Historically, the first active voltage regulators were linear
regulators, first implemented with vac uum tubes and then
with power trans istors. One of their ad vanta ges is
simplicity. As shown in Figure 1.1, only a few
co mponents are needed for implementation, espec ially
w ith the integrate d c ircuits a vaila ble tod a y. The
schematic shows a discrete pass element, but this also
ca n be integrated into the co ntrol IC for low pow er
app lica tions. A nega tive feedba ck loop is us ed to
regulate the output voltag e a t the des ired va lue by mea ns
of se lecting the va lues o f the voltage divider R1 and R2.
The pa ss transistor (or FET) is driven by the op a mp to
ma intain Vout a t the d es ired va lue. Va ria tions of Vin will
ha ve a negligible effect o n Vout (goo d line regulation) a nd
the load regulation is also excellent, limited only by the
loop ga in of the op amp circuit. Ass uming a clean low-
noise input voltage, the output voltage will also be very
clean and quiet. Low frequency AC ripple on the input
will be significantly attenuated by the gain of the
regulating circuit, and the linear regulator has no inherent
internal noise sources.
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POWERAPPS
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Figure 1 - Linear Regulator Topology
The key to unde rsta nding the limitations o f the linea r
regulator is to note that the entire output current is
continuously conducted b y the pa ss element and that the
DC voltag e d rop a cross the pas s element will be Vin -
Vout. Consequently, the power loss in the pass element
will be given by Iout x (Vin - Vout), and if the input voltage
is significa ntly higher than the output voltag e this po we r
loss can be quite large and the efficiency of the regulator
very low. For example, for an output voltag e o f 5V a nd a n
input voltag e o f 48V, the pow er los s in the p as s element
w ill be (48V - 5V) x Iout or 43 x Iout. The loa d p ow er will
be 5V x Iout and the input power 48V x Iout.
Consequently, the efficiency will be P out/P in or
5xIout/48xIout or 10.4%. This wo uld b e a n unac cep tab le
efficiency for many a pplica tions.
The relationship betw een the input a nd output volta ge
a nd efficiency is show n in Figure 1.2 which a ss umes a n
output volta ge of 3V. As c a n be s ee n, 60 to 70% is the
highest expected efficiency when the need for a
minimum voltage across the pass device and circuit
operating tolerances are taken into account.
Corresponding s witchmode des igns ca n d eliver
efficienc ies of ove r 85%. The efficienc y cha rac teristic o f
the linear regulator imposes a strong disadvantage. If
there is a significa nt difference betw een the input and
output voltag es ac compa nied by a significa nt output
current, the large pow er los se s in the pas s e lement w ill
require the usage of large heatsinks which add to the size
and cos t of the des ign. S ince the ab solute power loss for
a given ra tio of Vout/Vin will be proportional to the output
current, this approach will usually only be practical for
low current de signs.
Figure 1.2 - Maximum Efficiency of 3V Linear Regulator
One obvious solution to the above problem is to set the
input voltage as low as possible for a given output
voltag e. This will inde ed dra st ica lly improve the efficienc y
of the linea r reg ulato r but at the expens e o f having to
provide the preset input voltage . At other than low pow er
levels, some type of conversion (or line-frequency
tra nsformer) wo uld b e required to d o this, which a dd s tothe complexity and cost of the overall system. Other
disadvantages of the linear regulator are that it can only
provide dow n conversion and that it has no inherent
galvanic isolation between the input and output voltages.
Bec ause of the limitations d esc ribed ab ove a nd the
a vaila bility o f sw itchmod e d esigns , the linea r reg ulato r is
Pass Element
VIN VOUT
VIN- VOUT
VREF
IOUT
R2
R1
+
-
Power Factor Correct ion
0
10
20
30
40
50
60
70
80
0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0
Input Voltage (Volts)
Efficiency(%)
RangeofMinimumInputVoltage
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now somewhat out of favor. It still has a place, however,
mos tly for low current a pplica tions where low c os t is
more important than efficiency. Figure 1.3 summarizes
the ad vantag es and disadva ntages of the linear regulator.
Figure 1.3 - Linear Regulator Characteristics
1.3 Switchmode Topologies
Before disc ussing spec ific sw itchmode topologies, w e
will look a t s ome b a sic principles of s witchmode
co nversion that ap ply to all of them. In general,
switchmode converters can be either isolated or non-
iso la ted. B y iso lation we imply ga lvanic iso lation so that
there is no DC path from the input of the converter to its
output. In this type of converter the input and output
grounds are isolated from each other, which allows for
additional flexibility in system grounding configurations.
The isolation a lso provides a sa fety ba rrier that iso late s
the secondary from primary voltages that are deemed to
be a safety hazard to personnel. Most electronic
eq uipment ope ra ting from the AC pow erline need s at
least one stage of isolated conversion to meet various
agency safety requirements. On the other hand, isolation
usually increases the complexity and cost of the
co nverter and is o ften not req uired in a spe cific s ystem
co nfigura tion. The topo log y exa mples in this c ha pter will
show the most common usage of each topology - some
iso late d a nd s ome no n-iso late d. Keep in mind tha t it is
often feas ible to use the sa me, or similar, topology w ith
or without isolation.
Another consideration that encompasses all topologies is
the op erating freq uenc y of the c onverter. This is one of
the most critical decisions that the converter designer
ma kes. Fortunate ly the end user of the co nverter
generally does not need to be concerned with it if the
converter designer has made a wise choice. However, it
is useful to b e a wa re of the mos t ba sic cons iderations,
which a re the e fficiency a nd s ize o f the co nverter.
Co nverters o perate by transferring energy from the input
to the output. For a g iven pow er level, the ene rgy
transferred per cycle is inversely proportional to the
operating freq uency. S ince this tra nsferred energy is
sto red in ca pa citors or inducto rs during po rtions of the
operating cycle and is transferred through a transformer
in ma ny ca se s, the size of these circuit elements will be
smaller when a higher operating frequency is selected.
So the highest possible operating frequency would
appear to be advantageous.
Unfortunately, high frequency operation comes at a cost
- impa cts on the efficienc y o f the c onverter. The FETs,
bipolar transistors and switching diodes used in power
converters have two types of losses - static conduction
losses and switching losses. As a first approximation, it
ca n be a ss umed that the static loss es w ill not be a ffected
by the s elec tion o f ope ra ting freq uency. The s witching
los ses , how ever, a re s trong ly influenced by the operating
freq uency. Eac h pow er semiconduc tor will exhibit an
energy los s w hen it is turned o n and a ga in when it is
turned off (or for polarity reversals in the case of diodes).
Adva nta g es Dis a dva nta g es
S imple Low Effic ienc y
Low C ost Need for Hea ts inks
Line/Loa d Reg ula tion La rg e S ize
Low Nois e No Is ola tion
Only Dow n Co nversion
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Figure 1.4 - Op erating Frequency Considerations
Topology Tree
While we will look at a few specific topologies in more
deta il, it is us eful to g et a n overview of how the mos t
co mmon topo log ies relate to ea ch o ther. Figure 1.5 is a
'topology tree' which defines some of these relationships.
It should be noted that w hile there are hundreds of
known topologies, only the mos t co mmon a re s hown.
Switchmode converters are sub-divided into resonant
variable frequency and pulse width modulated
topologies. Since pulse width modulated topologies are
in much w ider use, they rece ive the mos t a ttention. P ulse
width mod ulate d topologies a re further divided into d irect
a nd indirec t types . Direct converters transfer energy from
the input to the output during the 'on time' of the
converter switch(s). Indirect converters accomplish the
energy transfer during the 'off time' o f the pow er
sw itch(s). S ome o f the major bene fits o r area s o f
application are shown for each major topology along with
exa mples of Artes yn pow er produc ts tha t utilize s ome o f
the topologies.
POWERAPPS
6
Since the number of these energy losses per second will
be proportiona l to the op erating freq uency, the overall
tra nsition po we r los se s will increas e w ith ope rating
freq uency a nd a t s ome p oint the c onverter efficiency w ill
deg rade una cc epta bly. This effect is s omew hat offset by
using various res ona nt sw itching techniques to minimize
loss es, but eventually the pa ras itic loss es as soc iated
with less than idea l components and pac kaging
techniques will impose an upper limit on useful operating
frequency.
These des ign trad e-offs a re de picted in a g eneral wa y in
Figure 1.4. As c an b e s een, there is a n optimal ra nge o f
operating freq uency for ea ch d es ign. The lower operating
freq uency is mo st often limited by either the co nverter
becoming too large or by the desire to keep the
operating frequency above the audible frequency range.
For these rea so ns, 25kHz is the low es t operating
freq uenc y tha t is p rac tica l. The uppe r limit on ope rating
frequency is determined by efficiency, availability of
spec ialized co mponents and the ad vanced pa ckaging
a nd ma nufac turing te chniques req uired for high
freq uenc y op erat ion. This upper limit is now in the ra nge
of 3MHz. Most of today's converters operate somewhere
in the range of 100kHz to 2MHz.
Power Factor Correct ion
Overall Design Merit
Efficiency
Size
Optimal Freq uency Rang e
Operating Freq uencyEfficiency
Limit
3MHz
Audible Noise
and Size Limits25KHz
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Buck
The b uck topo log y s how n in Figure 1.6 is o ne o f the
most basic. It is a non-isolated down converter operatingin the direct m ode . Load current is c onduc ted d irec tly by
the s ingle sw itch e lement d uring the on-time a nd through
the output diode D1 during the off-time. Adva ntag es of
the buck are simplicity and low cost. Disadvantages
include a limited p ow er ra nge a nd a DC pa th from input
to output in the event of a shorted switch element, which
ca n ma ke se co nda ry circuit protec tion mo re difficult.
Useful P ower Level 1 to 50 Wa tts
S witch Volta ge S tress Vin
S witch P ower S tress P in
Tra ns former Utiliza tion N/A
Duty Cyc le
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Us eful P ow er Level 1 to 50 Wa tts
S w itch Volta g e S tress Vout
S w itch P ow er S tress P in
Tra ns former Utiliza tion N/A
Duty Cyc le
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The flyba ck topology is one of the mos t commo n and
cost-effective means of generating moderate levels of
iso la ted pow er in AC/DC co nverters. Add itional output
voltag es c an be g enerated eas ily by ad ding a dditional
sec onda ry w indings. There a re s ome d isa dvantag es
how ever. Reg ulation a nd o utput ripple a re not a s tightly
controlled as in some of the other topologies to be
disc ussed later and the s tress es o n the power switch a re
higher.
Useful pow er level 5 to 150 Wa tts
S witch volta ge s tress Vin + (Np/Ns) Vout
S witch pow er s tres s P in
Transformer u tiliza t ion Poor/specia lized design
Duty cyc le
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Resonant Reset Forward
The ba sic forwa rd to pology c an b e mod ified slightly, a s
show n in Figure 1.10, to a chieve res ona nt res et
operation. The a dd itiona l ca pa citance C r resona tes with
the ma gnetizing inducta nce of the trans former during the
off-time a nd rese ts the trans former co re. This increas es
the utilization of the transformer core and results in a
much more effective ma gnetic d es ign (no reset winding)
a long with a larger maximum duty cyc le (the ba sic
forward topology is limited to 50% duty). C r is the
combination of stray ca pac itance and a sma ll discrete
cera mic c a pa citor. The do wns ide is tha t the res ona nt
tra nsition d uring the off-time increa se s the voltage stress
on the switch element and output diodes.
Useful P ow er Level 10 to 40 Wa tts
S w itc h Volta ge Stres s C an b e >2 x Vin
S witch P ower S tress P in
Transformer Utilization Excellent/no taps required
Duty Cyc le
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Half Bridge
The ha lf bridg e to polog y, as de picted in Figure 1.13, is
used in many applications due to its wide useful power
range a nd goo d performa nce cha ra cteristics. The tapped
winding full-wa ve s ec onda ry c ircuit is identical to that
sho w n for the push-pull co nverter. The p rima ry, ho w ever,
is different. C a pa citors C 1 and C 2 form a voltag e d ivide r
that centers one end of the untapped primary winding at
Vin/2. Po we r switch de vices Q1 and Q2 a re a lternately
turned o n to c ond uct c urrent through the prima ry of T1.
The d uty cyc le c a n ap proac h unity, allow ing o nly for a
minimal 'dead time' when both power switches are off.
Because of the capacitive voltage divider, the non-
conducting FETse es only Vin as a voltag e stress - half
the stress of the push-pull circuit. Because two power
devices share the input current load and see reduced
voltage stresses, the half bridge is a very popular choice
for off-line c onverters up to s everal hundred w a tts.
Figure 1.13 - Half Bridge Converter
Us eful P ow er Level 50 to 400 Wa tts
S witch Volta ge Stress Vin
S w itch P ow er S tress P in/2
Transformer Utiliza t ion Good/sec . tap required
Duty Cyc le
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Full Bridge
The full bridg e to polog y, sho w n in Figure 1.14, is ve ry
simila r to the ha lf bridg e. The o nly d ifference is tha t the
capacitive voltage divider is replaced with two additional
pow er sw itch d evices . In this c onfiguration, Q1 a nd Q4
co nduct simulta neously to impose the entire input
voltag e a cros s the trans former prima ry. Then, a fter a
short dead time, Q3 and Q2 conduct to reverse the
polarity of the primary current. Since the primary power is
shared by two more devices than in the half bridge, with
no a dd itiona l voltage stress es , the full bridg e c onverter is
ca pa ble of much higher power levels. Most high pow er
(>600W) off-line converters use some form of the full
bridg e. The do wns ides to this to pology a re increas ed
complexity a nd c ost.
Figure 1.14 - Full Bridge Converter
Us eful P ow er Level 200 to 2,000 Wa tts
S witch Volta ge S tress Vin
S w itch P ow er S tress P in/4
Transformer Utiliza t ion Good/sec . tap required
Duty Cycle
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Figure 1.15 - Phase Sh ifted Full Bridge Converter
Us eful P ow er Le vel 1,000 to 5,000 Wa tts
S witch Volta ge S tres s Vin
S w itch P ow er S tress P in/4
Trans former Ut iliza tion Excellent/no taps required
Duty Cycle 48
All
24 /485 - 50
40 - 100
80 - 200
150 - 500
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Figure 1.17 - The Value of Synchronous Rect ification
The s ynchronous rectifica tion reduce s the pow er
dissipated in the c onverter by a pproxima tely 2 Wa tts,
w hich a llow s for the elimination of the hea ts ink. This, in
turn, reduces the height above the circuit board by half,
allowing for closer boa rd to boa rd s pac ing. P erhaps more
importantly, it a llow s for completely a utoma ted S MT
assembly, eliminating the need for manual assembly
processes with their attendant cost and quality issues. As
the output voltage level goes down, the importance of
efficiency becomes more and more important. Consider
that, o ver the next 3 yea rs, the ma jority of high-
performance elec tronics will be ope ra ting a t volta ge
levels be twee n 1.0 and 3.5 Volts a nd tha t voltag e levels
for demanding processor power applications are
projecte d to rea ch a s low a s 0.7 Volts w ithin the next 5
yea rs. These types of dema nds will drive the need for
sync hronous rectifica tion.
What is sync hronous rectifica tion? Ba sica lly, the outputrec tifier diode s a re replac ed w ith MOSFETs, w hich g ives
the be nefit of low er cond uction los se s. The first
ge nerations of DC/DC converters us ed silico n diodes for
output rectifica tion. These diodes had a forwa rd
co nduction voltag e d rop o f ab out 0.7V. These we re s oon
replac ed w ith schottky diodes tha t had a forwa rd d rop of
a round 0.5V. S ince the pow er los s is this voltag e d rop
multiplied by the co nducted output current, the po we r
los ses we re much improved . MOSFETs take this effect
one step further by offering even lower forward
co nduction los se s. The forwa rd d rop ca n be lowered
dra ma tica lly by s electing MOS FETs w ith low dra in to
so urce on resista nce a nd b y pa ralleling d evices for very
dem and ing ap plica tions. The s ilico n a rea is es se ntia lly
increas ed until the d es ired forwa rd voltag e d rop is
achieved.
They a re ca lled ' sy nchronous ' rec tifiers b ec a use , unlike
conventional diodes that are self-commutating, the
MOSFETs mus t be turned o n and off by mea ns o f a
signal to their gate and this signal must be synchronized
to the operation of the c onverter. P ow er IC
ma nufa cturers a re ma king this ta sk ea sier for the DC /DC
designer by the introduction of intelligent synchronous
rectification controllers, some of which even allow for
adjustable turn-on and turn-off delays to minimize
dea dtime a nd further increas e e fficiency.
The ma jor disa dva ntag e o f sync hronous rectifica tion is
the ad ditional complexity and cos t a ss ociated w ith the
MOSFETdevices and associated control electronics. At
low output voltag es , how ever, the res ulting increas e in
efficiency more than offsets the cost disadvantage in
ma ny a pplica tions. The co st pe nalty, which is no w less
than $5 per converter, should become even less as more
integrated control electronics become available and
volumes ramp up. Another disa dva ntag e only applies for
applications where two or more converters must be
pa ralleled for the purpos e o f increas ing the output pow er
ca pa bility. In ge neral, ORing d iod es must b e use d in
se ries with ea ch c onverter output to prevent interaction
betw een the MOSFETs in connecte d c onverters. If the
POWERAPPS
14
Power Factor Correct ion
Applica tion (3.0V @ 30W)
Rectification
Efficiency (%)
P ow er Diss . (W)
Cooling
Height (Inches )
Assembly
Schottky
84%
5.7W
Heatsink
1.0"
Manual HS Attac h
Synchronous
89%
3.7W
No Heats ink
0.5"
Automated SMT
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paralleling is done to provide redundancy, the ORing
diodes would b e required in any ca se, a nd the
sync hronous rectifica tion w ould no t present a ny
pa rticular disad vanta ge. P a ralleling of co nverters w ill be
discus se d in more deta il in a la ter cha pter.
Multi-phase Topology
Another very recent d evelopment is the a dvent o f the
multi-phase co nverter topology, which is a technique for
creating a power converter from a set of two or more
ide ntica l sm a ller conve rters. Thes e s ma ller co nverter'cells' are connected so that the output of the resultant
la rge r converter represents a summa tion of the outputs
of the cells. The cells a re opera ted a t a c ommon
frequency, but with the phase shifted between them so
that the co nversion sw itching occ urs a t regular interva ls.
The b a sic c onfiguration is s how n in Figure 1.18. For
purposes of this general discussion, the actual topology
internal to each converter cell is not important.
Figure 1.18 - M ulti-Phase Topo logy
This a pproa ch provides se vera l benefits to the end user,
the most noticeable of which is the effect on the output
ripple waveform. Figure 1.19 compares the ripple of a
multi-phase co nverter for n=2 w ith the ripple o f ea ch of
the ce lls. Note tha t the p-p ripple is reduc ed by a fac tor
of 2 w hile the e ffective freq uenc y is do ubled. This w ill
mean that significantly less decoupling capacitance is
required in the s ys tem. The use of the multi-phas e
topology has essentially doubled the effective frequency
while not enco untering a ny of the c ompone nt, efficiency
a nd pa ckag ing limitations of raising the frequenc y of a
single c onverter. The improvem ent in freque ncy a nd p-p
ripple will be even more dramatic for larger values of n -
the ripple frequency will be n x f, where f is the operating
freq uency of ea ch c onverter.
Figure 1.19 - Effect of Multi-Phase Topo logy on
Outpu t Ripple (n=2)
There are also pa ckag ing-related a dva ntag es to using a
multi-phase approach. Since each cell operates at a low
pow er level, the c omponent s izes a re much s ma ller than
would be needed to fabricate a single converter with the
sa me tota l output pow er. With the c omponent he ight
reduced, a lower profile converter can be made which
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Vout1
OutputRippleVolta
ge
Time
Vout2
Vout
Converter #1
Converter #2
oooo
Converter #n
Vout1
Vou t
Vin
Vout2
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will reduce the required board-to-board pitch. Also, since
each cell is small and light, they can be mounted to the
system's circuit boa rd using a utomated S MTtechniques ,
reducing assembly cost. Even a high power converter
ca n be automatically a ss embled to the circuit boa rd b y
this means. Since the power dissipated in the converter
cells is spread out uniformly over the c ircuit boa rd a rea ,
thermal hot s pots a re reduced relative to a single higher
pow er converter, lead ing to s yste m c ooling efficiencies
suc h a s the removal of heats inks a nd/or reduc ed air flow
velocities.
The disa dva ntag es of this a pproa ch revolve around
relia bility a nd c os t. S ince the tota l number of
co mponents in the s ummation of co nverter cells is
a pproximate ly n times the numbe r of compo nents in a
single higher power converter, high quality components
and manufacturing tec hniques must be used to a chieve
the desired overall reliability. Fortunately, the component
and assembly quality levels available today allow this to
be ac hieved for many a pplica tions. The increas ed
component count can also have a n adverse impac t on
total hardw are cos t, although the sa vings in pac kaging,
cooling and reduced decoupling requirements often
offset this c os t. To-da te, the mo st c ommon a pplica tion
for the multi-pha se ap proa ch is in voltage regulator
mod ules for high pe rformance proce ss or chips.
1.5 AC/DC Topology Selection
As w a s the c a se for DC/DC c onverters, the to pologies
a ctua lly in produc tion for AC /DC co nverters is a s ma ll
sub -set o f the tota l number a vaila ble. S ince AC/DC
co nverters op erate from wha t is es se ntia lly the rec tified
AC pow erline voltag e, the to pologies tha t a re op timized
for high voltag e input w ill tend t o b e p referred . This is
true for both single phase and three phase AC inputs and
for all international powerline voltages. Most equipment
a lso req uires ga lvanic iso lation of the s eco nda ry circuit
voltag es from the po we rline, w hich results in the usa ge of
iso late d top ologies. The mos t co mmon exc eption is low
power se aled eq uipment with no user ac ces s, for which
non-isolated topologies a re s ometimes ac cepta ble.
Thes e c onverters w ill not b e c overed here. The othe r
most common exception is high voltage output non-
iso late d front-end po we r supplies that a re s ometimes
used in high power Datacom applications as the front
end for iso lated DC /DC c onverters. Thes e co nverters
normally use a boost topology, which will be discussed
la ter. Figure 1.20 show s the mos t co mmonly used
topologies a s a function of powe r level.
Figure 1.20 - Most Commonly Used AC/DC Topologies
POWERAPPS
16
Power Factor Correct ion
P ow er Ra ng e (W) Is ola tio n C ommo n To po lo gies C ommo n Applic atio ns
1 - 100
80 - 250
200 - 500
500 - 1000
50 - 2000
Yes
Yes
Yes
Yes
No
Flyback /Forward
Flyback /Forward /Half Bridge
Half Bridge /Full Bridge
Full B ridge
Boos t
Dataco m, Telecom, PC s
Dataco m, Telecom, PC s
Data com , Telecom
Data com , Telecom
PFC , HV Front-Ends
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