6/22/2015Why Blackfin assembly code functions have the format they do Copyright M. Smith, ECE, University of Calgary, Canada 1 / 30 Understanding the Blackfin.

04/18/23 Why Blackfin assembly code functions have the format they do Copyright M. Smith, ECE, University of Calgary, Canada

1 / 30

Understanding the Blackfin ADSP-BF5XX

Assembly Code Format

The “WHYs” in Designing the Assembly Language Function

ushort FixedTimeASM (ushort)


2 / 29

Tackled today

Writing a simple stub for the function UseFixedTime( ) (time wasting) in assembly code as needed for Lab. 1.

What does writing this assembly code stub tell us about the Blackfin microcontroller?


3 / 29

Stub for ushort FixedTimeASM (ushort)

#include <defBF533.h>#include <macros.h>.section program;.global _FixedTimeASM;.align 2;

#define FixedTimeASMSTACK 16 _FixedTimeASM:

// unsigned short int FixedTime (unsigned short int timeToUse) { LINK FixedTimeSTACK;

// Code goes here and replaces next line R0 = 0; // return 0;

P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:


4 / 29

Stub for ushort FixedTimeASM (ushort)

#include <defBF533.h>#include <macros.h>.section program;.global _FixedTimeASM;.align 2;

#define FixedTimeASMSTACK 16

_FixedTimeASM: // unsigned short int FixedTime (unsigned short int timeToUse) { LINK FixedTimeSTACK;


P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:

NOTES ON LABELS


5 / 29

General Blackfinassembly language format

LABEL: INSTRUCTION; // COMMENT

EXAMPLESSet 32 bit data register R0 to 16

R0 = 16; // 32 bit operation

Set 16 bit data register (lower part of register R7) to 24R7.L = 24; // 16 bit operation

Set up 16 byte stack at the start of routine Foo( )_Foo: LINK 16; // Stack set up

// Note RETS and FP registers are also saved to stack // Total change in stack size = 16 + 8 bytes

Similar to operation of LINK and UNLINK instructions on many processors


6 / 29

Architectural information gathered

Data Registers8 32-bit registers labelled R0 to R7

Can be used as 16 16-bit registers labelled R0.L to R7.H


7 / 29

Memory Organization of the Blackfin The (Blackfin) processor supports a hierarchical memory model

with different performance and size parameters, depending on the memory location within the hierarchy.

Level 1 (L1) memories are located on the chip and are faster than the Level 2 (L2) memory systems.

The Level 2 (L2) memories are off-chip and have longer access latencies.

The faster L1 memories, which are typically small scratchpad memory or cache memories, are found within the (processor) core itself.

Therefore when running our code, we want to cause the LINKER to place our program into the fastest memory (if possible). We want this to happen automatically

The fastest memory is


8 / 29

Memory Map

Certain things must go in certain memory locations for the processor to work best


9 / 29

Fine detail of program placement is important The processor core reads the instruction memory through the 64-

bit wide instruction fetch bus. Compare this to 16-bit wide on 68K and 32-bit wide on MIPS

All addresses from this bus are 64-bit aligned. You can place an instruction at location 0xFFA0C000 but NOT at

memory location 0xFFA0C000 + 1 Each instruction fetch can return any combination of 16-, 32- or

64-bit instructions (for example, four 16-bit instructions, two 16-bit instructions and one 32-bit instruction, or one 64-bit instruction). Instructions have a minimum size of 16-bit (2 bytes). Exactly the same as 68K CISC. Minimum / Maximum size on MIPS – 32 bits


10 / 29

Program Efficiency and Placement of Function in Memory

#include <defBF533.h>#include <macros.h>

.section program;

.global _FixedTimeASM;

.align 2;#define FixedTimeASMSTACK 16 _FixedTimeASM:



P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:

Notes on

.section program

.align 2


11 / 29

Then why? The processor core reads the instruction memory

through the 64-bit wide instruction fetch bus. All addresses from this bus are 64-bit aligned. This should mean .align 8 not .align 2

Obviously something else is happening inside the processor, or by the linker, that makes .align 2 sufficient. Detail not needed in Lab. 1

Reminder ASSEMBLER takes “your words” (.asm file) and converts

them into an object file (.doj file) LINKER takes several object files (.doj), plus start-up files

plus the processor memory map (.ldf file) and converts them into an executable file (.dxe file)


12 / 29

Writing in Assembly Code

RULE #1 -- Don’t write in assembly code

It takes as much effort to design, code, test, debug and maintain one line in “C” or “C++” as it does in assembly code.

If possible -- only write in assembly code When “talking” to the hardware (setting device registers) When the “C++” code does not work fast enough for your

application


13 / 29

C++ and assembly code

Reminder COMPILER takes “your words” (.cpp or .c file) and

converts then into an assembly code file (.asm file) ASSEMBLER takes “your words” (.asm file) and

converts them into an object file (.doj file) LINKER takes several object files (.doj), plus start-

up files plus the processor memory map (.ldf file) and converts them into an executable file (.dxe file)

The processor takes the “machine code” instructions (bit patterns) and performs operations (data transfers, data manipulation) based on those instructions


14 / 29

Requirements Assembly code functions must be “callable” from higher level “C+

+” functions Assembly code functions must be able to return to the correct

functions in the “C++” programs Assembly code functions must be able to pass back calculate

parameters to “C++” functions, just as “C++” functions pass back parameters (return values) to each other.

Assembly code functions must be able to use parameters past to them by “C++” functions

KEY ISSUE – THE RUNNING OF ASSEMBLY CODE FUNCTIONS MUST NOT AFFECT THE RUNNING OF OTHER ASSEMBLY CODE FUNCTIONS OR C++ (or C) FUNCTIONS


15 / 29

Linkage to other functions, including C++ and C

#include <defBF533.h>

#include <macros.h>

.section program;

.global _FixedTimeASM;

.align 2;

#define FixedTimeASMSTACK 16 _FixedTimeASM:

// unsigned short int FixedTime (unsigned short int timeToUse) {

LINK FixedTimeSTACK;


P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:


16 / 29

Requirements Assembly code functions must be “callable” from higher level “C+

+” functions

.global _FixedTimeASM;_FixedTimeASM:

Notes .global _FixedTimeASM;

The underscore in the front of the function name _FixedTimeASM indicates that


17 / 29

Sequence related registers


18 / 29

Assembly code functions must be able to return to the correct function in the “C++” programs

#define FixedTimeASMSTACK 16

LINK FixedTimeSTACK; Function code here that possible changes the return address RETS

P0 = [FP + 4 ];

UNLINK;

JUMP (P0);

Requirements

NOTES

MEANS

IMPLIES

IMPLIES

IMPLIES


19 / 29

Why not the following code?

Instead of

LINK FixedTimeSTACK; Function code here that possibly

destroys RETS (return address)

P0 = [FP + 4 ];

UNLINK;

JUMP (P0);

Use

LINK FixedTimeSTACK; Function code here that possibly

destroys RETS (return address)

UNLINK;RESTORES RETS

RTS


20 / 29

Requirements KEY ISSUE – THE RUNNING OF ASSEMBLY CODE FUNCTIONS

MUST NOT AFFECT THE RUNNING OF OTHER ASSEMBLY CODE FUNCTIONS OR C++ (or C) FUNCTIONS

When an assembly code routine is running, then CONVENTION demands that Data registers R3 through R7 are unchanged by the assembly code

routine Pointer registers P2 through P5 are unchanged by the assembly

code routine Sequence related registers FP (frame pointer) and SP (stack

pointer) are unchanged by the assembly code routine

UNCHANGED means NOT USED in the function or SAVED (to the stack) and then RECOVERED (from the stack) during function execution.


21 / 29

CONSEQUENCESSafety first coding expected KEY ISSUE – THE RUNNING OF ASSEMBLY CODE

FUNCTIONS MUST NOT AFFECT THE RUNNING OF OTHER ASSEMBLY CODE FUNCTIONS OR C++ (or C) FUNCTIONS

If an assembly code routine calls a C++ function (or another assembly code ) Data registers R0, R1, R2 MAY be changed by that other

routine Pointer registers P0, P1 MAY be changed by that other routine

KEY THING TO AVOID IN THE LABORATORY Don’t place anything useful in registers R0, R1, R2 (such as

counter values) and then call a function – those values may be destroyed

Don’t place anything useful in registers P0, P1 (such as pointers to the start of an array and then call a function


22 / 29

Requirements Assembly code functions must be able to pass back calculate

parameters to “C++” functions, just as “C++” functions pass back parameters (return values) to each other.

This is handled “by convention” by placing the RETURN VALUE in data register R0.

_FixedTimeASM: // unsigned short int FixedTime (unsigned short int timeToUse) { LINK FixedTimeSTACK;

R0 = 6; // return 6;

P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:


23 / 29

Requirements_FixedTimeASM:


R0 = 6; // return 6;

P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:

NOTE that data register R0 and Pointer register P0 are altered (destroyed) during the function call

Note that sequence register FP is saved to the stack, with the SP being altered during LINK instruction

Note that sequence registers FP and SP are restored to their original values during the UNLINK instruction


24 / 29

Requirements -- Convention Assembly code functions must be able to use parameters past to

them by “C++” functions

In C++ call ushort UseFixedTime(ushort value); the parameter ushort value is passed in 32-bit register R0

In C++ call ushort Foo1(ushort value, short feePaid); the parameter ushort value is passed in 32-bit register R0

the parameter short feePaid is passed in register R1

For 3 parameters passed use R0, R1 and R2For 5 parameters passed use R0, R1 and R2 and pass the other

parameters on the stack


25 / 29

Reminder

long int – 32-bit values -- come in signed and unsigned versions

short int – 16-bit values -- come in signed and unsigned versions

ushort is a “C++/C” compatible short hand way of writing unsigned short int When possible I personally prefer NOT to use ushort but

write unsigned short int When possible I personally prefer NOT to use int but rather

specifically write short int or long int because of my experience with different processors where sometimes int means 16-bits and sometimes int means 32-bits


26 / 29

Requirement for Lab. 1 -- 1 The function

ushort UseFixedTime(ushort useTime) must return the parameter useTime passed to it

Does the following code work as a prototype?_FixedTimeASM:


R0 = 6; // return 6;

P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:


27 / 29

Requirement for Lab. 1 -- 2

The function ushort UseFixedTime(ushort useTime) must return the parameter useTime passed to it

Describe two examples where this code will not work_FixedTimeASM:


Other code goes here;

P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:


28 / 29

Requirement for Lab. 1 -- 3 The function

ushort UseFixedTime(ushort useTime) must return the parameter useTime passed to it

Why will this code will work sometimes and not others_FixedTimeASM:


R4 = R0; // Save R0 Other code goes here. This code DOESNOT use / change R4

R0 = R4; // Recover R0

P0 = [FP + 4 ]; UNLINK; JUMP (P0); // }

_FixedTimeASM.end:


29 / 29

Recap

Learnt the format for a line placed in an Blackfin assembly code .asm file

Learnt about the 8 data registers R0 to R7 and the 6 pointer register P0 to P5

Recognize that better to write in “C++” than in assembly code where possible

Seen some simple examples of how to (and how not to) interface “C++” functions with assembly code functions.


30 / 29

Information taken from Analog Devices On-line Manuals with permission http://www.analog.com/processors/resources/technicalLibrary/manuals/

Information furnished by Analog Devices is believed to be accurate and reliable. However, Analog Devices assumes no responsibility for its use or for any infringement of any patent other rights of any third party which may result from its use. No license is granted by implication or otherwise under any patent or patent right of Analog Devices. Copyright Analog Devices, Inc. All rights reserved.

6/22/2015Why Blackfin assembly code functions have the format they do Copyright M. Smith, ECE, University of Calgary, Canada 1 / 30 Understanding the Blackfin.

Documents

assembly code stub

blackfin processor

university of calgary

blackfin microcontroller

link fixedtimestack

data register r0

labels slide

h slide