Schematic Diagrams
B - 1
Schematic Diagram
s
Appendix B:Schematic DiagramsThis appendix has circuit diagrams of the systems PCBs. The following table indicates where to find the appropriate
schematic diagram.
Diagram - Page Diagram - Page
System Block Diagram - Page B - 2 Mini PCI; MDC Modem - Page B - 17
CPU (Northwood) 1 of 2 - Page B - 3 LAN RTL8139CL - Page B - 18
CPU (Northwood) 2 of 2 - Page B - 4 TI1394 TSB43AB22 - Page B - 19
MCH845 Power & Ground - Page B - 5 NS-PC87393; IR; ROM - Page B - 20
MCH845 Memory Interface - Page B - 6 H8 - Page B - 21
Clock Generator - Page B - 7 KBC Conn; Fan Conn - Page B - 22
DDRAM - Page B - 8 ACIN; PWR Button - Page B - 23
DDR Termination - Page B - 9 AC'97 AD1886 - Page B - 24
Mobility P7 - Page B - 10 PCI 1410 - Page B - 25
Mobility Mem A; Term; LVDS - Page B - 11 PCMCIA Socket - Page B - 26
Mobility Mem B; CRT; TV Out - Page B - 12 CPU Core Power - Page B - 27
ICH3 (1 of 3) - Page B - 13 D/D Conn - Page B - 28
ICH3 (2 of 3) - Page B - 14 +3V; +5V - Page B - 29
ICH3 (3 of 3) - Page B - 15 USB 2.0 - Page B - 30
HDD/CDROM/FDD - Page B - 16
Table 1
Schematic Diagrams
Schematic Diagrams
B - 2
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System Block Diagram
Sheet 1 of 29System Block
Diagram
AGP
SHEET
SHEET
F.D.D/CD-RW
13,14
DVD/CD-ROM
5,6
INTEL ICH3
421 EBGA
Sec. IDE
AC'97 LINK
INTEL MCH
Brookdale
593 FCBGA
PCI BUS
Pri. IDE
HUB LINK
Pentium 4Socket-478Host CPU
LPC BUS
SHEET
SM BUS
SUPER I/ONS87393
H.D.D.TI-43AB22
PCMCIA SOCKET*1
RJ-45
4-Pin
LANRTL8139
BERGWirelessLan
MICIN
SPKOUT
AC'97CODEC AUDIO
AMP.
SPDIFOUT
FIR
KB CTRL.H8
PIO
CLOCKGEN.
LCD CONN(LVDS)
DDR-SDRAM4M*32/4M*64
DDR SDRAM SOCKET
MiniPCI SOCKET
MEMORYTERMINATIONS
SO-DIMM0 SO-DIMM1
CRT OUT
VGACHIP ATIM7-P/M9
TV OUT
LVDS
SYSTEMBIOS
CPUFAN
RJ-11
BATTERY
MDC CONN.
TERMINATIONS
SM BUS
TEMPSENSOR
(50 Pin)(60 Pin)
(TI-TPA0132)(ALC201)
MDCMODULE
USB*2USB
3,4
SHEET 7
SHEET 8 SHEET 8
SHEET 9
SHEET10
SHEET 11;12
SHEET12
SHEET11
SHEET12
SHEET30
USB
SHEET 16
SHEET 17
SHEET 18SHEET 19
CARDBUSTI-1410
SHEET 20
SHEET 20
SHEET 20
SHEET 21
SHEET 22
KBC CONN
TOUCHPADCONN
SHEET 24
SHEET 25
SHEET 26
SHEET 17
SHEET 27
CPUCOREPOEWR
ACIN;POWERBUTTON
SHEET 23
SHEET 16
SHEET 20
SHEET 21
SHEET 22
SHEET 21PS2 CONNISA
VT6202
SHEET 30
USB 2.0
Schematic Diagrams
CPU (Northwood) 1 of 2 (71-56P00-D05) B - 3
Schematic Diagram
s
CPU (Northwood) 1 of 2
Sheet 2 of 29CPU 1 of 2
V_CORE
V_CORE
V_CORE
V_CORE
+3VS
+3VH8
+3VS
V_CORE
V_CORE
+3VS
+3VS+3VS
V_CORE
V_CORE
SMBCLK_A [21,28]SMBDATA_A [21,28]THRMP[4]
THRMN[4]
CPU_TDO [4]
CPU_TCK [4]CPU_TCK[4]
GTL_CPURST#[4,5]CPU_TMS [4]CPU_TRST# [4]CPU_TDI [4]
ITPCLK[4,7]ITPCLK#[4,7]
MASTER_RESET# [4]
CPU_ALERT# [14]
VCC_SENSE [27]VSS_SENSE [27]
CPUPERF# [14]DPSLP# [13,27]
Z0323
Z0322
Z0318Z0317
Z0340
SMBCLK_A
SMBDATA_A
Z0324
THRMN
THRMP
Z0320Z0319
Z0321
Z0312Z0311
Z0306
Z0309
Z0314
Z0313
Z0310
H_BPM5_PREQ#
Z0307
Z0315
H_BPM4_PRDY#
Z0316
Z0308
H_BPM1_ITP#H_BPM0_ITP#
H_BPM4_PRDY#
Z0325
H_BPM5_PREQ#
H_BPM1_ITP#H_BPM0_ITP# TZ0301
TZ0302
TZ0303
Z0338
Z0304Z0339
Z0337Z0336Z0335Z0334Z0333Z0332Z0331Z0330Z0329
Z0305
T5
R39075
R399
39
C187
1u_X7R
C188
1u_X7R
R624
C165
1u_X7R
R616 *0
R61510K
C185
1u_X7R
R250 1K
U22
MAX1617/AD1021/MAX1619
15
15
913
2
16
123
14
411
10
6
78
N/C1N/C2
STBY#
N/C3N/C4
VCC
N/C5
SMBDATADXP
SMBCLK
DXNALERT#
ADD0
ADD1
GND1GND2
C637
1u_X7R
C7582200PF
R59910K
R596 1K
C177
1u_X7R
C154
1u_X7R
C155
1u_X7R
C151
1u_X7R
C166
1u_X7R
C164
1u_X7R
R249 *10K
R625 *0
R59710K
R617
*4.7K
R623*4.7K
C7600.1UF
R59810K
+CT2
10u/10V
+CT1
10u/10V
R391
1.5K 1%R393*240
R39751_1%
R398150
R39551_1%
+CT8
10u/10V
+CT7
10u/10V
T7T8
R39227.4 1%
R40151_1%
T6
R40351_1%
R450 01 2
+C647
10uF_1210
+C136
10uF_1210
+C138
10uF_1210
R459 0
+C137
10uF_1210
+C620
10uF_1210
R522 1K
+CT6
10u/10V
+CT5
10u/10V
+CT4
10u/10V
R39651_1%
R40051_1%
R40451_1%
+CT3
10u/10V
R39451_1%
C152
1u_X7R
C630
1u_X7R
NORTHWOOD POWER & GROUND
U12A
NORTHWOOD
A3A9
A11A13A15A17A19A21A24A26
B4B8
B10B12B14B16B18B20B23B26C2C5C7C9
C11C13C15C17C19C22C25
D3D6D8
D10D12D14D16D18D20D21D24
E1E4E7E9
E11E13E15E17E19E23E26
A5
A4
AD24AA2AC21AC20AC24AC23AA20AB22U6W4Y3A6AD25
A
C
2
A
C
5
A
C
7
A
C
9
A
C
1
1
A
C
1
3
A
C
1
5
A
C
1
7
A
C
1
9
A
C
2
2
A
C
2
5
AD1AD4AD8AD10AD12AD14AD16AD18AD21AD23AE7AE9AE11AE13AE15AE17AE19AE22AE24AE26AF1AF6AF8AF10AF12AF14AF16AF18AF20
AF26
A
1
0
A
1
2
A
1
4
A
1
6
A
1
8
A
2
0
A
8
A
A
1
0
A
A
1
2
A
A
1
4
A
A
1
6
A
A
1
8
A
A
8
A
B
1
1
A
B
1
3
A
B
1
5
A
B
1
7
A
B
1
9
A
B
7
A
B
9
A
C
1
0
A
C
1
2
A
C
1
4
A
C
1
6
A
C
1
8
A
C
8
A
D
1
1
A
D
1
3
A
D
1
5
A
D
1
7
A
D
1
9
A
D
7
A
D
9
A
E
1
0
A
E
1
2
A
E
1
4
A
E
1
6
A
E
1
8
A
E
2
0
A
E
6
A
E
8
A
F
1
1
A
F
1
3
A
F
1
5
A
F
1
7
A
F
1
9
A
F
2
A
F
2
1
A
F
5
A
F
7
A
F
9
B
1
1
B
1
3
B
1
5
B
1
7
B
1
9
B
7
B
9
C
1
0
C
1
2
C
1
4
C
1
6
C
1
8
C
2
0
C
8
D
1
1
D
1
3
D
1
5
D
1
7
D
1
9
D
7
D
9
E
1
0
E
1
2
E
1
4
E
1
6
E
1
8
E
2
0
E
8
F
1
1
F
1
3
F
1
5
F
1
7
F
1
9
F
9
A
B
4
A
A
5
Y
6
A
C
4
A
B
5
A
C
6
F2F5F8
F10F12F14F16F18F22F25
G
3
G
6
G
2
1
G
2
4
H
1
H
4
H
2
3
H
2
6
J
2
J
5
J
2
2
J
2
5
K
3
K
6
K
2
1
K
2
4
L
1
L
4
L
2
3
L
2
6
M
2
M
5
M
2
2
M
2
5
N
3
N
6
N
2
1
N
2
4
P
2
P
5
P
2
2
P
2
5
R
1
R
4
R
2
3
R
2
6
T
3
T
6
T
2
1
T
2
4
U
2
U
5
U
2
2
U
2
5
V
1
V
4
V
2
3
V
2
6
W
3
W
6
W
2
1
W
2
4
Y
2
Y
5
Y
2
2
Y
2
5
A
A
1
A
A
4
A
A
7
A
A
9
A
A
1
1
A
A
1
3
A
A
1
5
A
A
1
7
A
A
1
9
A
A
2
3
A
A
2
6
A
B
3
A
B
6
A
B
8
A
B
1
0
A
B
1
2
A
B
1
4
A
B
1
6
A
B
1
8
A
B
2
0
A
B
2
1
A
B
2
4
AF25
A7
AD2
AF24AF3
AD3
A22
AE21
VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS
VCC_SENSE
VSS_SENSE
TESTHI0TESTHI1TESTHI2TESTHI3TESTHI4TESTHI5TESTHI6TESTHI7TESTHI8TESTHI9
TESTHI10TESTHI11TESTHI12
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS
SKTOCC#
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
V
C
C
B
P
M
5
#
B
P
M
4
#
B
P
M
3
#
B
P
M
2
#
B
P
M
1
#
B
P
M
0
#
VSSVSSVSSVSSVSSVSSVSSVSSVSSVSS
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
V
S
S
RESERVED
RESERVED
RESERVED
RESERVEDRESERVED
RESERVED
RESERVED
RESERVED
C167
1u_X7R
C184
1u_X7R
C636
1u_X7R
R177 10K
C174
1u_X7R
C153
1u_X7R
C175
1u_X7R
T2T3
T9
T4
T1
C186
1u_X7R
C176
1u_X7R
C629
1u_X7R
R402
10K
C168
1u_X7R
C173
1u_X7R
R529 0
R546 10KR536 10K
J1
CON26A
135791113151719212325
2468
101214161820222426
R537 10KR148 10KR132 10KR147 10KR166 10KR122 10KR159 10KR535 10K
R448 1K
R460 0
V_CORE [4,5,14,15,27]
Put the cap in the processorback side
Put the cap in the processorcavity
NOTE: Place these decouplingcapacitors close to VTT_CPUtermination resistors. (onedecoupling coapcitor foreach two R-packs)
Address is strapped to 1001 000
IN-Target Probe
Schematic Diagrams
B - 4 CPU (Northwood) 2 of 2 (71-56P00-D05)
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CPU (Northwood) 2 of 2
V_CORE
V_CORE
V_CORE
CPU_1.25V
V_CORE
+3VS
CPU_1.25V
V_CORE
+3V
CPU_1.25VCPU_1.25
GTL_ADS# [5]GTL_BNR# [5]
CPU_INIT# [13]SLP# [13]CPU_SMI# [13]
VID1 [22]VID2 [22]VID3 [22]
VID0 [22]
CPU_TCK [3]
CPU_TDI [3]
CPU_TRST# [3]CPU_TMS [3]CPU_TDO [3]
GTL_HA#[3..31] [5]
GTL_HD#[0..63][5]
CPU_A20M# [13]
CPU_INTR [13]CPU_NMI [13]CPU_IGNNE# [13]CPU_STPCLK# [13]
GTL_RS#[0..2] [5]
GTL_HIT# [5]
GTL_DBSY# [5]GTL_DRDY# [5]
GTL_HLOCK# [5]
GTL_HITM# [5]
GTL_HREQ#[0..4][5]
GTL_DEFER# [5]GTL_HTRDY# [5]
GTL_CPURST# [3,5]
VID4 [22]
SEL0[7]
GTL_BPRI# [5]GTL_BREQ0# [5]
CPUCLK [7]CPUCLK# [7]ITPCLK [3,7]ITPCLK# [3,7]
ITPCLK [3,7] ITPCLK# [3,7]
HDB#0[5]HDB#1[5]HDB#2[5]HDB#3[5]
HDSTBP#0[5]HDSTBP#1[5]HDSTBP#2[5]HDSTBP#3[5]HDSTBN#0[5]HDSTBN#1[5]HDSTBN#2[5]HDSTBN#3[5]
HADSTB#0[5]HADSTB#1[5]
FERR# [13]
THRMP[3]THRMN[3]
MASTER_RESET#[3]
PWRGD_CPU [14]
CPUCLK [7]CPUCLK# [7]
ICH3PWROK[12,14] VIDVCC_GD [7,14,27]
SUSB#[10,13,14,18,20,21,22,23,27,28]
DBR#
Z0401
Z0403Z0402
DBR#
Z
0
4
2
7
Z
0
4
2
1
Z
0
4
2
5
Z
0
4
2
6
Z
0
4
2
4
Z
0
4
2
2
Z
0
4
2
3
Z
0
4
2
8
Z0411Z0412Z0413
Z0410
Z0407Z0408
VID4
Z0405
Z0404
Z0406
THERMTRIP#
THERMTRIP#
Z0414
Z0415
Z0416
ITPCLK#
CPUCLK
ITPCLK
CPU_INIT#
GTL_BNR#
CPU_SMI#
FERR#CPU_IERR#
SLP#
GTL_ADS#
VID2VID3
VID0VID1
THRMPTHRMN
G
T
L
_
H
A
#
6
G
T
L
_
H
A
#
1
7
G
T
L
_
H
A
#
4
G
T
L
_
H
A
#
2
3
G
T
L
_
H
A
#
1
8
G
T
L
_
H
A
#
1
0
G
T
L
_
H
A
#
1
4
G
T
L
_
H
A
#
9
G
T
L
_
H
A
#
2
0
G
T
L
_
H
A
#
1
3
G
T
L
_
H
A
#
2
6
G
T
L
_
H
A
#
1
1
G
T
L
_
H
A
#
2
5
G
T
L
_
H
A
#
7
G
T
L
_
H
A
#
3
1
G
T
L
_
H
A
#
3
G
T
L
_
H
A
#
1
6
G
T
L
_
H
A
#
5
G
T
L
_
H
A
#
2
9
G
T
L
_
H
A
#
1
2
G
T
L
_
H
A
#
2
8
G
T
L
_
H
A
#
2
4
G
T
L
_
H
A
#
1
5
G
T
L
_
H
A
#
2
7
G
T
L
_
H
A
#
8
G
T
L
_
H
A
#
2
2
G
T
L
_
H
A
#
1
9
G
T
L
_
H
A
#
2
1
G
T
L
_
H
A
#
3
0
GTL_HA[3..31]
G
T
L
_
H
D
#
3
3
G
T
L
_
H
D
#
5
8
G
T
L
_
H
D
#
3
4
G
T
L
_
H
D
#
9
G
T
L
_
H
D
#
8
G
T
L
_
H
D
#
5
2
G
T
L
_
H
D
#
2
4
G
T
L
_
H
D
#
4
2
G
T
L
_
H
D
#
3
5
G
T
L
_
H
D
#
0
G
T
L
_
H
D
#
6
2
G
T
L
_
H
D
#
6
3
G
T
L
_
H
D
#
1
5
G
T
L
_
H
D
#
4
8
G
T
L
_
H
D
#
2
1
G
T
L
_
H
D
#
4
4
G
T
L
_
H
D
#
2
6
G
T
L
_
H
D
#
4
7
G
T
L
_
H
D
#
6
1
G
T
L
_
H
D
#
1
9
G
T
L
_
H
D
#
1
1
G
T
L
_
H
D
#
2
0
G
T
L
_
H
D
#
3
0
G
T
L
_
H
D
#
2
G
T
L
_
H
D
#
3
G
T
L
_
H
D
#
3
8
G
T
L
_
H
D
#
5
1
G
T
L
_
H
D
#
5
6
G
T
L
_
H
D
#
1
8
G
T
L
_
H
D
#
6
G
T
L
_
H
D
#
4
G
T
L
_
H
D
#
1
6
G
T
L
_
H
D
#
2
5
G
T
L
_
H
D
#
2
3
G
T
L
_
H
D
#
2
8
G
T
L
_
H
D
#
4
6
G
T
L
_
H
D
#
5
5
G
T
L
_
H
D
#
4
3
G
T
L
_
H
D
#
1
G
T
L
_
H
D
#
1
7
G
T
L
_
H
D
#
5
3
G
T
L
_
H
D
#
4
9
G
T
L
_
H
D
#
2
2
G
T
L
_
H
D
#
1
2
G
T
L
_
H
D
#
3
7
G
T
L
_
H
D
#
2
7
G
T
L
_
H
D
#
3
6
G
T
L
_
H
D
#
4
0
G
T
L
_
H
D
#
1
0
G
T
L
_
H
D
#
3
2
G
T
L
_
H
D
#
6
0
G
T
L
_
H
D
#
5
9
G
T
L
_
H
D
#
7
G
T
L
_
H
D
#
5
7
G
T
L
_
H
D
#
1
3
G
T
L
_
H
D
#
4
5
G
T
L
_
H
D
#
2
9
G
T
L
_
H
D
#
5
0
G
T
L
_
H
D
#
1
4
G
T
L
_
H
D
#
5
4
G
T
L
_
H
D
#
3
9
G
T
L
_
H
D
#
4
1
G
T
L
_
H
D
#
3
1
G
T
L
_
H
D
#
5
GTL_HD#[0..63]
CPU_A20M#
CPU_INTRCPU_NMICPU_IGNNE#CPU_STPCLK#
GTL_RS#1GTL_RS#0
GTL_RS#2
GTL_DRDY#GTL_DBSY#
GTL_HREQ#4GTL_HREQ#3
GTL_HREQ#1GTL_HREQ#2
GTL_HIT#
GTL_HREQ#0
GTL_HLOCK#
GTL_HITM#
GTL_HREQ#[0..4]
GTL_DEFER#
GTL_CPURST#PWRGD_CPU
Z0409
GTL_BPRI#GTL_BREQ0#
ITPCLK#ITPCLK
Z0418
Z0419 Z0420
SLP#
CPU_SMI#
CPU_INIT#
CPU_A20M#
FERR#
CPU_INTR
CPU_IGNNE#
CPU_STPCLK#
CPU_TRST#
CPUCLK#
Z0417
VID1
VID4
VID0
VID2VID3
PWRGD_CPU
CPU_IERR#
GTL_CPURST#
GTL_BREQ0#
Z0429
CPU_NMI
Z0430
R586
1K
R583
1K
R587
1K
R588
1K
T19T18
R756
10K
R548 62 1%
T20
L69 4.7uH_0805
L70 4.7uH_0805
T24T23
T22T21
R487100_1%
R486
49.9_1%
U52
MIC5248
1
2
3 4
5VIN
G
N
D
EN PG
VOUT
R530 200
R534 200
R449 200
R463 200
R451 200
R447 200
R458 200
D50
RB751V
A C R547 200
C654
220p/6.3V
C656
220p/6.3V
R517
49.9_1%
R518100_1%
R462 62_1%
R559 *0
T16T15
R550
49.9_1%
R549100_1%
C663
0.1u_X7R
R738
47K
C616
1u_X7R
R461 62_1%
R540 300_1%
R539 51_1%
R515 51_1%
R560 150
R55810
C66910p_R
R56810
C67910p_R
C617
220p/6.3V
R446 680
R740
*0
C618
220p/6.3V
R56710
C67710p_R
C655
1u_X7R
L28 *4.7uH_0805
+C864
47UF/6.3V_D
L25 *4.7uH_0805
N13
OPEN_1A
T10
C8652.2UF/16V_1206
+
C866
47UF/6.3V_D
R739
10K
T14
C8672.2UF/16V_1206
T17
R506 51_1%R493 51_1%
+C210
330u/10V_D
R737 200
C666
0.1u_X7R
+C227
330u/10V_D
R589
1K
R54210
C66510p_R
NORTHWOOD INTERFACE
U12B
NORTHWOOD
P1
AF23AF22
L24
AC3
V6
B6
Y4
AA3
W5
AB2
H5H2
J6
G1
G4
H6
G2
F3
E3
D2
E2
D4
C1
F7
E6
D5
C3
B2
B5
C6
AB26
AB23AB25
B
2
1
B
2
2
A
2
3
A
2
5
C
2
1
D
2
2
B
2
4
C
2
3
C
2
4
B
2
5
G
2
2
H
2
1
C
2
6
D
2
3
J
2
1
D
2
5
H
2
2
E
2
4
G
2
3
F
2
3
F
2
4
E
2
5
F
2
6
D
2
6
L
2
1
G
2
6
H
2
4
M
2
1
L
2
2
J
2
4
K
2
3
H
2
5
M
2
3
N
2
2
P
2
1
M
2
4
N
2
3
M
2
6
N
2
6
N
2
5
R
2
1
P
2
4
R
2
5
R
2
4
T
2
6
T
2
5
T
2
2
T
2
3
U
2
6
U
2
4
U
2
3
V
2
5
U
2
1
V
2
2
V
2
4
W
2
6
Y
2
6
W
2
5
Y
2
3
Y
2
4
Y
2
1
A
A
2
5
A
A
2
2
A
A
2
4
K
2
K
4
L
6
K
1
L
3
M
6
L
2
M
3
M
4
N
1
M
1
N
2
N
4
N
5
T
1
R
2
P
3
P
4
R
3
T
2
U
1
P
6
U
3
T
4
V
2
R
6
W
1
T
5
U
4
V
3
W
2
Y
1
A
B
1
L
2
5
K
2
6
K
2
5
J
2
6
AC26AD26
E5D1
F
2
0
A
A
2
1
F
6
A
A
6
A
F
4
A
E
4
A
E
3
A
E
2
A
E
1
A
E
5
AE23
AD20
AD22
J1K5J4J3H3
F1G5F4E21
G25P26V21
AC1V5
AD6AD5
F21J23P23
W23
E22K22R22W22
AE25
L5R5
A2B3C4 COMP1
BCLK1BCLK0
COMP0
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#DRDY#
TRDY#
ADS#
LOCK#
BR0#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TCK
TDI
TMS
TRST#
TDO
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
PWRGOODRESET#
D
0
#
D
1
#
D
2
#
D
3
#
D
4
#
D
5
#
D
6
#
D
7
#
D
8
#
D
9
#
D
1
0
#
D
1
1
#
D
1
2
#
D
1
3
#
D
1
4
#
D
1
5
#
D
1
6
#
D
1
7
#
D
1
8
#
D
1
9
#
D
2
0
#
D
2
1
#
D
2
2
#
D
2
3
#
D
2
4
#
D
2
5
#
D
2
6
#
D
2
7
#
D
2
8
#
D
2
9
#
D
3
0
#
D
3
1
#
D
3
2
#
D
3
3
#
D
3
4
#
D
3
5
#
D
3
6
#
D
3
7
#
D
3
8
#
D
3
9
#
D
4
0
#
D
4
1
#
D
4
2
#
D
4
3
#
D
4
4
#
D
4
5
#
D
4
6
#
D
4
7
#
D
4
8
#
D
4
9
#
D
5
0
#
D
5
1
#
D
5
2
#
D
5
3
#
D
5
4
#
D
5
5
#
D
5
6
#
D
5
7
#
D
5
8
#
D
5
9
#
D
6
0
#
D
6
1
#
D
6
2
#
D
6
3
#
A
3
#
A
4
#
A
5
#
A
6
#
A
7
#
A
8
#
A
9
#
A
1
0
#
A
1
1
#
A
1
2
#
A
1
3
#
A
1
4
#
A
1
5
#
A
1
6
#
A
1
7
#
A
1
8
#
A
1
9
#
A
2
0
#
A
2
1
#
A
2
2
#
A
2
3
#
A
2
4
#
A
2
5
#
A
2
6
#
A
2
7
#
A
2
8
#
A
2
9
#
A
3
0
#
A
3
1
#
A
3
2
#
A
3
3
#
A
3
4
#
A
3
5
#
D
P
3
#
D
P
2
#
D
P
1
#
D
P
0
#
ITP_CLK0ITP_CLK1
LINT1LINT0
G
T
L
R
E
F
0
G
T
L
R
E
F
1
G
T
L
R
E
F
2
G
T
L
R
E
F
3
V
C
C
V
I
D
V
I
D
1
V
I
D
2
V
I
D
3
V
I
D
4
V
I
D
0
VCCIOPLL
VCCA
VSSA
REQ0#REQ1#REQ2#REQ3#REQ4#
RS0#RS1#RS2#DB#0
DB#1DB#2DB#3
AP0#AP1#
BSEL0BSEL1
DSTBP0#DSTBP1#DSTBP2#DSTBP3#
DSTBN0#DSTBN1#DSTBN2#DSTBN3#
DBR#
ADSTB0#ADSTB1#
THERMTRIP#THERMDATHERMDC
T13
T12T11
V_CORE [3,5,14,15,27]
CPU SIGNAL TERMINATIONCLOSE TO CPU
X7R X7R
X7R X7R
(19-31001-044-A)
M-CPU_1.25V
D-V_VORE
7/23
Sheet 3 of 29CPU 2 of 2
Schematic Diagrams
MCH845 Power & Ground (71-56P00-D05) B - 5
Schematic Diagram
s
MCH845 Power & Ground
Sheet 4 of 29MCH845
Power & Ground
V_CORE
+2.5V
+1.8VS
+1.5VS
+1.5VS
V_CORE
V_CORE
+1.5VS+2.5V
HADSTB#0 [4]HADSTB#1 [4]
GTL_ADS#[4]GTL_BNR#[4]
GTL_HIT#[4]
GTL_DBSY#[4]GTL_DRDY#[4]
GTL_HITM#[4]
GTL_HD#[0..63][4]
MCHCLK [7]
GTL_RS#[0..2][4]
GTL_CPURST#[3,4]
GTL_BREQ0#[4]GTL_BPRI#[4]
GTL_DEFER#[4]GTL_HTRDY#[4]GTL_HLOCK#[4]
GTL_HA#[3..31][4]
GTL_HREQ#[0..4] [4]
HDSTBN#0 [4]
HDSTBN#3 [4]HDSTBN#1 [4]HDSTBN#2 [4]
HDSTBP#0 [4]HDSTBP#1 [4]HDSTBP#2 [4]HDSTBP#3 [4]
HDB#0 [4]HDB#1 [4]HDB#2 [4]HDB#3 [4]
MCHCLK# [7]
V_CORE
+2.5V
Z0504
Z0503
Z0502
Z0505
V_CORE+2.5V
Z0510
Z0501
GTL_BNR#GTL_ADS#
GTL_DRDY#GTL_DBSY#
GTL_HIT#
GTL_HITM#
GTL_HD#[0..63]
G
T
L
_
H
D
#
3
3
G
T
L
_
H
D
#
5
8
G
T
L
_
H
D
#
3
4
G
T
L
_
H
D
#
9
G
T
L
_
H
D
#
8
G
T
L
_
H
D
#
5
2
G
T
L
_
H
D
#
2
4
G
T
L
_
H
D
#
4
2
G
T
L
_
H
D
#
3
5
G
T
L
_
H
D
#
0
G
T
L
_
H
D
#
6
2
G
T
L
_
H
D
#
6
3
G
T
L
_
H
D
#
1
5
G
T
L
_
H
D
#
4
8
G
T
L
_
H
D
#
2
1
G
T
L
_
H
D
#
4
4
G
T
L
_
H
D
#
2
6
G
T
L
_
H
D
#
4
7
G
T
L
_
H
D
#
6
1
G
T
L
_
H
D
#
1
9
G
T
L
_
H
D
#
1
1
G
T
L
_
H
D
#
2
0
G
T
L
_
H
D
#
3
0
G
T
L
_
H
D
#
2
G
T
L
_
H
D
#
3
G
T
L
_
H
D
#
3
8
G
T
L
_
H
D
#
5
1
G
T
L
_
H
D
#
5
6
G
T
L
_
H
D
#
1
8
G
T
L
_
H
D
#
6
G
T
L
_
H
D
#
4
G
T
L
_
H
D
#
1
6
G
T
L
_
H
D
#
2
5
G
T
L
_
H
D
#
2
3
G
T
L
_
H
D
#
2
8
G
T
L
_
H
D
#
4
6
G
T
L
_
H
D
#
5
5
G
T
L
_
H
D
#
4
3
G
T
L
_
H
D
#
1
G
T
L
_
H
D
#
1
7
G
T
L
_
H
D
#
5
3
G
T
L
_
H
D
#
4
9
G
T
L
_
H
D
#
2
2
G
T
L
_
H
D
#
1
2
G
T
L
_
H
D
#
3
7
G
T
L
_
H
D
#
2
7
G
T
L
_
H
D
#
3
6
G
T
L
_
H
D
#
4
0
G
T
L
_
H
D
#
1
0
G
T
L
_
H
D
#
3
2
G
T
L
_
H
D
#
6
0
G
T
L
_
H
D
#
5
9
G
T
L
_
H
D
#
7
G
T
L
_
H
D
#
5
7
G
T
L
_
H
D
#
1
3
G
T
L
_
H
D
#
4
5
G
T
L
_
H
D
#
2
9
G
T
L
_
H
D
#
5
0
G
T
L
_
H
D
#
1
4
G
T
L
_
H
D
#
5
4
G
T
L
_
H
D
#
3
9
G
T
L
_
H
D
#
4
1
G
T
L
_
H
D
#
3
1
G
T
L
_
H
D
#
5
MCHCLK
Z0506
GTL_RS#1GTL_RS#0
GTL_RS#2
GTL_BREQ0#
GTL_DEFER#
GTL_HLOCK#GTL_BPRI#
GTL_CPURST#
G
T
L
_
H
A
#
2
2
G
T
L
_
H
A
#
1
5
G
T
L
_
H
A
#
1
1
G
T
L
_
H
A
#
2
0
G
T
L
_
H
A
#
2
4
G
T
L
_
H
A
#
9
G
T
L
_
H
A
#
2
6
G
T
L
_
H
A
#
1
8
G
T
L
_
H
A
#
3
1
G
T
L
_
H
A
#
1
3
G
T
L
_
H
A
#
2
3
GTL_HA[3..31]
G
T
L
_
H
A
#
3
0
G
T
L
_
H
A
#
7
G
T
L
_
H
A
#
6
G
T
L
_
H
A
#
2
1
G
T
L
_
H
A
#
4
G
T
L
_
H
A
#
1
6
G
T
L
_
H
A
#
1
7
G
T
L
_
H
A
#
3
G
T
L
_
H
A
#
2
9
G
T
L
_
H
A
#
8
G
T
L
_
H
A
#
5
G
T
L
_
H
A
#
2
8
G
T
L
_
H
A
#
2
7
G
T
L
_
H
A
#
1
4
G
T
L
_
H
A
#
1
9
G
T
L
_
H
A
#
1
2
G
T
L
_
H
A
#
2
5
G
T
L
_
H
A
#
1
0
GTL_HREQ#[0..4]
GTL_HREQ#1
GTL_HREQ#4GTL_HREQ#3
GTL_HREQ#0
GTL_HREQ#2
MCHCLKMCHCLK#
Z0508Z0509
Z0507
MCHCLK#
C488
0.1u_X7R
C546
0.1u_X7R
C486
0.1u_X7R
+C574
47UF/6.3V_D
+C222
4.7u/25V
L45 4.7uH_0805
L44 4.7uH_0805
C564
0.1u_X7R
+C475
47UF/6.3V_D
MCH845 POWER & GROUND
U6A
MCH845
R
1
3
R
1
5
R
1
7
R
2
6
T
6
T
8
T
1
4
T
1
6
T
2
2
U
1
U
4
U
1
5
U
2
9
V
6
V
8
V
2
2
W
1
W
4
W
8
W
2
6
Y
6
Y
2
2
A
A
1
A
A
4
A
A
8
A
A
2
9
A
B
6
A
B
9
A
B
1
0
A
B
1
2
A
B
1
3
A
B
1
4
A
B
1
5
A
B
1
6
A
B
1
9
A
B
2
2
A
C
1
A
C
4
A
C
1
8
A
C
2
0
A
C
2
1
A
C
2
3
A
C
2
6
A
D
6
A
D
8
A
D
1
0
A
D
1
2
A
D
1
4
A
D
1
6
A
D
1
9
A
D
2
2
A
E
1
A
E
4
A
E
1
8
A
E
2
0
A
E
2
9
A
F
5
A
F
7
A
F
9
A
F
1
1
A
F
1
3
A
F
1
5
A
F
1
7
A
F
1
9
A
F
2
1
A3A7
A11A15A19A23A27D5D9
D13D17D21
E1E4
E26E29
F8F12F16F20F24G26
H9H11H13H15H17H19H21
J1J4J6
J22J26J29K5K7
K27L1L4L6L8
L22L24L26M23
N1N4N8
N13N15N17N22N29
P6P8
P14P16R1R4
T17
U17
P13P15P17N14N16R14R16R22R29
T15U14U16U22U26W22W29AA22AA26AB21AC29AD21AD23AE26AF23AG29AJ25
L25L29M22N23N26
AF25AG1AG18AG20AG22AH19AH21AH23AJ3AJ5AJ7AJ9AJ11AJ13AJ15AJ17AJ27
A
5
A
9
A
1
3
A
1
7
A
2
1
A
2
5
C
1
C
2
9
D
7
D
1
1
D
1
5
D
1
9
D
2
3
D
2
5
F
6
F
1
0
F
1
4
F
1
8
F
2
2
G
1
G
4
G
2
9
H
8
H
1
0
H
1
2
H
1
4
H
1
6
H
1
8
H
2
0
H
2
2
H
2
4
K
2
2
K
2
4
K
2
6
L
2
3
K
6
J
5
J
7
M
8
U
8
A
A
9
A
B
8
A
B
1
8
A
B
2
0
A
C
1
9
A
D
1
8
A
D
2
0
A
E
1
9
A
E
2
1
A
F
1
8
A
F
2
0
A
G
1
9
A
G
2
1
A
G
2
3
A
J
1
9
A
J
2
1
A
J
2
3
T
1
3
U
1
3
V
S
S
6
1
V
S
S
6
2
V
S
S
6
3
V
S
S
6
4
V
S
S
6
5
V
S
S
6
6
V
S
S
6
7
V
S
S
6
8
V
S
S
6
9
V
S
S
7
0
V
S
S
7
1
V
S
S
7
2
V
S
S
7
3
V
S
S
7
4
V
S
S
7
5
V
S
S
7
6
V
S
S
7
7
V
S
S
7
8
V
S
S
7
9
V
S
S
8
0
V
S
S
8
1
V
S
S
8
2
V
S
S
8
3
V
S
S
8
4
V
S
S
8
5
V
S
S
8
6
V
S
S
8
7
V
S
S
8
8
V
S
S
8
9
V
S
S
9
0
V
S
S
9
1
V
S
S
9
2
V
S
S
9
3
V
S
S
9
4
V
S
S
9
5
V
S
S
9
6
V
S
S
9
7
V
S
S
9
8
V
S
S
9
9
V
S
S
1
0
0
V
S
S
1
0
1
V
S
S
1
0
2
V
S
S
1
0
3
V
S
S
1
0
4
V
S
S
1
0
5
V
S
S
1
0
6
V
S
S
1
0
7
V
S
S
1
0
8
V
S
S
1
0
9
V
S
S
1
1
0
V
S
S
1
1
1
V
S
S
1
1
2
V
S
S
1
1
3
V
S
S
1
1
4
V
S
S
1
1
5
V
S
S
1
1
6
V
S
S
1
1
7
V
S
S
1
1
8
V
S
S
1
1
9
V
S
S
1
2
0
V
S
S
1
2
1
V
S
S
1
2
2
V
S
S
1
2
3
V
S
S
1
2
4
V
S
S
1
2
5
VSS1VSS2VSS3VSS4VSS5VSS6VSS7VSS8VSS9VSS10VSS11VSS12VSS13VSS14VSS15VSS16VSS17VSS18VSS19VSS20VSS21VSS22VSS23VSS24VSS25VSS26VSS27VSS28VSS29VSS30VSS31VSS32VSS33VSS34VSS35VSS36VSS37VSS38VSS39VSS40VSS41VSS42VSS43VSS44VSS45VSS46VSS47VSS48VSS49VSS50VSS51VSS52VSS53VSS54VSS55VSS56VSS57VSS58VSS59VSS60
VCCA1
VSSA1
VCC1.5_1VCC1.5_2VCC1.5_3VCC1.5_4VCC1.5_5VCC1.5_6VCC1.5_7VCC1.5_8VCC1.5_9
VCC1.5_10VCC1.5_11VCC1.5_12VCC1.5_13VCC1.5_14VCC1.5_15VCC1.5_16VCC1.5_17VCC1.5_18VCC1.5_19VCC1.5_20VCC1.5_21VCC1.5_22VCC1.5_23VCC1.5_24VCC1.5_25VCC1.5_26
VCC1.8_1VCC1.8_2VCC1.8_3VCC1.8_4VCC1.8_5
VSS126VSS127VSS128VSS129VSS130VSS131VSS132VSS133VSS134VSS135VSS136VSS137VSS138VSS139VSS140VSS141VSS142
V
C
C
S
M
1
V
C
C
S
M
2
V
C
C
S
M
3
V
C
C
S
M
4
V
C
C
S
M
5
V
C
C
S
M
6
V
C
C
S
M
7
V
C
C
S
M
8
V
C
C
S
M
9
V
C
C
S
M
1
0
V
C
C
S
M
1
1
V
C
C
S
M
1
2
V
C
C
S
M
1
3
V
C
C
S
M
1
4
V
C
C
S
M
1
5
V
C
C
S
M
1
6
V
C
C
S
M
1
7
V
C
C
S
M
1
8
V
C
C
S
M
1
9
V
C
C
S
M
2
0
V
C
C
S
M
2
1
V
C
C
S
M
2
2
V
C
C
S
M
2
3
V
C
C
S
M
2
4
V
C
C
S
M
2
5
V
C
C
S
M
2
6
V
C
C
S
M
2
7
V
C
C
S
M
2
8
V
C
C
S
M
2
9
V
C
C
S
M
3
0
V
C
C
S
M
3
1
V
C
C
S
M
3
2
V
C
C
S
M
3
3
V
C
C
S
M
3
4
V
C
C
S
M
3
5
V
C
C
S
M
3
6
V
C
C
S
M
3
7
V
C
C
S
M
3
8
V
T
T
1
V
T
T
2
V
T
T
3
V
T
T
4
V
T
T
5
V
T
T
6
V
T
T
7
V
T
T
8
V
T
T
9
V
T
T
1
0
V
T
T
1
1
V
T
T
1
2
V
T
T
1
3
V
T
T
1
4
V
T
T
1
5
V
T
T
1
6
V
T
T
1
7
V
T
T
1
8
V
T
T
1
9
V
C
C
A
0
V
S
S
A
0
C523
0.1u_X7R
C511
0.01UF
C512
0.01UF
R444
100_1%
R44349.9_1%
C472
0.1u_X7R
C550
0.1u_X7R
C584
0.1u_X7R
+C756
47UF/6.3V_D
C477
0.1u_X7R
+C533
47UF/6.3V_D
+C532
47UF/6.3V_D
R429 24.9_1%R424 24.9_1%
C743
0.1u_X7R
C591
0.1u_X7R
C524
0.1u_X7R
C479
0.1u_X7R
+C464
47UF/6.3V_D
R4710
C55510p_R
C517
0.1u_X7R
C503
0.1u_X7RC478
0.1u_X7R
+C35
47UF/6.3V_D
R4680
C54110p_R
C525
0.1u_X7R
C585
0.1u_X7R
C471
0.1u_X7R
C551
0.1u_X7R
C558
0.1u_X7R
C588
0.1u_X7R
C631
0.1u_X7R
C510 0.01UF
+C521
4.7u/25V
C497
0.1u_X7R
C561
0.1u_X7R
C590
0.1u_X7R
C582
0.1u_X7R
C514
0.1u_X7R
C548
0.1u_X7R
C583
0.1u_X7R
C544
0.1u_X7R
R442 301_1%
R441150_1%
MCH845 HOST INTERFACE
U6B
MCH845
T
4
T
5
T
3
U
3
R
3
P
7
R
2
P
4
R
6
P
5
P
3
N
2
N
7
N
3
K
4
M
4
M
3
L
3
L
5
K
3
J
2
M
5
J
3
L
2
H
4
N
5
G
2
M
6
L
7
U
6
T
7
R
7
U
5
U
2
V3W3
Y7V7
AE17
V5
Y4
Y5
Y3
W5U7
V4
A
D
5
A
G
4
A
H
9
A
D
1
5
W2W7W6
J8K8
AD13AA7
AC13AC2
A
A
2
A
B
5
A
A
5
A
B
3
A
B
4
A
C
5
A
A
3
A
A
6
A
E
3
A
B
7
A
D
7
A
C
7
A
C
6
A
C
3
A
C
8
A
E
2
A
G
5
A
G
2
A
E
8
A
F
6
A
H
2
A
F
3
A
G
3
A
E
5
A
H
7
A
H
3
A
F
4
A
G
8
A
G
7
A
G
6
A
F
8
A
H
5
A
C
1
1
A
C
1
2
A
E
9
A
C
9
A
E
1
0
A
D
9
A
G
9
A
C
1
0
A
E
1
2
A
F
1
0
A
G
1
1
A
G
1
0
A
H
1
1
A
G
1
2
A
E
1
3
A
F
1
2
A
G
1
3
A
H
1
3
A
C
1
4
A
F
1
4
A
G
1
4
A
E
1
4
A
G
1
5
A
G
1
6
A
G
1
7
A
H
1
5
A
C
1
7
A
F
1
6
A
E
1
5
A
H
1
7
A
D
1
7
A
E
1
6
R5N6
AD3AE7AD11AC16
AD4AE6AE11AC15
M7R8Y8
AB11AB17
H
A
3
#
H
A
4
#
H
A
5
#
H
A
6
#
H
A
7
#
H
A
8
#
H
A
9
#
H
A
1
0
#
H
A
1
1
#
H
A
1
2
#
H
A
1
3
#
H
A
1
4
#
H
A
1
5
#
H
A
1
6
#
H
A
1
7
#
H
A
1
8
#
H
A
1
9
#
H
A
2
0
#
H
A
2
1
#
H
A
2
2
#
H
A
2
3
#
H
A
2
4
#
H
A
2
5
#
H
A
2
6
#
H
A
2
7
#
H
A
2
8
#
H
A
2
9
#
H
A
3
0
#
H
A
3
1
#
H
R
E
Q
0
#
H
R
E
Q
1
#
H
R
E
Q
2
#
H
R
E
Q
3
#
H
R
E
Q
4
#
ADS#BNR#
BPRI#BR0#
CPURST#
DBSY#
DEFER#
HIT#
HITM#
HLOCK#HTRDY#
DRDY#
D
B
I
0
#
D
B
I
1
#
D
B
I
2
#
D
B
i
3
#
RS0#RS1#RS2#
BCLKBCLK#
HSWNG1HSWNG0
HRCOMP1HRCOMP0
H
D
0
#
H
D
1
#
H
D
2
#
H
D
3
#
H
D
4
#
H
D
5
#
H
D
6
#
H
D
7
#
H
D
8
#
H
D
9
#
H
D
1
0
#
H
D
1
1
#
H
D
1
2
#
H
D
1
3
#
H
D
1
4
#
H
D
1
5
#
H
D
1
6
#
H
D
1
7
#
H
D
1
8
#
H
D
1
9
#
H
D
2
0
#
H
D
2
1
#
H
D
2
2
#
H
D
2
3
#
H
D
2
4
#
H
D
2
5
#
H
D
2
6
#
H
D
2
7
#
H
D
2
8
#
H
D
2
9
#
H
D
3
0
#
H
D
3
1
#
H
D
3
2
#
H
D
3
3
#
H
D
3
4
#
H
D
3
5
#
H
D
3
6
#
H
D
3
7
#
H
D
3
8
#
H
D
3
9
#
H
D
4
0
#
H
D
4
1
#
H
D
4
2
#
H
D
4
3
#
H
D
4
4
#
H
D
4
5
#
H
D
4
6
#
H
D
4
7
#
H
D
4
8
#
H
D
4
9
#
H
D
5
0
#
H
D
5
1
#
H
D
5
2
#
H
D
5
3
#
H
D
5
4
#
H
D
5
5
#
H
D
5
6
#
H
D
5
7
#
H
D
5
8
#
H
D
5
9
#
H
D
6
0
#
H
D
6
1
#
H
D
6
2
#
H
D
6
3
#
HADSTB0#HADSTB1#
HDSTBP0#HDSTBP1#HDSTBP2#HDSTBP3#
HDSTBN0#HDSTBN1#HDSTBN2#HDSTBN3#
HVREF0HVREF1HVREF2HVREF3HVREF4
+C786
47UF/6.3V_D
C473
0.1u_X7R
C562
0.1u_X7R
C592
0.1u_X7R
C531
0.1u_X7R+C34
4.7u/25V
C542
0.1u_X7R
+1.8VS [6,10,12,14,15,22]+1.5VS [6,10,15,22]
V_CORE [3,4,14,15,27]+2.5V [8,10,14,22,23,29]
(19-31001-044-A)
(19-31001-044-A)
Schematic Diagrams
B - 6 MCH845 Memory Interface (71-56P00-D05)
S
c
h
e
m
a
t
i
c
D
i
a
g
r
a
m
s
MCH845 Memory Interface
Sheet 5 of 29MCH845
Memory Interface+1.25V
MVREF_DIM
+1.8VS
+1.5VS
+1.8VS
+1.5VS
HI_REF
+1.5VS
+1.5VS
+1.5VS
MCH66CLK [7]HI_[0..10][14]
HI_STB[14]HI_STB#[14]
AGP_AD[0..31][10]
AGP_C/BE#[0..3][10]
AGP_SBA[0..7][10]
AGP_ST[0..2] [10]
AGP_RBF# [10]
AGP_PAR [10]AGP_REQ# [10]AGP_GNT# [10]
MD_[0..63][9]
DQS_#[0..8][9]
MAAF[0..12][8]
CKE0[8,9]CKE1[8,9]CKE2[8,9]CKE3[8,9]
DCLK0 [8]
DCLK1 [8]
DCLK2 [8]
DCLK3 [8]
DCLK4 [8]
DCLK5 [8]
DCLK0# [8]
DCLK1# [8]
DCLK2# [8]
DCLK3# [8]
DCLK4# [8]
DCLK5# [8]
BA0 [8]BA1 [8]
AGPVREF [10]
PCIRST# [10,13,16,17,18,19,20,21,25,28,30]
CS2# [8,9]CS3# [8,9]CS1# [8,9]CS0# [8,9]
DQM#[0..7][8,9]
SCASA# [8]SRASA# [8]SWEA# [8]
AGP_IRDY# [10]AGP_TRDY# [10]AGP_STOP# [10]AGP_FRAME# [10]AGP_DEVSEL# [10]
SB_STB# [10]SB_STB [10]
AD_STB1# [10]
AD_STB0# [10]AD_STB0 [10]
AD_STB1 [10]
Z0618
Z
0
6
4
3
Z
0
6
4
4
Z
0
6
4
5
Z
0
6
4
6
Z
0
6
4
7
Z
0
6
4
8
Z
0
6
4
9
Z
0
6
5
0
Z
0
6
5
1
Z
0
6
5
2
Z
0
6
5
3
Z
0
6
5
4
Z
0
6
5
5
SWEA#SCASA#
CS1#ACS0#A
CS2#ACS3#A
BA0
Z0642
HI_0HI_1HI_2HI_3
HI_5HI_4
HI_6HI_7HI_8HI_9HI_10
Z0662
Z0660Z0661
Z0658
AGP_RBF#WBF#PIPE#
RSTIN#
66IN
Z0656
Z0657
Z0659
HI_[0..10]
RSTIN#
66IN
A
G
P
_
A
D
3
1
A
G
P
_
A
D
2
1
A
G
P
_
A
D
2
8
A
G
P
_
A
D
1
0
A
G
P
_
A
D
1
3
A
G
P
_
A
D
2
6
A
G
P
_
A
D
1
6
A
G
P
_
A
D
2
2
A
G
P
_
A
D
2
5
A
G
P
_
A
D
7
A
G
P
_
A
D
2
9
A
G
P
_
A
D
1
4
A
G
P
_
A
D
2
7
A
G
P
_
A
D
3
0
A
G
P
_
A
D
2
3
A
G
P
_
A
D
2
4
A
G
P
_
A
D
9
A
G
P
_
A
D
1
8
A
G
P
_
A
D
8
A
G
P
_
A
D
4
A
G
P
_
A
D
1
A
G
P
_
A
D
2
0
A
G
P
_
A
D
0
A
G
P
_
A
D
5
A
G
P
_
A
D
6
A
G
P
_
A
D
1
9
A
G
P
_
A
D
1
2
A
G
P
_
A
D
3
A
G
P
_
A
D
1
7
A
G
P
_
A
D
2
A
G
P
_
A
D
1
5
A
G
P
_
A
D
1
1
A
G
P
_
C
/
B
E
#
3
A
G
P
_
C
/
B
E
#
1
A
G
P
_
C
/
B
E
#
0
A
G
P
_
C
/
B
E
#
2
AGP_C/BE#[0..3]
A
G
P
_
S
B
A
4
A
G
P
_
S
B
A
2
A
G
P
_
S
B
A
7
A
G
P
_
S
B
A
3
A
G
P
_
S
B
A
0
A
G
P
_
S
B
A
6
A
G
P
_
S
B
A
5
A
G
P
_
S
B
A
1
AGP_SBA[0..7]
AGP_ST2AGP_ST1AGP_ST0
AGP_RBF#
WBF#
PIPE#
AGP_REQ#
AGP_GNT#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_FRAME#
AGP_DEVSEL#
Z0663
AGP_GNT#AGP_REQ#AGP_PAR
M
D
_
1
5
M
D
_
2
M
D
_
3
0
M
D
_
2
0
M
D
_
1
9
M
D
_
1
8
M
D
_
1
7
M
D
_
1
6
M
D
_
6
M
D
_
2
9
M
D
_
2
2
M
D
_
2
4
M
D
_
2
8
M
D
_
1
1
M
D
_
1
2
M
D
_
1
3
M
D
_
1
4
M
D
_
2
3
M
D
_
1
0
M
D
_
2
1
M
D
_
9
M
D
_
2
5
M
D
_
2
7
M
D
_
3
M
D
_
8
M
D
_
2
6
M
D
_
7
M
D
_
5
M
D
_
4
M
D
_
0
M
D
_
1
M
D
_
3
1
M
D
_
4
7
M
D
_
4
2
M
D
_
5
9
M
D
_
6
0
M
D
_
4
8
M
D
_
4
9
M
D
_
3
2
M
D
_
3
5
M
D
_
4
3
M
D
_
5
2
M
D
_
4
6
M
D
_
3
6
M
D
_
5
8
M
D
_
6
1
M
D
_
4
0
M
D
_
5
3
M
D
_
3
8
M
D
_
3
3
M
D
_
4
4
M
D
_
5
1
M
D
_
3
4
M
D
_
5
5
M
D
_
3
9
M
D
_
4
1
M
D
_
5
4
M
D
_
5
0
M
D
_
5
7
M
D
_
5
6
M
D
_
6
3
M
D
_
4
5
M
D
_
6
2
M
D
_
3
7
MD_[0..63]
CKE0CKE1CKE2CKE3
DQS_#3DQS_#4
DQS_#6DQS_#7
DQS_#0
DQS_#5
DQS_#8
DQS_#2DQS_#1
Z0619
MAAF0MAAF1MAAF2MAAF3MAAF4MAAF5MAAF6MAAF7MAAF8MAAF9MAAF10MAAF11MAAF12
AGP_PAR
DQM#0ADQM#1A
DQM#3ADQM#4ADQM#5ADQM#6ADQM#7A
DQM#3
DQM#6
DQM#4
DQM#2DQM#1DQM#0
DQM#5
DQM#7
DQM#2A
BA1
SRASA#
AGP_ST1AGP_ST0
AGP_ST2
AGP_IRDY#
AGP_STOP#
AGP_DEVSEL#
AGP_TRDY#
AGP_FRAME#
AD_STB0#AD_STB0
SB_STB#
AD_STB1AD_STB1#
SB_STB
Z0664Z0665
Z0666Z0667Z0668Z0669Z0670
R556.8K
R496.8K
R896.8K
R4736.8K
R470 0
C513
0.1u_X7R
C461
0.1u_X7RR4101K_1%
R411 1K_1%R409 0
R727 22R726 22R725 22
R41710K
R4182K
R735 22R734 22
R733 22
R731 22R730 22
R732 22
R729 22R728 22
R80 40.2_1%
C538 0.01UF
R723*10K
R722*10K
R721*10K
R724*10K
R81 *4.7K
R43440.2_1%
R476 6.8K
RP1258P4RX33
8 17 265
34
RP1268P4RX33
8 17 265
34
R467 150_1%
MCH845 AGP INTERFACE
U6D
MCH845
AA21
R
2
7
R
2
8
T
2
5
R
2
5
T
2
6
T
2
7
U
2
7
U
2
8
V
2
6
V
2
7
T
2
3
U
2
3
T
2
4
U
2
4
U
2
5
V
2
4
Y
2
7
Y
2
6
A
A
2
8
A
B
2
5
A
B
2
7
A
A
2
7
A
B
2
6
Y
2
3
A
B
2
3
A
A
2
4
A
A
2
5
A
B
2
4
A
C
2
5
A
C
2
4
A
C
2
2
A
D
2
4
V
2
5
V
2
3
Y
2
5
A
A
2
3
R
2
4
R
2
3
A
C
2
7
A
C
2
8
A
F
2
7
A
F
2
6
A
H
2
8
A
H
2
7
A
G
2
8
A
G
2
7
A
E
2
8
A
E
2
7
A
E
2
4
A
E
2
5
P27
P26
W25
AH25AG24
W27W24W23Y24W28
AD25
P22
AG25AF24AG26
AE22AE23AF22
M24N28M27L27L28M25M26P23N27P24P25
N24N25
J27
H26
AGPREF
G
_
A
D
0
G
_
A
D
1
G
_
A
D
2
G
_
A
D
3
G
_
A
D
4
G
_
A
D
5
G
_
A
D
6
G
_
A
D
7
G
_
A
D
8
G
_
A
D
9
G
_
A
D
1
0
G
_
A
D
1
1
G
_
A
D
1
2
G
_
A
D
1
3
G
_
A
D
1
4
G
_
A
D
1
5
G
_
A
D
1
6
G
_
A
D
1
7
G
_
A
D
1
8
G
_
A
D
1
9
G
_
A
D
2
0
G
_
A
D
2
1
G
_
A
D
2
2
G
_
A
D
2
3
G
_
A
D
2
4
G
_
A
D
2
5
G
_
A
D
2
6
G
_
A
D
2
7
G
_
A
D
2
8
G
_
A
D
2
9
G
_
A
D
3
0
G
_
A
D
3
1
G
_
C
B
E
0
#
G
_
C
B
E
1
#
G
_
C
B
E
2
#
G
_
C
B
E
3
#
A
D
_
S
T
B
0
A
D
_
S
T
B
0
#
A
D
_
S
T
B
1
A
D
_
S
T
B
1
#
S
B
_
S
T
B
S
B
_
S
T
B
#
S
B
A
0
S
B
A
1
S
B
A
2
S
B
A
3
S
B
A
4
S
B
A
5
S
B
A
6
S
B
A
7
HLRCOMP
HI_REF
G_PAR
G_GNT#G_REQ#
G_IRDY#G_TRDY#G_STOP#
G_FRAME#G_DEVSEL#
GRCOMP
66IN
ST0ST1ST2
RBF#WBF#PIPE#
HI_10HI_9HI_8HI_7HI_6HI_5HI_4HI_3HI_2HI_1HI_0
HI_STB#HI_STB
RSTIN#
TESTIN#
C549*0.1UF
C143
10p_R
R703 0R702 0R701 0R700 0
C528
0.1u_X7RR452150_1%
R472
30.1_1%C556
0.1u_X7R
C526
0.1u_X7R
T25
T31
T26
T36
T33
T30
T35
T32
T27
T37
T34
R86 0
T29T28
R412 6.8K
R416 6.8K
R415 6.8K
R413 6.8K
R414 6.8K
MCH845 MEMORY INTERFACE
U6C
MCH845
F
1
3
E
2
0
G
2
2
E
1
2
F
1
7
E
1
6
G
1
8
G
1
9
E
1
8
F
1
9
G
2
1
G
2
0
F
2
1
G
2
8
F
2
7
C
2
8
E
2
8
H
2
5
G
2
7
F
2
5
B
2
8
E
2
7
C
2
7
B
2
5
C
2
5
B
2
7
D
2
7
D
2
6
E
2
5
D
2
4
E
2
3
C
2
2
E
2
1
C
2
4
B
2
3
D
2
2
B
2
1
C
2
1
D
2
0
C
1
9
D
1
8
C
2
0
E
1
9
C
1
8
E
1
7
E
1
3
C
1
2
B
1
1
C
1
0
B
1
3
C
1
3
C
1
1
D
1
0
E
1
0
C
9
D
8
E
8
E
1
1
B
9
B
7
C
7
C
6
D
6
D
4
B
3
E
6
B
5
C
4
E
5
C
3
D
3
F
4
F
3
B
2
C
2
E
2
G
5
G6G7
G15G14
E24G24
J
2
8
H3
G3H5F5
J
9
J
2
1
G
9
G
1
0
G
1
6
G
1
7
H
6
H
7
H
2
7
J
2
3
J
2
5
K
2
3
K
2
5
A
D
2
6
A
D
2
7
C16D16B15C14B17C17C15D14
E14F15
J24G25
F26C26C23B19D12C8C5E3
E15
G11G8F11
G12G13
E9F7F9E7
G23E22H23F23
S
M
A
1
0
S
M
A
1
1
S
M
A
1
2
S
M
A
0
S
M
A
1
S
M
A
2
S
M
A
3
S
M
A
4
S
M
A
5
S
M
A
6
S
M
A
7
S
M
A
8
S
M
A
9
S
D
Q
0
S
D
Q
1
S
D
Q
2
S
D
Q
3
S
D
Q
4
S
D
Q
5
S
D
Q
6
S
D
Q
7
S
D
Q
8
S
D
Q
9
S
D
Q
1
0
S
D
Q
1
1
S
D
Q
1
2
S
D
Q
1
3
S
D
Q
1
4
S
D
Q
1
5
S
D
Q
1
6
S
D
Q
1
7
S
D
Q
1
8
S
D
Q
1
9
S
D
Q
2
0
S
D
Q
2
1
S
D
Q
2
2
S
D
Q
2
3
S
D
Q
2
4
S
D
Q
2
5
S
D
Q
2
6
S
D
Q
2
7
S
D
Q
2
8
S
D
Q
2
9
S
D
Q
3
0
S
D
Q
3
1
S
D
Q
3
2
S
D
Q
3
3
S
D
Q
3
4
S
D
Q
3
5
S
D
Q
3
6
S
D
Q
3
7
S
D
Q
3
8
S
D
Q
3
9
S
D
Q
4
0
S
D
Q
4
1
S
D
Q
4
2
S
D
Q
4
3
S
D
Q
4
4
S
D
Q
4
5
S
D
Q
4
6
S
D
Q
4
7
S
D
Q
4
8
S
D
Q
4
9
S
D
Q
5
0
S
D
Q
5
1
S
D
Q
5
2
S
D
Q
5
3
S
D
Q
5
4
S
D
Q
5
5
S
D
Q
5
6
S
D
Q
5
7
S
D
Q
5
8
S
D
Q
5
9
S
D
Q
6
0
S
D
Q
6
1
S
D
Q
6
2
S
D
Q
6
3
SCK2SCK2#
SCK3SCK3#
SCK4SCK4#
S
M
R
C
O
M
P
RCVENOUT#
RCVENIN#SCK5
SCK5#
S
D
R
E
F
S
D
R
E
F
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
N
C
N
C
SCB0SCB1SCB2SCB3SCB4SCB5SCB6SCB7
SCK0SCK0#
SCK1SCK1#
SDQS0SDQS1SDQS2SDQS3SDQS4SDQS5SDQS6SDQS7SDQS8
SWE#SCAS#SRAS#
SBS0SBS1
SCS0#SCS1#SCS2#SCS3#
SCKE0SCKE1SCKE2SCKE3
R480 6.8K
R477 6.8K
R91 6.8K
R90 6.8K
R466 0
C535
10p_R
R474 6.8KR616.8K
R686.8K
+1.5VS [5,10,15,22]
+2.5V [5,8,10,14,22,23,29]
+1.8VS [5,10,12,14,15,22]
Schematic Diagrams
Clock Generator (71-56P00-D05) B - 7
Schematic Diagram
s
Clock Generator
Sheet 6 of 29Clock Generator
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS +3V+3V
+3V
+3VS
CPUCLK [4]CPUCLK# [4]
MCHCLK# [5]MCHCLK [5]
ITPCLK [3,4]ITPCLK# [3,4]
SEL0[4]
MCH66CLK [6]ICH66CLK [14]ATI66CLK [10]
ICH-14M [14]ICH-48M [14]SIO-48M [20]
ICHPCLK [13]
PCLKMPCI [17]PCLKPCM [25]PCLKLAN [18]
PCLK_IO [20]PCLK1394 [19]PCLK_H8 [21]
CLK_ICHAPIC [13]SUSA#[14,21]PCI_STP#[14]CPU_STP#[14]
SDATA_B [8]
SCLK_A [8]
SDATA_A [8]
SCLK_B [8]
SMB_ICHCLK[14,28]SPDMUX0[14]SPDMUX1[14]
SMB_ICHDATA[14,28]
VIDVCC_GD[4,14,27]
SUSB[22,23]
PCLKUSB [30]
CK_SMCLK
Z0736
Z0735
CK_SMDATA
Z0712
Z0709Z0710
Z0711
Z0708Z0707
Z0730
Z0731
Z0723Z0704
Z0732
Z0737VDD48
Z0720
Z0705
VDDCPU
Z0729Z0728Z0727
Z0721
Z0722
VDDCPU
VDD48
Z0717Z0718
Z0716Z0715Z0714Z0713
Z0719
F2
Z0724
Z0725Z0726
F0
F0
F2
Z0701Z0702Z0703
CK_SMCLK
CK_SMDATAZ0733
Z0734
Z0706
Z0738
TZ0701
C674
10p_R
R55449.9_1%
R208 33R573 33
C269
1000PF
C270
0.1u_X7R
R553 33R552 33
C713
4.7u/25V
C675
10p_R
L570_1206
C667
10p_R
C1500.1U
R575 33
R577 33
C699 10p_R
R564576_1%
C712
10p_R
C696
10p_R
C711
10p_R
C271
0.1u_X7R
C695
10p_R
C266
10p_R
C697
10p_RR604 1K
R571 33
R95 *0
C692
10p_R
R572 33
R9610K
C694
10p_R
C693
10p_R
R570 33
R11310K
R557 2.7K
+C157
47UF/6.3V_D
R? 33
R17310K
R5321K
U11
QS3253
6543
10111213
79
1421
15
16
8
1A2A3A4A
1B2B3B4B
YAYB
S0S1AOE#BOE#
VCC
GND
C?
10p_RR622
220
C267
0.1u_X7R
R606
10K
R224*0
R576 33
R574 33
C698 10p_R
R55549.9_1%
R551 1KR556 1K
R594
1M
Y4
14.318MHZ
12
C74833P
C74733P
R15249.9_1%
U18
ICS950805/W320-04
49
15202731364147
46
53
1
814
1932
26
28
23
24
49
56
10111213161718
5455
5
29 3938
25
3335
2122
34
42
45
48
51
44
40
50
52
7
30
2
6
43
3
37
GNDGNDGNDGNDGNDGNDGNDGNDGND
VDDCPU
CPU_STOP#
VDDREF
VDDPCIVDDPCI
VDD3V66VDD3V66
VDDA
VTT_PWRGD#
3V66_4/66MHz_OUT2
3V66_5/66MHz_IN
CPUCLKT1
REF
PCICLK0PCICLK1PCICLK2PCICLK3PCICLK4PCICLK5PCICLK6
FS0FS1
PCICLK_F0
SDATA 48MHz_USB48MHz_DOT
PD#
3V66_0VCH_CLK/3V66_1
3V66_2/66MHz_OUT03V66_3/66MHz_OUT1
PCI_STOP#
IREF
CPUCLKT2
CPUCLKC1
CPUCLKC0
CPUCLKC2
FS2
VDDCPU
CPUCLKT0
PCICLK_F2
SCLK
X1
PCICLK_F1
MULTSEL0/REF0
X2
VDD48
R207 33
R172 10K
C264
0.1u_X7R
R15149.9_1%
L61
HCB2012K-121T30CT9
10u/10V
T41T40
T39
R15049.9_1%
C214
0.1u_X7R
C265
1000PF
C268
1000PF
R14949.9_1%
L54
HCB2012K-121T30
1 2
L55
HCB2012K-121T30
1 2
C19810U/10V
C263
0.1u_X7R
C2110.1UF
R590 33
C19710U/10V
C2120.1UF
Q282N7002G
D
S
R605 *0
R168 33
R170 33
R531 *0
R169 33
R174 *0
R565 33R566 33
R11510K
R114
10K
R171 33
R98
10K
R97
10K
C262
1000PF
C213
0.1u_X7R
R11610K
R48110K
R533 33
+3V [4,10,12,13,14,15,17,18,19,21,22,23,25,26,27,29]V_CORE [3,4,5,14,15,27]
Iref=2.32mA
66.66
66.66
133
CPU
33.33
66.6666.660
Mid
Mid
1
1
0
(MHz)
66.66
200
10
(FS1)
33.33
0
PCI(MHz)
100
0
0
0
1
33.33
1
66.66
0
Mid
66.66
200
1
0
1
1
33.33
1
(FS0)
0
01
Mid
133
0 66.66
1
0
(MHz)
1
(MHz)3V66
66.660
10 66.66
1
0
1
1
(FS2)
100
FREQUENCY SETUP TABLE66MHz OUT
66.6666.6666.6666.6666MHz_IN66MHz_IN66MHz_IN66MHz_IN
66MHz_IN/266MHz_IN/266MHz_IN/266MHz_IN/2
VREG FEATURE
CONNECT TO PIN 41 GND
IF CL=18PF DEL C35,36
POSCAP
7/18
7/23
Schematic Diagrams
B - 8 DDRAM (71-56P00-D05)
S
c
h
e
m
a
t
i
c
D
i
a
g
r
a
m
s
DDRAM
+3VS+3VS
+2.5V
+2.5V+2.5V
MVREF_DIM
+2.5V
+2.5V
+2.5V
MVREF_DIM
MVREF_DIM
+5V
CKE2 [6,9]
CS1#[6,9]
CKE1[6,9]
CS0#[6,9]
DCLK1[6]DCLK0[6]
DCLK1#[6]
CKE0[6,9]
DCLK0#[6]
CS2# [6,9]
CKE3 [6,9]
DCLK3 [6]DCLK4 [6]DCLK4# [6]
CS3# [6,9]
DCLK3# [6]
SDATA_B [7]SCLK_B [7]
DQS#[0..8] [9]
MD[0..63][9]
MAAF[0..12][6]
DCLK5 [6]DCLK5# [6]
DCLK2[6]
BA0[6]BA1[6]
SCASA#[6]SWEA#[6]
SRASA#[6]BA0_1 [9]BA1_1 [9]SRASA#1 [9]SWEA#1 [9]SCASA#1 [9]
SCLK_A[7]SDATA_A[7]
DCLK2#[6]
MAAS[0..12] [9]
DQM#[0..7][6,9]
MD[0..63]
SCLK_BSDATA_B
Z0802
Z0820
BA0_1BA1_1
BA0BA1
BA0_1BA1_1
SWEA#SCASA#
SRASA# SRASA#1
SCASA#1SWEA#1
SWEA#1SCASA#1
SRASA#1
MD9
MD21
MD63
DQS#2
DQS#5
DQS#8DQS#7MD36
SCASA#
BA0
MD10
MD34
MD39
MD57
SRASA#
MD3
MD16
MD26
MD55
MD59
SWEA#
MD5
MD19
MD22
MD24
MD29
MD53
MD58
MD60
Z0816
DQS#4 DQS#4
DQS#8
MD47
DQS#1
DQS#6
BA1
MD42
MD45
MD50
MD4
MD13
MD43
MD48
MD51
Z0818
MD0
MD6
MD14
MD61
DQS#7
MD20
MD23
MD37
MD62
DQS#6
DQS#1
MD35
DQS#3
MD8
MD11
MD17
MD27
MD33
MD38
MD40MD41
MD56
MD7
MD12
MD15
MD18
MD25
MD30
MD54
MD1
DQS#0
DQS#2
MD28
MD31MD32
MD52
DQS#0
DQS#3
MD46
DQS#5
MD44
MD49
Z0819
MD2
Z0817
DDRRST
Z0801
MAAF0MAAF1MAAF2MAAF3MAAF4MAAF5MAAF6MAAF7MAAF8MAAF9MAAF10MAAF11MAAF12
TZ0807TZ0808TZ0809
TZ0811TZ0810
TZ0812
TZ0813
MAAS11
MAAS5MAAS6
MAAS12
MAAS4
MAAS1MAAS0
MAAS3
MAAS10
MAAS7MAAS8
MAAS2
MAAS9
MAAF8
MAAF3
MAAS11
MAAF9
MAAS0
MAAS6 MAAF6
MAAF11
MAAS2
MAAF5
MAAS7
MAAF0
MAAS10
MAAS8
MAAF7
MAAS5
MAAS9
MAAS1
MAAF4
MAAS3
MAAF12
MAAS4
MAAF1MAAF2
MAAF10
MAAS12
DQM#6
DQM#3
DQM#0
DQM#4
DQM#2
DQM#5
DQM#7
DQM#1 DQM#1
DQM#5DQM#6DQM#7
DQM#0
DQM#4DQM#3DQM#2
Z0821
MVREF_DIMMVREF_DIM
MVREF_DIM+
-