-
l in
velaratel intheridls. Ttpu, theonsng t
ave drnd hid highformeof ou
d currrters a
and
By auxiliary circuits, the transferred current or power can be
con-trolled accurately, but the additional feedback control
strategiesare also needed, so the control of these converters
becomes morecomplicated, and converters are less reliable.
2 so that trter is V = V
By opening and closing the switches of H1 and H2 appropthe
output voltage V1 and V2 can be made equal to +Vdc, 0, oTherefore,
the output voltage of the inverter can have the+Vdc, +Vdc/2, 0,
Vdc/2, Vdc. The ring instants can be obtainedby using phase
disposition multicarrier PWM technique.
Voltage balancing using resonant switched capacitor
converter
Fig. 2 shows a system conguration of a three-phase diodeclamped
ve-level inverter equipped with RSCC voltage balancing
Corresponding author. Tel.: +91 9495686300.E-mail addresses:
[email protected] (K.S. Gayathri Devi), aruns@
amaljyothi.ac.in (S. Arun), [email protected] (C.
Sreeja).
Electrical Power and Energy Systems 63 (2014) 363372
Contents lists availab
Electrical Power an
journal homepage: www.eladding some auxiliary balancing circuits
[8,9,16] and (3) improvingthe control method by selecting redundant
switching states, [4,10].
the output of the second H-bridge is denoted by Vput of this two
DC source cascade multilevel
invehttp://dx.doi.org/10.1016/j.ijepes.2014.05.0530142-0615/ 2014
Elsevier Ltd. All rights reserved.he out-1 + V2.riately,r
Vdc.values,Among the basic multilevel inverters the problem of
voltageunbalance of dc link capacitors exists inherently in the
diode-clamped converter topology [13,15], which limits the further
appli-cation [5] of it, especially at the level above three. To
balance thevoltage of DC link series capacitors, three main
approaches havebeen proposed. They are: (1) using separate DC
sources, [3,7], (2)
where n is the number of levels of output voltage. To operate a
cas-cademultilevel inverter [3,7] using a single DC source, it is
proposedto use capacitors as the DC sources for all but the rst
source. Con-sider a simple inverter with two H-bridges as shown in
Fig. 1.
Each H-bridge has a DC power source with an output voltage
ofVdc. The output voltage of the rst H-bridge is denoted by V1
andIntroduction
Recently, multilevel inverters [6] hest in the eld of
high-voltage abecause it can realize high voltage anlow-voltage
switches without transbalance circuits, with the numberharmonics of
the output voltage anEM1 are decreasing Multilevel
invediode-clamped, capacitor-clampedinverters.awn tremendous
inter-gh-power applicationspower output through
r and dynamic voltagetput level increasing,ent are decreasing
andre mainly classied as
cascaded H-bridge
Voltage balancing techniques
Cascaded H-bridge inverter
AmultilevelCHBconsistsof anumberofH-bridgecells connectedin
seriesperphase, andeachmodule requires a separateDCsource
togenerate voltage levels at the output of inverter. The output of
eachbridge is +Vdc, 0 andVdc and the combinations of the output
volt-ages of series connected bridges give the total output
voltage.According to the number of bridges the number of levels of
the out-put voltage changes. The number of bridges is equal to (n
1)/2Comparative study on different ve leve
K.S. Gayathri Devi , S. Arun, C. SreejaDept. of Electrical &
Electronics, Amal Jyothi College of Engineering, Kottayam,
India
a r t i c l e i n f o
Article history:Received 30 July 2013Received in revised form 17
May 2014Accepted 20 May 2014Available online 3 July 2014
Keywords:Diode clamped inverterMultilevel inverterPulse width
modulationSwitched-capacitor converter
a b s t r a c t
The diode-clamped multilecan be solved by using seplation
control in three-levsources is not viable andimplement. Hence the
Hybcan be used for higher levevoltage. The boosting of ouformer or
even eliminate itiumhigh voltage applicatiwith other voltage
balanciverter topologies
topology has the problem of voltage unbalance of dc link
capacitors. Thise DC sources, or adding auxiliary circuits or
adopting space vector modu-verter applications. For higher level
applications, the use of separate DCcontrol techniques for other
two methods will be more complicated toMultilevel Inverter Based on
Switched-Capacitor and Diode-Clamped unitshis topology can balance
the capacitor voltage and also step up the outputt voltage
contributes to lessen the transformation ratio of the input
trans-reby reducing the cost, which will benet the design of
converters in med-. The topology is simulated using MAT lab
simulink software and comparedechniques.
2014 Elsevier Ltd. All rights reserved.
le at ScienceDirect
d Energy Systems
sevier .com/locate / i jepes
-
er an364 K.S. Gayathri Devi et al. / Electrical Powcircuits [8].
The dc link consists of four dc capacitors C1C4, and it isconnected
to a three-phase diode rectier. The rectier keeps thetotal voltage
across the four dc capacitors as 4Vdc, but each capac-itor voltage
may deviate from Vdc. Therefore, two voltage-balanc-ing circuits
are employed to balance their voltages. One isconnected to C1 and
C2, and the other is connected to C3 and C4Symmetrical operation of
the ve-level inverter makes it possibleto maintain the voltage of
node M at the center of the dc-linkvoltage.
While considering the section between P2 and M, the
circuitconsists of two half-bridge inverters with four switching
devicesS1S4 and a series resonant circuit Lr and Cr. The dc
terminals ofthe half-bridge inverters are connected in parallel
with the dccapacitor, while an ac terminal is connected to the
other onethrough the series resonant circuit. Dc voltage source
2Vdc keepsthe total capacitor voltage vC1 + vC2 as 2Vdc. When the
vC2 decreasesby some cause, the dc voltage source supplies an
amount of powerto both C1 and C2, and then vC1 increases. The
voltage balancing cir-cuit ows a positive current in iPB to
discharge C1 and to charge C2.The four switching devices enables
the bidirectional power ow
Fig. 1. Five level H-
Fig. 2. Five level Dd Energy Systems 63 (2014) 363372from C1 to
C2 or opposite direction. The circuit essentially acts asa
switched-capacitor converter or a charge pump circuit, whichstores
transferred energy in the resonant capacitor Cr, instead ofan
inductor. The resonant inductor Lr makes it possible to suppressthe
spike currents, power losses, and electromagnetic noises.
All switching devices are operated with a 50% duty ratio,
buttheir switching frequency is higher than the resonant
frequencyof the resonant circuit. Therefore, the resonant circuit
acts asinductive impedance. The amplitude of the resonant current
bymeans of phase shift between the two half bridge inverters.
Theproposed method delays S3 and S4 from S1 and S2 for a
phase-shifttime T1. Power Prscc will be maximum when the value of
T1 liesbetween Tsw/4 and +Tsw/4 where Tsw is the time
correspondingto the switching frequency of RSCC.
Hybrid Multilevel Inverter Based on Switched Capacitor and
DiodeClamped units
The circuit diagram of three-phase topology [1,2] is deduced
bycombination of three HMI-BSD single-leg circuits sharing
common
bridge inverter.
CI with RSCC.
-
dc link capacitors, shown in Fig. 3. All the elements sustain
thesame voltage stresses, which equal 1/(n 1)of the dc link
voltage.
Principle of operationA single-leg ve-level inverter topology
based on HMI-BSD is
shown in Fig. 4. The topology can be divided into two parts,
whichare, respectively, indicated by a dash dotted frame and a
dashedframe. Part 1 is called switched-capacitor part and part 2 is
calleddiode-clamped part. The switched-capacitor part is composed
ofthe dc link capacitors (C1, C2), the ying capacitors (C3, C4,
C5),and the clamping switching devices (Sc1, Sc6). And the
diode-clamped part is composed of the ying capacitors (C3, C4, C5),
theclamping diodes (Dc1, Dc6), and the main switching devices(S1,
S6). It can be seen clearly that both parts include the
yingcapacitors C3, C4, and C5.
The diode-clamped part is a classical four-level
diode-clamped
c1 c6
divided into two groups: Group A and Group B.
When the HMI-BSD operates under the condition of a
lowermodulation ratio (M < 0.5), the output voltages will change
from
K.S. Gayathri Devi et al. / Electrical Power and Energy Systems
63 (2014) 363372 365Group A includes Sc1, Sc3, and Sc5, and Group B
includes Sc2, Sc4,and Sc6. The control signals for the switching
devices of the samegroup are identical. When the switching devices
of Group A areswitched ON, those of Group B are switched OFF, and
vice versa.The switching devices of the two groups are switched ON
or OFFalternately. If the switching devices of Group A are ON and
thoseof Group B are OFF C1 is paralleled with C3, and C2 is
paralleled withC4.
Table 1 shows the relationships between the output voltage Voand
the working states, where Udc is the voltage of one dc
linkcapacitor. The switched-capacitor part not only contributes to
bal-ance the DC link capacitors, but also participates in the
synthesis ofthe output voltage levels by the common connection of
the yingcapacitors with the diode-clamped part. In this case,
theHMI-BSD can output ve kinds of voltage levels with only
aconventional four-level diode-clamped topology.
Voltage balance of capacitorsIf only the diode-clamped part of
the HMI-BSD works without
the switched-capacitor part [12], the voltages of capacitors
wouldbe unbalanced due to the asymmetric charge current and
dischargecurrent through capacitors. The switched-capacitor part
plays atopology with four kinds of working states and four kinds of
outputvoltage levels. Among the main switching devices S1, S6, only
threeswitching devices in succession are switched on in each
workingstate. And (S1, S4), (S2, S5), and (S3, S6) are
complementary switch-ing pairs. The switched-capacitor part
operates with two kinds ofworking states. The clamping switching
devices S , S can beFig. 3. Three phase vrole in balancing the
voltages of capacitors by alternativeconduction of the clamping
switches Sc1Sc6.
When the switching devices of Group A are ON and those ofGroup B
are OFF, C1 and C3, C2 and C4 are in parallel, respectively,so VC1
= VC3 and VC2 = VC4. When the switching devices of Group Bare ON
and those of Group A are OFF, C1 and C4, C2 and C5 are inparallel,
respectively, so VC1 = VC4 and VC2 = VC5. If the switchingdevices
of Group A are turned from ON to OFF, and from OFF toON over and
over again, then VC1 = VC2 = VC3 = VC4 = VC5. That isto say, each
capacitor can keep voltage balance through the yingcapacitor C4.
Actually, the capacitor C4 acts as the second spiker,which is in
parallel with different dc link capacitors in differentswitching
states. So long as Group A or Group B can switch oncein one period,
the voltages of the capacitors can keep balance.
As seen from Table 1, the switching devices of Group B or GroupA
are ON for one working state and OFF for the other working
state.Accordingly, there exist two kinds of working states
combination,shown in Tables 2 and 3.
It can be seen from Table 2 that for the rst working states
com-bination, the switching devices of group B are turned ON
onlywhen the highest output level (+2Vdc) appears and turned
OFFwhen other four levels appear. The pulse width modulation(PWM)
[11,14] carriers arrangement for this working states combi-nation
is shown in Fig. 5(a). As seen from Fig. 5(a), every carrierband
from top down corresponds to Group B, S1, S2 and S3 in turn.
Fig. 4. Single-leg of ve-level HMI-BSD.e-level HMI-BSD.
-
Table 1Relationships between the output voltage V0 and the
working states.
No. of working states Output level Vo S1 S2 S3 S4 S5 S6 Group A
Group B
1 +2Vdc 1 1 1 0 0 0 0 1
2 +1Vdc 1 1 1 0 0 0 1 03 0 1 1 1 0 0 0 1
4 0Vdc 0 1 1 1 0 0 1 05 0 0 1 1 1 0 0 1
6 1Vdc 0 0 1 1 1 0 1 07 0 0 0 1 1 1 0 1
366 K.S. Gayathri Devi et al. / Electrical Power and Energy
Systems 63 (2014) 3633728 2Vdc 0 0
Table 2First kind of working states combination for HMI-BSD.
No. of working states Output level Vo S1 S2
1 +2Vdc 1 12 +1Vdc 1 14 0Vdc 0 16 1Vdc 0 08 2Vdc 0 0
Table 3Second kind of working states combination for
HMI-BSD.
No. of working states Output level Vo S1 S2
1 +2Vdc 1 13 +1Vdc 0 15 0Vdc 0 07 1Vdc 0 0ve levels to three
levels, i.e., the highest output level cannot berealized for the
lower modulation index, and then Group B will losethe chance of
being turned ON and being turned OFF all the time. Inthe like
manner, for the second working states combination listedin Table 3,
the switching devices of Group B are turned OFF onlywhen the lowest
output level (2Vdc) appears and turned ON forthe other four output
levels appear. The carriers arrangement forthis working states
combination is shown in Fig. 5(b). As seen fromFig. 5(b), every
carrier band from top down corresponds to theswitching devices S1,
S2, S3, and Group B in turn. When the modu-lation ratio is less
than 0.5, the lowest level cannot be realized,andthen Group B will
have no chance to be turned OFF and beturned ON all the time.
The capacitor voltage balancing can be realized only when
theswitching devices of Group B are turned on and off
alternately;otherwise, the voltage balancing in capacitors will be
broken underthe condition of a lower modulation ratio. So these two
kinds ofworking states combination must be considered together to
ensurethe normal operation of the HMI-BSD within the wider range
ofmodulation degree (even less than 0.5). As a result, the
switching
8 2Vdc 0 0
Fig. 5. PWM carriers for rst and s0 1 1 1 1 0
S3 S4 S5 S6 Group A Group B
1 0 0 0 0 11 0 0 0 1 01 1 0 0 1 01 1 1 0 1 00 1 1 1 1 0
S3 S4 S5 S6 Group A Group B
1 0 0 0 0 11 1 0 0 0 11 1 1 0 0 10 1 1 1 0 1devices of Group B
are turned ON over one switching period andturned off over the next
switching period so that, the ying capac-itors are, respectively,
connected in parallel with the differentcapacitors alternately to
ensure the realization of self-voltage bal-ancing mechanism of
capacitors.
According to the aforesaid analysis, by rearranging the
carrierwaveforms, the special carrier waveforms of the switching
devicesfor the HMI-BSD are shown in Fig. 7. The carrier waves for
the threemain switches are shown in Fig. 6(a)(c) and Fig. 6(d)shows
thecarrier wave for switching devices of group B. By applying the
spe-cial carriers in Fig. 6 to the SPWMmethod, the switching
devices ofGroup A and Group B will be alternately turned ON or OFF
by peri-ods, thus balancing the voltages in capacitors. This
balance schemedoes not need complex control strategy, and is
adaptive to all kindsof loads.
Realization of stepping up the output voltageIn view of the
symmetry of the positive and negative output
levels of the HMI-BSD, the two input terminals of the DC
sourceshould be on the output terminals symmetry, so for a
single-leg
0 1 1 1 1 0
econd kind of working states.
-
er anK.S. Gayathri Devi et al. / Electrical Powve-level HMI-BSD,
there are three modes of connection of theinput DC source, as shown
in Fig. 7(a)(c) The positive and negativeterminals of the DC source
are, respectively, connected with (1) thepositive terminal of C1
and the negative terminal of C2; (2) thepositive terminal of C3 and
the negative terminal of C5; (3) thepositive and the negative
terminals of C4.
If the HMI-BSD is in three-phase operation, the input DC
sourceterminals should be only connected to the DC link
capacitorsinstead of the ying capacitors because of the symmetry of
the
Fig. 6. Carrier waveforms of t
Fig. 7. Three modes of connectio
Fig. 8. Output voltage of FIVE led Energy Systems 63 (2014)
363372 367three-phase topology. And for a ve-level topology, only
the con-nection mode 1 can be used. The function of boosting the
outputvoltage of the HMI-BSD contributes to lessening the
transforma-tion ratio of the input transformer, thereby reducing
the cost, evento eliminate the input transformer, which will benet
the design ofconverters in mediumhigh voltage application. On the
other hand,compared to the conventional switched-capacitor
topology, lessswitching devices and dc link capacitors are needed
in the HMI-BSD, which can also reduce the production cost in
applications.
he switching devices [2].
n of the input DC Source [2].
vel diode-clamped inverter.
-
er an368 K.S. Gayathri Devi et al. / Electrical PowSimulations
and results
The simulation of diode-clamped ve level inverter had donewith
180 V DC input voltage and sinusoidal pulse width modula-tion at
0.5 modulation index. The output obtained has ve stepsand each step
differ by a voltage of 50 V. That is the ve levels
Fig. 9. Capacitor voltage of ve le
Fig. 10. FFT analysis
Fig. 11. Output voltage of casd Energy Systems 63 (2014)
363372obtained are 0 V, 45 V, 90 V, 135 V and 180 V. The switching
fre-quency is 5 kHz. Figs. 8 and 9 shows the output voltage and
capac-itor voltage of ve level diode clamped inverter.
From Fig. 10 it can be observed that the voltage of capacitors
1,and 4 are increasing to 90 while the voltage across capacitors 2
and3 are decreasing to 20 V. From Fig. 10 it can be observed that
the
vel diode-clamped inverter.
of ve level DCI.
caded H-bridge inverter.
-
er anK.S. Gayathri Devi et al. / Electrical Powvoltage across
the capacitors are unbalanced due to the chargingand discharging of
the capacitors. Hence the capacitor voltageshould be balanced.
Fig. 10 shows the FFT analysis of ve level DCI. The THD
is25.18%. The harmonics other than fundamental are below 5%.
The rst method of capacitor voltage balancing is using
separateDC sources. If the capacitors in the DCI are replaced with
DC
Fig. 12. DC link voltage of cas
Fig. 13. FFT analysis of ve
Fig. 14. Output voltage of d Energy Systems 63 (2014) 363372
369sources the voltage will be balanced but for this each level
requiresa separate DC source and is expensive. Another method that
usesseparate DC sources are called cascaded H-bridge inverter.
Thisneeds separate DC sources for each bridge. The simulation of
cas-caded H-bridge inverter is donewith 110 V DC input to each
bridge.Phase disposition SPWM is used for generating gate pulses
and thecarrier frequency is 5 kHz. The output voltage is shown in
Fig. 11.
caded H-bridge inverter.
level H-bridge Inverter.
ve level DCI with RSCC.
-
Fig. 15. Capacitor voltage with RSCC.
Fig. 16. FFT analysis of ve level DCI with RSCC.
Fig. 17. Output voltage of HMI-BSD at5 kHz.
370 K.S. Gayathri Devi et al. / Electrical Power and Energy
Systems 63 (2014) 363372
-
Fig. 18. Output voltage of HMI-BSD at 1 kHz Switching
Frequency.
Fig. 19. Capacitor voltage of ve level HMI-BSD.
Fig. 20. FFT analysis of ve level HMI-BSD.
K.S. Gayathri Devi et al. / Electrical Power and Energy Systems
63 (2014) 363372 371
-
transformer and balance the capacitor voltages. The THD is
veryless compared to other methods.
Table 4Comparison of different ve level topologies.
HMI- DCI with CHB DCI
372 K.S. Gayathri Devi et al. / Electrical Power and Energy
Systems 63 (2014) 363372The output voltage of a phase is the sum of
output voltages ofindividual bridges belong to the corresponding
phase. The voltageacross the DC link is shown in Fig. 12.
Fig. 13 shows the FFT analysis of ve level cascaded
H-bridgeinverter. The THD is 18.4%. The harmonic components except
fun-damental are below 5%.
The voltage balancing technique using resonant switchedcapacitor
[8] had simulated with 180 V dc input and phase shiftcontrol. The
output voltage has ve steps each differ by 45 V. Thevalue of
resonant capacitor Cr and inductor Lr are 10 lF and10 lH
respectively. The ying capacitors are of 6600 lF and theswitching
frequency of RSCC and carrier frequency of inverter are30 kHz and 5
kHz respectively.
Figs. 14 and 15 shows the output voltage and ying
capacitorvoltage of ve level diode-clamped inverter with RSCC
voltage bal-ancing technique. From Fig. 16 it can be observed that
the capacitorvoltage is balanced and maintained at 45 V.
The FFT analysis of ve level DCI with RSCC is shown in Fig.
16.The THD is 18.19%. The harmonic components except fundamentalare
less than 5%.
The simulation parameters of HMI-BSD are set as follows: Thedc
input voltage is 180 V; the capacitances of all capacitors are2200
lF; the load resistance is 20X; the working frequency is1 kHz; the
modulation ratio is 0.95. The input DC source terminalsare
connected to the positive terminal of C1 and the negative ter-minal
of C2 The simulation is done for 5 kHz switching frequencyand as
well as 1 kHz switching frequency. If 1 kHz switching fre-quency is
considered, the switching losses can be reduced in prac-tical
applications. Figs. 17 and 18 shows the output voltage at5 kHz and
1 kHz frequency respectively.
It can be observed from Figs. 17 and 18 that the output
voltageis stepped up to 360 V with the help of switched capacitor
part. Theoutput has ve levels in which each level differs by 90 V.
Also it canbe observed from Fig. 19 that the voltage across all the
capacitors
BSD RSCC
DC Link Capacitors 2 0 0 4Flying Capacitors 3 4 0 0Resonant
capacitors 0 2 0 0Inductors 0 2 0 0Diodes 4 6 0 6No. of main
switching devices 6 8 8 8No. of clamping switching
devices6 8 0 0
No. of DC sources 1 1 2 1THD in % 17.42 18.19 18.42 25.18(both
DC link capacitors and ying capacitors) are balanced andmaintained
at 90 V.
Fig. 20 shows the FFT analysis of ve level HMI-BSD. The THD
is17.42% and the harmonic components other than fundamental areless
than 5%.
The components required per phase is given in Table 4. Fromthe
results and circuit congurations it can be understand thatthe
voltage balancing using auxiliary circuit need additional
circuitand control complexity because the current and voltage has
to besensed for control purpose. But HMI-BSD has only simple
controltechnique as well as it can reduce the transformation ratio
of inputConclusion
The structure and the principle of operation of Hybrid
Multi-level Inverter Based on Switched Capacitor and Diode
Clampedunits are introduced. The switched-capacitor circuits are
appliedto balance the voltage of dc link capacitors and ying
capacitors,as well as participate in synthesizing the output
voltage levels.Both advantages of the switched-capacitor and the
diode-clampedcircuits are included in the HMI-BSD by the
combination of the twocircuits. Not only this new topology balances
dc link capacitors, butalso it can step up the output voltage with
kinds of boostingmodes, which will contribute to lessen the turns
ratio of the inputtransformer, even to eliminate it. In conclusion,
the application ofthe switched-capacitor circuit in the HMI-BSD can
reduce the costto a certain extent. The HMI-BSD can operate
effectively under thethree-phase condition. Finally, the validity
of the HMI-BSD is veri-ed by the simulation of ve level HMI-BSD and
compared withother ve level topologies used for voltage
balancing.
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Comparative study on different five level inverter
topologiesIntroductionVoltage balancing techniquesCascaded H-bridge
inverterVoltage balancing using resonant switched capacitor
converterHybrid Multilevel Inverter Based on Switched Capacitor and
Diode Clamped unitsPrinciple of operationVoltage balance of
capacitorsRealization of stepping up the output voltage
Simulations and resultsConclusionReferences