2007 Microchip Technology Inc. DS21827D-page 1 25AA040A/25LC040A Device Selection Table Features: • Max. Clock 10 MHz • Low-Power CMOS Technology: - Max. Write Current: 5 mA at 5.5V, 10 MHz - Read Current: 5 mA at 5.5V, 10 MHz - Standby Current: 5 A at 5.5V • 512 x 8-Bit Organization • Write Page mode (up to 16 bytes) • Sequential Read • Self-timed Erase and Write Cycles (5 ms max.) • Block Write Protection: - Protect none, 1/4, 1/2 or all of array • Built-in Write Protection: - Power-on/off data protection circuitry - Write enable latch - Write-protect pin • High Reliability: - Endurance: 1,000,000 Erase/Write cycles - Data retention: > 200 years - ESD protection: > 4000V • Temperature Ranges Supported: • Pb-free Packages Available Pin Function Table Description: The Microchip Technology Inc. 25XX040A* is a 4 Kbit Serial Electrically Erasable Programmable Read-Only Memory (EEPROM). The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS ) input. Communication to the device can be paused via the hold pin (HOLD ). While the device is paused, transi- tions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts. The 25XX040A is available in standard packages including 8-lead PDIP and SOIC, and advanced packages including 8-lead MSOP, 8-lead TSSOP and rotated TSSOP, 8-lead 2x3 DFN, and 6-lead SOT-23. Package Types (not to scale) Part Number VCC Range Page Size Temp. Ranges Packages 25AA040A 1.8-5.5V 16 Bytes I P, MS, SN, ST, MC, OT 25LC040A 2.5-5.5V 16 Bytes I, E P, MS, SN, ST, MC, OT - Industrial (I): -40 C to +85 C - Automotive (E): -40 C to +125 C Name Function CS Chip Select Input SO Serial Data Output WP Write-Protect VSS Ground SI Serial Data Input SCK Serial Clock Input HOLD Hold Input VCC Supply Voltage CS SO WP VSS 1 2 3 4 8 7 6 5 VCC HOLD SCK SI PDIP/SOIC (P, SN) CS SO WP VSS 1 2 3 4 8 7 6 5 VCC HOLD SCK SI CS SO WP VSS 1 2 3 4 8 7 6 5 VCC HOLD SCK SI TSSOP/MSOP (ST, MS) X-Rotated TSSOP HOLD VCC CS SO 1 2 3 4 8 7 6 5 SCK SI VSS WP (X/ST) VSS 1 2 3 4 6 5 VDD CS SO (OT) SOT-23 SCK SI CS SO WP VSS 1 2 3 4 8 7 6 5 VCC HOLD SCK SI (MC) DFN 4K SPI Bus Serial EEPROM *25XX040A is used in this document as a generic part number for the 25AA040A and the 25LC040A.
28
Embed
4K SPI Bus Serial EEPROM · Serial Electrically Erasable Programmable Read-Only Memory (EEPROM). The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
- Max. Write Current: 5 mA at 5.5V, 10 MHz- Read Current: 5 mA at 5.5V, 10 MHz- Standby Current: 5 A at 5.5V
• 512 x 8-Bit Organization• Write Page mode (up to 16 bytes)• Sequential Read • Self-timed Erase and Write Cycles (5 ms max.)• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array• Built-in Write Protection:
- Power-on/off data protection circuitry- Write enable latch- Write-protect pin
• High Reliability:- Endurance: 1,000,000 Erase/Write cycles - Data retention: > 200 years- ESD protection: > 4000V
• Temperature Ranges Supported:
• Pb-free Packages Available
Pin Function Table
Description:The Microchip Technology Inc. 25XX040A* is a 4 KbitSerial Electrically Erasable Programmable Read-OnlyMemory (EEPROM). The memory is accessed via asimple Serial Peripheral Interface (SPI) compatibleserial bus. The bus signals required are a clock input(SCK) plus separate data in (SI) and data out (SO)lines. Access to the device is controlled through a ChipSelect (CS) input.
Communication to the device can be paused via thehold pin (HOLD). While the device is paused, transi-tions on its inputs will be ignored, with the exception ofChip Select, allowing the host to service higher priorityinterrupts.
The 25XX040A is available in standard packagesincluding 8-lead PDIP and SOIC, and advancedpackages including 8-lead MSOP, 8-lead TSSOPand rotated TSSOP, 8-lead 2x3 DFN, and 6-leadSOT-23.
Package Types (not to scale)
Part Number VCC Range Page Size Temp. Ranges Packages
25AA040A 1.8-5.5V 16 Bytes I P, MS, SN, ST, MC, OT25LC040A 2.5-5.5V 16 Bytes I, E P, MS, SN, ST, MC, OT
- Industrial (I): -40 C to +85 C- Automotive (E): -40 C to +125 C
Name Function
CS Chip Select Input
SO Serial Data Output
WP Write-Protect
VSS Ground
SI Serial Data Input
SCK Serial Clock Input
HOLD Hold Input
VCC Supply Voltage
CSSOWPVSS
1234
8765
VCC
HOLDSCKSI
PDIP/SOIC(P, SN)
CSSOWPVSS
1234
8765
VCCHOLDSCKSI
CSSOWPVSS
1234
8765
VCCHOLDSCKSI
TSSOP/MSOP(ST, MS)
X-Rotated TSSOP
HOLDVCCCSSO
1234
8765
SCKSIVSSWP
(X/ST)
VSS
1
2
3 4
6
5VDD
CSSO
(OT)SOT-23
SCK
SI
CSSO
WPVSS
1234
8765
VCC
HOLDSCKSI
(MC)DFN
4K SPI Bus Serial EEPROM
*25XX040A is used in this document as a generic part number for the25AA040A and the 25LC040A.
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias ...............................................................................................................-40°C to 125°C
ESD protection on all pins ..........................................................................................................................................4 kV
TABLE 1-1: DC CHARACTERISTICS
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to thedevice. This is a stress rating only and functional operation of the device at those or any other conditions above thoseindicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for anextended period of time may affect device reliability.
DC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 5.5VAutomotive (E): TA = -40°C to +125°C VCC = 2.5V to 5.5V
Param.No. Sym. Characteristic Min. Max. Units Test Conditions
D001 VIH1 High-level Input Voltage
0.7 VCC VCC +1 V
D002 VIL1 Low-level InputVoltage
-0.3 0.3 VCC V VCC 2.7V (Note 1)
D003 VIL2 -0.3 0.2 VCC V VCC < 2.7V (Note 1)
D004 VOL Low-level OutputVoltage
— 0.4 V IOL = 2.1 mA
D005 VOL — 0.2 V IOL = 1.0 mA, VCC = 2.5V
D006 VOH High-level OutputVoltage
VCC -0.5 — V IOH = -400 A
D007 ILI Input Leakage Current
— ±1 A CS = VCC, VIN = VSS or VCC
D008 ILO Output Leakage Current
— ±1 A CS = VCC, VOUT = VSS or VCC
D009 CINT Internal Capacitance(all inputs and outputs)
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specificapplication, please consult the Total Endurance™ Model which can be obtained from our web site:www.microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycleis complete.
AC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 5.5VAutomotive (E): TA = -40°C to +125°C VCC = 2.5V to 5.5V
Param.No. Sym. Characteristic Min. Max. Units Test Conditions
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specificapplication, please consult the Total Endurance™ Model which can be obtained from our web site:www.microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycleis complete.
2.1 Principles of OperationThe 25XX040A is a 512-byte Serial EEPROMdesigned to interface directly with the Serial PeripheralInterface (SPI) port of many of today’s popularmicrocontroller families, including Microchip’s PIC®
microcontrollers. It may also interface with microcon-trollers that do not have a built-in SPI port by using dis-crete I/O lines programmed properly in firmware tomatch the SPI protocol.
The 25XX040A contains an 8-bit instruction register.The device is accessed via the SI pin, with data beingclocked in on the rising edge of SCK. The CS pin mustbe low and the HOLD pin must be high for the entireoperation.
Table 2-1 contains a list of the possible instructionbytes and format for device operation. All instructions,addresses and data are transferred MSb first, LSb last.
Data (SI) is sampled on the first rising edge of SCKafter CS goes low. If the clock line is shared with otherperipheral devices on the SPI bus, the user can assertthe HOLD input and place the 25XX040A in ‘HOLD’mode. After releasing the HOLD pin, operation willresume from the point when the HOLD was asserted.
2.2 Read SequenceThe device is selected by pulling CS low. The 8-bitREAD instruction is transmitted to the 25XX040Afollowed by a 9-bit address. The MSb (A8) is sent to theslave during the instruction sequence. See Figure 2-1for more details.
After the correct READ instruction and address are sent,the data stored in the memory at the selected addressis shifted out on the SO pin. Data stored in the memoryat the next address can be read sequentially bycontinuing to provide clock pulses to the slave. Theinternal Address Pointer is automatically incrementedto the next higher address after each byte of data isshifted out. When the highest address is reached(1FFh), the address counter rolls over to address 000hallowing the read cycle to be continued indefinitely. Theread operation is terminated by raising the CS pin(Figure 2-1).
2.3 Write SequencePrior to any attempt to write data to the 25XX040A, thewrite enable latch must be set by issuing the WRENinstruction (Figure 2-4). This is done by setting CS lowand then clocking out the proper instruction into the25XX040A. After all eight bits of the instruction aretransmitted, CS must be driven high to set the writeenable latch.
If the write operation is initiated immediately after theWREN instruction without CS driven high, data will notbe written to the array since the write enable latch wasnot properly set.
After setting the write enable latch, the user mayproceed by driving CS low, issuing a WRITE instruction,followed by the remainder of the address, and then thedata to be written. Keep in mind that the MostSignificant address bit (A8) is included in the instructionbyte for the 25XX040A. Up to 16 bytes of data can besent to the device before a write cycle is necessary.The only restriction is that all of the bytes must residein the same page. Additionally, a page address beginswith XXXX 0000 and ends with XXXX 1111. If theinternal address counter reaches XXXX 1111 andclock signals continue to be applied to the chip, theaddress counter will roll back to the first address of thepage and over-write any data that previously existed inthose locations.
For the data to be actually written to the array, the CSmust be brought high after the Least Significant bit (D0)of the nth data byte has been clocked in. If CS is drivenhigh at any other time, the write operation will not becompleted. Refer to Figure 2-2 and Figure 2-3 for moredetailed illustrations on the byte write sequence andthe page write sequence, respectively. While the writeis in progress, the STATUS register may be read tocheck the status of the WPEN, WIP, WEL, BP1 andBP0 bits (Figure 2-6). Attempting to read a memoryarray location will not be possible during a write cycle.Polling the WIP bit in the STATUS register is recom-mended in order to determine if a write cycle is inprogress. When the write cycle is completed, the writeenable latch is reset.
Note: Page write operations are limited to writingbytes within a single physical page,regardless of the number of bytesactually being written. Physical pageboundaries start at addresses that areinteger multiples of the page buffer size (or‘page size’) and, end at addresses that areinteger multiples of page size – 1. If aPage Write command attempts to writeacross a physical page boundary, theresult is that the data wraps around to thebeginning of the current page (overwritingdata previously stored there), instead ofbeing written to the next page as might beexpected. It is therefore necessary for theapplication software to prevent page writeoperations that would attempt to cross apage boundary.
2007 Microchip Technology Inc. DS21827D-page 7
25AA040A/25LC040A
BLOCK DIAGRAM
FIGURE 2-1: READ SEQUENCE
SISO
SCKCS
HOLDWP
STATUSRegister
I/O Control MemoryControlLogic
X
Dec
HV Generator
EEPROMArray
Page Latches
Y Decoder
Sense Amp.R/W Control
Logic
VCCVSS
TABLE 2-1: INSTRUCTION SET
Instruction Name Instruction Format Description
READ 0000 A8011 Read data from memory array beginning at selected address
WRITE 0000 A8010 Write data to memory array beginning at selected address
WREN 0000 x110 Set the write enable latch (enable write operations)
RDSR 0000 x101 Read STATUS register
WRSR 0000 x001 Write STATUS register
Note: A8 is the 9th address bit, which is used to address the entire 512 byte array.
x = don’t care.
SO
SI
SCK
CS
0 2 3 4 5 6 7 8 9 10 111
0 1A80000 1 A7 A6 A5 A4 A1 A0
7 6 5 4 3 2 1 0
Data OutHigh-impedance
A3 A2
Lower Address Byte
12 13 14 15 16 17 18 19 20 21 22 23
Instruction+Address MSb
25AA040A/25LC040A
DS21827D-page 8 2007 Microchip Technology Inc.
FIGURE 2-2: BYTE WRITE SEQUENCE
FIGURE 2-3: PAGE WRITE SEQUENCE
SI
CS
9 10 11
0 0A80000 1 7 6 5 4 3 2 1 0Data Byte
SCK0 2 3 4 5 6 71 8
Instruction+Address MSb Lower Address Byte
A7 A6 A5 A4 A3 A1 A0A2
12 13 14 15 16 17 18 19 20 21 22 23Twc
SOHigh-impedance
SI
CS
9 10 11
0 0A80000 1 7 6 5 4 3 2 1 0Data Byte 1
SCK0 2 3 4 5 6 71 8
SI
CS
33 34 35 38 39
7 6 5 4 3 2 1 0Data Byte n (16 max.)
SCK24 26 27 28 29 30 3125 32
7 6 5 4 3 2 1 0Data Byte 3
7 6 5 4 3 2 1 0Data Byte 2
36 37
Instruction+Address MSb Lower Address Byte
A7 A6 A5 A4 A3 A1 A0A2
12 13 14 15 16 17 18 19 20 21 22 23
2007 Microchip Technology Inc. DS21827D-page 9
25AA040A/25LC040A2.4 Write Enable (WREN) and Write
Disable (WRDI)The 25XX040A contains a write enable latch. SeeTable 2-4 for the Write-Protect Functionality Matrix.This latch must be set before any write operation will becompleted internally. The WREN instruction will set thelatch, and the WRDI will reset the latch.
The following is a list of conditions under which thewrite enable latch will be reset:
The Read Status Register instruction (RDSR) providesaccess to the STATUS register. See Figure 2-6 for theRDSR timing sequence. The STATUS register may beread at any time, even during a write cycle. TheSTATUS register is formatted as follows:
TABLE 2-2: STATUS REGISTER
The Write-In-Process (WIP) bit indicates whether the25XX040A is busy with a write operation. When set toa ‘1’, a write is in progress, when set to a ‘0’, no writeis in progress. This bit is read-only.
The Write Enable Latch (WEL) bit indicates the statusof the write enable latch and is read-only. When set toa ‘1’, the latch allows writes to the array, when set to a‘0’, the latch prohibits writes to the array. The state ofthis bit can always be updated via the WREN or WRDIcommands regardless of the state of write protectionon the STATUS register. These commands are shownin Figure 2-4 and Figure 2-5.
The Block Protection (BP0 and BP1) bits indicatewhich blocks are currently write-protected. These bitsare set by the user issuing the WRSR instruction, whichis shown in Figure 2-7. These bits are nonvolatile andare described in more detail in Table 2-3.
FIGURE 2-6: READ STATUS REGISTER TIMING SEQUENCE (RDSR)
7 6 5 4 3 2 1 0– – – – W/R W/R R RX X X X BP1 BP0 WEL WIP
W/R = writable/readable. R = read-only.
SO
SI
CS
9 10 11 12 13 14 15
1 100000 0
7 6 5 4 2 1 0
Instruction
Data from STATUS RegisterHigh-impedance
SCK
0 2 3 4 5 6 71 8
3
2007 Microchip Technology Inc. DS21827D-page 11
25AA040A/25LC040A2.6 Write Status Register Instruction
(WRSR)The Write Status Register instruction (WRSR) allows theuser to write to the nonvolatile bits in the STATUS regis-ter as shown in Table 2-2. See Figure 2-7 for the WRSRtiming sequence. Four levels of protection for the arrayare selectable by writing to the appropriate bits in theSTATUS register. The user has the ability to write-protectnone, one, two or all four of the segments of the array asshown in Table 2-3.
TABLE 2-3: ARRAY PROTECTION
FIGURE 2-7: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
BP1 BP0 Array AddressesWrite-Protected
0 0 none
0 1 upper 1/4(180h-1FFh)
1 0 upper 1/2(100h-1FFh)
1 1 all(000h-1FFh)
SO
SI
CS
9 10 11 12 13 14 15
0 100000 0 7 6 5 4 2 1 0
Instruction Data to STATUS Register
High-impedance
SCK
0 2 3 4 5 6 71 8
3
Note: An internal write cycle (TWC) is initiated on the rising edge of CS after a valid write STATUS registersequence.
25AA040A/25LC040A
DS21827D-page 12 2007 Microchip Technology Inc.
2.7 Data ProtectionThe following protection has been implemented toprevent inadvertent writes to the array:
• The write enable latch is reset on power-up• A write enable instruction must be issued to set
the write enable latch• After a byte write, page write or STATUS register
write, the write enable latch is reset• CS must be set high after the proper number of
clock cycles to start an internal write cycle• Access to the array during an internal write cycle
is ignored and programming is continued
2.8 Power-On StateThe 25XX040A powers on in the following state:
• The device is in low-power Standby mode (CS =1)
• The write enable latch is reset• SO is in high-impedance state• A high-to-low-level transition on CS is required to
enter active state
TABLE 2-4: WRITE-PROTECT FUNCTIONALITY MATRIX
WP(pin 3)
WEL(SR bit 1) Protected Blocks Unprotected Blocks STATUS Register
0 (low) x Protected Protected Protected
1 (high) 0 Protected Protected Protected
1 (high) 1 Protected Writable Writable
x = don’t care
2007 Microchip Technology Inc. DS21827D-page 13
25AA040A/25LC040A
3.0 PIN DESCRIPTIONSThe descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Chip Select (CS)A low level on this pin selects the device. A high leveldeselects the device and forces it into Standby mode.However, a programming cycle which is alreadyinitiated or in progress will be completed, regardless ofthe CS input signal. If CS is brought high during aprogram cycle, the device will go into Standby mode assoon as the programming cycle is complete. When thedevice is deselected, SO goes to the high-impedancestate, allowing multiple parts to share the same SPIbus. A low-to-high transition on CS after a valid writesequence initiates an internal write cycle. After power-up, a low level on CS is required prior to any sequencebeing initiated.
3.2 Serial Output (SO)The SO pin is used to transfer data out of the25XX040A. During a read cycle, data is shifted out onthis pin after the falling edge of the serial clock.
3.3 Write-Protect (WP)The WP pin is a hardware write-protect input pin.When it is low, all writes to the array or STATUSregisters are disabled, but any other operationsfunction normally. When WP is high, all functions,including nonvolatile writes, operate normally. At anytime, when WP is low, the write enable reset latch willbe reset and programming will be inhibited. However,if a write cycle is already in progress, WP going low willnot change or disable the write cycle. See Table 2-4 forthe Write-Protect Functionality Matrix.
3.4 Serial Input (SI)The SI pin is used to transfer data into the device. Itreceives instructions, addresses and data. Data islatched on the rising edge of the serial clock.
3.5 Serial Clock (SCK)The SCK is used to synchronize the communicationbetween a master and the 25XX040A. Instructions,addresses or data present on the SI pin are latched onthe rising edge of the clock input, while data on the SOpin is updated after the falling edge of the clock input.
3.6 Hold (HOLD)The HOLD pin is used to suspend transmission to the25XX040A while in the middle of a serial sequencewithout having to retransmit the entire sequence again.It must be held high any time this function is not beingused. Once the device is selected and a serialsequence is underway, the HOLD pin may be pulledlow to pause further serial communication withoutresetting the serial sequence. The HOLD pin must bebrought low while SCK is low, otherwise the HOLDfunction will not be invoked until the next SCK high-to-low transition. The 25XX040A must remain selectedduring this sequence. The SI, SCK and SO pins are ina high-impedance state during the time the device ispaused and transitions on these pins will be ignored. Toresume serial communication, HOLD must be broughthigh while the SCK pin is low, otherwise serialcommunication will not resume. Lowering the HOLDline at any time will tri-state the SO line.
Name
PDIP, SOIC, MSOP, TSSOP,
DFN
Rotated TSSOP
SOT-23 Function
CS 1 3 5 Chip Select InputSO 2 4 4 Serial Data OutputWP 3 5 — Write-Protect PinVSS 4 6 2 GroundSI 5 7 3 Serial Data Input
SCK 6 8 1 Serial Clock InputHOLD 7 1 — Hold InputVCC 8 2 6 Supply Voltage
25AA040A/25LC040A
DS21827D-page 14 2007 Microchip Technology Inc.
4.0 PACKAGING INFORMATION
4.1 Package Marking Information
T/XXXNNNXXXXXXXX
YYWW
8-Lead PDIP
I/P 1L725AA040A
0627
Example:
8-Lead SOIC
XXXXYYWWXXXXXXXT
NNN
Example:
SN 062725AA04AI
1L7
NNN
XXXXTYWW
8-Lead TSSOP
1L7
5A4AI627
Example:
8-Lead MSOP (150 mil) Example:
XXXXXTYWWNNN
5L4AI6271L7
Legend: XX...X Customer-specific informationY Year code (last digit of calendar year)YY Year code (last 2 digits of calendar year)WW Week code (week of January 1 is week ‘01’)NNN Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn)* This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
3e
3e
1st Line Marking Codes
25AA040A 5A4A25LC040A
A4AX5L4A L4AX
Part Number TSSOPStandard Rotated
MSOP SOT-23 DFN
5A4AT5L4AT
32NN35NN 36NN
421424 425
— —I Temp.E Temp.I Temp. E Temp.
Note: T = Temperature grade (I, E) NN = Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it willbe carried over to the next line, thus limiting the number of availablecharacters for customer-specific information.
3e
3e
2007 Microchip Technology Inc. DS21827D-page 15
25AA040A/25LC040APackage Marking Information (continued)
6-Lead SOT-23
XXNN
Example:
32L7
XXX
8-Lead 2X3 DFN
YWWNN
Example:
421627L7
25AA040A/25LC040A
DS21827D-page 16 2007 Microchip Technology Inc.
8-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP]
Notes:1. Pin 1 visual index feature may vary, but must be located with the hatched area.2. § Significant Characteristic.3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Units INCHES
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e .100 BSC
Top to Seating Plane A – – .210
Molded Package Thickness A2 .115 .130 .195
Base to Seating Plane A1 .015 – –
Shoulder to Shoulder Width E .290 .310 .325
Molded Package Width E1 .240 .250 .280
Overall Length D .348 .365 .400
Tip to Seating Plane L .115 .130 .150
Lead Thickness c .008 .010 .015
Upper Lead Width b1 .040 .060 .070
Lower Lead Width b .014 .018 .022
Overall Row Spacing § eB – – .430
N
E1
NOTE 1
D
1 2 3
A
A1
A2
L
b1
b
e
E
eB
c
Microchip Technology Drawing C04-018B
2007 Microchip Technology Inc. DS21827D-page 17
25AA040A/25LC040A
8-Lead Plastic Small Outline (SN) – Narrow, 3.90 mm Body [SOIC]
Notes:1. Pin 1 visual index feature may vary, but must be located within the hatched area.2. § Significant Characteristic.3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.REF: Reference Dimension, usually without tolerance, for information purposes only.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 1.27 BSC
Overall Height A – – 1.75
Molded Package Thickness A2 1.25 – –
Standoff § A1 0.10 – 0.25
Overall Width E 6.00 BSC
Molded Package Width E1 3.90 BSC
Overall Length D 4.90 BSC
Chamfer (optional) h 0.25 – 0.50
Foot Length L 0.40 – 1.27
Footprint L1 1.04 REF
Foot Angle φ 0° – 8°
Lead Thickness c 0.17 – 0.25
Lead Width b 0.31 – 0.51
Mold Draft Angle Top α 5° – 15°
Mold Draft Angle Bottom β 5° – 15°
D
N
e
E
E1
NOTE 1
1 2 3
b
A
A1
A2
L
L1
c
h
h
φ
β
α
Microchip Technology Drawing C04-057B
25AA040A/25LC040A
DS21827D-page 18 2007 Microchip Technology Inc.
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]
Notes:1. Pin 1 visual index feature may vary, but must be located within the hatched area.2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.REF: Reference Dimension, usually without tolerance, for information purposes only.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 0.65 BSC
Overall Height A – – 1.20
Molded Package Thickness A2 0.80 1.00 1.05
Standoff A1 0.05 – 0.15
Overall Width E 6.40 BSC
Molded Package Width E1 4.30 4.40 4.50
Molded Package Length D 2.90 3.00 3.10
Foot Length L 0.45 0.60 0.75
Footprint L1 1.00 REF
Foot Angle φ 0° – 8°
Lead Thickness c 0.09 – 0.20
Lead Width b 0.19 – 0.30
D
N
E
E1
NOTE 1
1 2
b
e
c
A
A1
A2
L1 L
φ
Microchip Technology Drawing C04-086B
2007 Microchip Technology Inc. DS21827D-page 19
25AA040A/25LC040A
8-Lead Plastic Micro Small Outline Package (MS) [MSOP]
Notes:1. Pin 1 visual index feature may vary, but must be located within the hatched area.2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.REF: Reference Dimension, usually without tolerance, for information purposes only.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 0.65 BSC
Overall Height A – – 1.10
Molded Package Thickness A2 0.75 0.85 0.95
Standoff A1 0.00 – 0.15
Overall Width E 4.90 BSC
Molded Package Width E1 3.00 BSC
Overall Length D 3.00 BSC
Foot Length L 0.40 0.60 0.80
Footprint L1 0.95 REF
Foot Angle φ 0° – 8°
Lead Thickness c 0.08 – 0.23
Lead Width b 0.22 – 0.40
D
N
E
E1
NOTE 1
1 2
e
b
A
A1
A2c
L1 L
φ
Microchip Technology Drawing C04-111B
25AA040A/25LC040A
DS21827D-page 20 2007 Microchip Technology Inc.
8-Lead Plastic Dual Flat, No Lead Package (MC) – 2x3x0.9 mm Body [DFN]
Notes:1. Pin 1 visual index feature may vary, but must be located within the hatched area.2. Package may have one or more exposed tie bars at ends.3. Package is saw singulated.4. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.REF: Reference Dimension, usually without tolerance, for information purposes only.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e 0.50 BSC
Overall Height A 0.80 0.90 1.00
Standoff A1 0.00 0.02 0.05
Contact Thickness A3 0.20 REF
Overall Length D 2.00 BSC
Overall Width E 3.00 BSC
Exposed Pad Length D2 1.30 – 1.75
Exposed Pad Width E2 1.50 – 1.90
Contact Width b 0.18 0.25 0.30
Contact Length L 0.30 0.40 0.50
Contact-to-Exposed Pad K 0.20 – –
D
N
E
NOTE 1
1 2
EXPOSED PAD
NOTE 1
2 1
D2
K
L
E2
N
e
b
A3 A1
A
NOTE 2
BOTTOM VIEWTOP VIEW
Microchip Technology Drawing C04-123B
2007 Microchip Technology Inc. DS21827D-page 21
25AA040A/25LC040A
6-Lead Plastic Small Outline Transistor (CH) [SOT-23]
Notes:1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side.2. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 6
Pitch e 0.95 BSC
Outside Lead Pitch e1 1.90 BSC
Overall Height A 0.90 – 1.45
Molded Package Thickness A2 0.89 – 1.30
Standoff A1 0.00 – 0.15
Overall Width E 2.20 – 3.20
Molded Package Width E1 1.30 – 1.80
Overall Length D 2.70 – 3.10
Foot Length L 0.10 – 0.60
Footprint L1 0.35 – 0.80
Foot Angle φ 0° – 30°
Lead Thickness c 0.08 – 0.26
Lead Width b 0.20 – 0.51
b
E
4N
E1
PIN 1 ID BY
LASER MARK
D
1 2 3
e
e1
A
A1
A2c
L
L1
φ
Microchip Technology Drawing C04-028B
25AA040A/25LC040A
DS21827D-page 22 2007 Microchip Technology Inc.
APPENDIX A: REVISION HISTORY
Revision BCorrections to Section 1.0, Electrical Characteristics.
Revision CAdded Packages SOT-23, DFN and X-rotated TSSOP;Revised AC Char., Params. 9, 10; Revised PackageLegend.
THE MICROCHIP WEB SITEMicrochip provides online support via our WWW site atwww.microchip.com. This web site is used as a meansto make files and information easily available tocustomers. Accessible by using your favorite Internetbrowser, the web site contains the followinginformation:
• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software
• General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER CHANGE NOTIFICATION SERVICEMicrochip’s customer notification service helps keepcustomers current on Microchip products. Subscriberswill receive e-mail notification whenever there arechanges, updates, revisions or errata related to aspecified product family or development tool of interest.
To register, access the Microchip web site atwww.microchip.com, click on Customer ChangeNotification and follow the registration instructions.
CUSTOMER SUPPORTUsers of Microchip products can receive assistancethrough several channels:
• Distributor or Representative• Local Sales Office• Field Application Engineer (FAE)• Technical Support• Development Systems Information Line
Customers should contact their distributor,representative or field application engineer (FAE) forsupport. Local sales offices are also available to helpcustomers. A listing of sales offices and locations isincluded in the back of this document.
Technical support is available through the web siteat: http://support.microchip.com
25AA040A/25LC040A
DS21827D-page 24 2007 Microchip Technology Inc.
READER RESPONSEIt is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentationcan better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To: Technical Publications Manager
RE: Reader ResponseTotal Pages Sent ________
From: Name
CompanyAddressCity / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
FAX: (______) _________ - _________
DS21827D25AA040A/25LC040A
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
2007 Microchip Technology Inc. DS21827D-page 25
25AA040A/25LC040A
PRODUCT IDENTIFICATION SYSTEMTo order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X X /XX
PackageTemperatureTape & ReelDevice
Device: 25AA040A
25LC040A25AA040AX
25LC040AX
4k-bit, 1.8V, 16 Byte Page, SPI Serial EEPROM4k-bit, 2.5V, 16 Byte Page, SPI Serial EEPROM4k-bit, 1.8V, 16 Byte Page, SPI Serial EEPROM, in alternate pinout (ST only)4k-bit, 2.5V, 16 Byte Page, SPI EEPROM, in alternate pinout (ST only)
Tape & Reel: Blank = T =
Standard packagingTape & Reel
Temperature Range:
I =E =
-40 C to+85 C-40 C to+125 C
Package: MS =P =SN =ST =MC =OT =
Plastic MSOP (Micro Small Outline), 8-leadPlastic DIP (300 mil body), 8-leadPlastic SOIC (3.90 mml body), 8-leadTSSOP, 8-lead2x3 DFN, 8-leadSOT-23, 6-lead (Tape and Reel only)
Information contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use. Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer’s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their respective companies.
Note the following details of the code protection feature on Microchip devices:• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
DS21827D-page 28 2007 Microchip Technology Inc.
AMERICASCorporate Office2355 West Chandler Blvd.Chandler, AZ 85224-6199Tel: 480-792-7200 Fax: 480-792-7277Technical Support: http://support.microchip.comWeb Address: www.microchip.comAtlantaDuluth, GA Tel: 678-957-9614 Fax: 678-957-1455BostonWestborough, MA Tel: 774-760-0087 Fax: 774-760-0088ChicagoItasca, IL Tel: 630-285-0071 Fax: 630-285-0075DallasAddison, TX Tel: 972-818-7423 Fax: 972-818-2924DetroitFarmington Hills, MI Tel: 248-538-2250Fax: 248-538-2260KokomoKokomo, IN Tel: 765-864-8360Fax: 765-864-8387Los AngelesMission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608Santa ClaraSanta Clara, CA Tel: 408-961-6444Fax: 408-961-6445TorontoMississauga, Ontario, CanadaTel: 905-673-0699 Fax: 905-673-6509