4bitcomp

EE 166 Design Project

4 Bit Magnitude ComparatorDesign ByMan Hong LiuKee-Hoon ChoiTak Chuen Wong

Diagram of 4-Bit Comparator4 Bit Magnitude ComparatorA3A2A1A0B3B2B1B0GTEQLT

SpecificationPower : Less than 0.25 WFrequency : 200 MHzAMI06 Technology

MethodUsed Velilog to verify our logicHand Calculation to determine approx. delay time and speed.Completed all the logic gate: AND, XNOR, NAND, Inverter (transistor size, simulation)Integrated all parts (Modification if needed)Layout (Modification if needed)Extracted Simulation

Sub Systems of our DesignThree Sub-Systemsa. Equal Module (A = B) b. Less than Module (A < B) c. Greater than Module (A > B)

Equal ModuleOutput high when two inputs equal (A = B)

Four 2-input XNOR GateOne 4-input NAND Gate

Less Than ModuleOutput high when input A is less than input B. (A < B)

Three InvertersFive 2-input NAND GatesOne 3-input NAND GateTwo 4-input NAND GatesThree signal from EQ module (EQ3, EQ2, EQ1)

Greater Than ModuleOutput high when input A is greater than input B. (A > B)

Three InvertersFive 2-input NAND GatesOne 3-input NAND GateTwo 4-input NAND GatesThree signal from EQ module (EQ3, EQ2, EQ1)

Full Schematic

Schematic of 2 Input XNOR Gate

Schematic of Equal Module

Schematic of LT Module

Schematic of GT Module

Schematic of 4-bit Comparator

4-bit Comparator Test Bench Connection

Transient Response

Transient ResponseA3 < B3A3 > B3A = B

Power

ResultsPower : Approx. 0.26 mW (within 5 %)

Time Delay : 830 ps for EQ module

Good !!! We met our specification

Layout of 2-Input XNOR Gate

Layout of Equal Module

Layout of LT Module

Layout of GT Module

Layout of 4-bit Comparator

Extracted View of 4-bit Comparator

LVS Reports

Extracted Transient Response

Extracted Power Measure

ResultsPower : Approx. 0.20 mW (within 5 %)

Time Delay : EQ Module = 810 ps (LT & GT are faster than EQ)

Good !!! We met our specification

ConclusionProblem : Too much Power consumption.

Solution : We simplified our logic. We deleted some of inverters.

Result : Power goes down.

Initial Full Schematic

Final Full Schematic

ConclusionBetter result from layout than schematic

After all, our design works !!!