4/27/05 IPSN/SPOTS 2005 Sensor Network Hardware Platform Design Andreas Savvides Embedded Networks and Applications Lab ENALAB .

4/27/05 IPSN/SPOTS 2005

Sensor Network Hardware Platform Design

Andreas SavvidesEmbedded Networks and

Applications LabENALAB

http://www.eng.yale.edu/enalabYALE EE & CS Departments

April 27, 2005

Research Supported by:

4/27/05 IPSN/SPOTS 2005

Hardware Platform Design

• Platforms in applications and deployments– Computation requirements in applications and design

• Platforms vs. application needs– Hardware design and interface issues

• Experiences with the platform development process

• Emphasis topic: Hardware characterization– Power characterization is discussed in SPOTS

papers/posters – I will pick on antenna behaviors in 3-D scenarios

• Algorithms and platforms should change together

– HW platforms can still change the way we think about algorithms

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Hardware Sensing Platforms

HW Platforms

Shrink the HWExperiment with unknown environments

UC Berkeley’s Spec Node & Smartdust

NIMS Nodes@UCLA

Intelligent Integrated Sensing Network Platforms

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Hardware Platform Priorities

HW Platforms

Shrink the HWExperiment with unknown environments

UC Berkeley’s Spec Node & Smartdust

NIMS Nodes@UCLA

Intelligent Integrated Sensing Network Platforms

Power & Cost Reduction Understanding unknownsensing phenomena

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Platforms vs. Application Needs

Each application has different computation, memory and interface requirements

• Wide range of applications & requirements:

– Surveillance– Medical care– Structural health monitoring– Traffic management– Tracking fires– Environmental exploration– Child motion monitoring

• Hard to create a single platform for all applications

Links to SPOTS Platforms - Pages 429 – 431 of the proceedings

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Opportunities for New HW at Different Levels

• Processor core– New instructions– Support for different power modes

• Peripherals– Need new custom peripherals– Often running as different HW treads

• Sensors– Create new sensing modalities– Move computation and intelligence inside the

sensor

• Still many tradeoffs and engineering challenges to address

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When should you attempt to build a new platform?

• If you have a specific problem in mind for which existing platforms won’t suffice

• If you plan to create a hardware component for which you need tight control of the hardware

• If cost and size become a limiting issue• Need to consider

– What is the benefit of having own platform?– Is this going to enable or handicap your research

effort?

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Plan your priorities

• What is your design objective?– Avoid building new HW for the sake of building– Target a specific feature or application

• Power consumption vs. proof of concept

– Which is more important to you?

• Proof of concept– Over-design vs. under-design– If the algorithm is known, size and power

become the focus– If the algorithm/application is not known you

need to relax the constraints

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Before you begin to build a sensor node

• Are the tool chains available?– Make sure you have all the tools you need to

complete the cycle available» Flash programmer» Compiler» Debugger & JTAG tools

• Is the processor chip you are using mature?

– If not, then don’t use it unless you have collaboration with the manufacturer

– Get the development kit first and try to write software before you start

• Does the radio you are using have software support/tools?

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Design Tools and Component Selection

• Try to use well established packages, ORCAD for instance

– Typically available from the CAD tools suite– Easier to find/share component footprints

» This is one of the most time-consuming and error-prone part of the process

• Make sure you select the right components– Components come in different packages – Components have different cost and power consumption

• Good idea to purchase all the components before the prototype PCB is sent to fabrication

• If you plan to build large numbers, talk to people who did it before first

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Design Considerations

• Design for manufacturability– Take into account that you need to build more– Plan for an economical way to do it

• Capitalize on the fabrication cycle– Most companies have reduced rates for 4 week runs– Assembly houses may have specific requirements on assembly

» Find out about this before you begin

• Talk to the assembly house before you finalize your design

– Some PCB boards and components will require fiducial points for machine assembly

– Some manufacturers may be able to suggest alternative components

• Put testpoints for debugging and power characterization during operation

• Be careful with radios – they have specific PCB requirements

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Developing your PCB

• Look around for existing designs first• Investigate parts

– Availability, packaging, power consumption & cost

• Get your tools together for the whole process first

• Schematic capture and review process• Layout

– Double check your component footprints– Talk to the manufacturer – some places charge less for

1 phase board– Odd number of layers does not save you money– Make sure you follow the manufacturer directions for

radio laout– Make sure you wire the board for test & measurement

• Plan for testing

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SmartKG iBadge Platform (NESL/UCLA)

• One of the most highly integrated sensor platforms• Hard to build – very small components 0201

components, difficult to machine assemble• Production and assembly costs is a limiting factor• Lots of educational value!

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Study Case – Building the XYZ

• Work with Cogent Computer– Small single board computer company in Rhode Island– Already has expertise and interest in embedded ARM

• Collaboration with OKI Semiconductor– Make sure that all the peripherals are available

• Talk to Chipcon to make sure they would have an IEEE 802.15.4 MAC available

• Design prototype according to our specification• Second pass design with Cogent Computer

– Identify inexpensive components– Make the design easier to manufacture

» 1 side, 6-layer board» Placement done to accommodate hand and machine

assembly

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Example: XYZ Mobility & Ultrasound Board

• Align components to make low production assembly and debugging more efficient

– Makes hand assembly or low end machine assembly easier

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Lessons Learned

• Don’t bother soldering everything by hand• Look for places esp. local shops that can help you• If the layout is too complex, outsource to an expert

– Cost is the same if you consider the lost time and the possibility of bugs

• Pace yourself– Long, organized planning period– Fabrication & assembly cycle (2 to 6 weeks)

• Have a support strategy for the system– How are you going to make more, distribute it, test it, use it

etc.

• Plan for iterative implementation and customization– After some field deployment you will probably need to make

some changes

• Verify the software and programming cycle before you finalize the hardware design

4/27/05 IPSN/SPOTS 2005

Lessons Learned

• Go for the mainstream design tools• Design for manufacturability and

testability• Be aware of what if already available

– Look into the community to see if there are pieces you can reuse

– Reconsider picking platform development as a research topic if other companies are doing it

» Ember & OKI have IEEE 802.15.4 implementations on radio chip

» re-implementing the same MAC w/o a longer term plan will have short half-life

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After Fabrication Completion

• Have a test strategy in mind for SW & HW– Write diagnostic code to check each subsystem– Diagnostic code should become part of the runtime

environment

• Treat your new platform as a new device. Characterize it!

– Characterize power consumption at different modes– Characterize platform in a realistic environment!– Push the platform to the limits, know where things

break down– Post your data, this is would be the most valuable

asset to the community

• Example: Antenna Characterization for CC 2420

– PCB design affects the antenna– Characterize radio and antenna properties in 3D!

4/27/05 IPSN/SPOTS 2005

Chipcon CC2420 Radio Power Levels

Level TX Power(dBm) Power Consumed (mW)

1 0 31.322 -1 29.7

3 -3 27.36

4 -5 25.02

5 -7 22.5

6 -10 20.16

7 -15 17.82

8 -25 15.3)mW(

1mW

P(mW)20logP(dBm)

RSSI_VAL = Computed by the radio over 8 symbol periods (128us)RSSI_OFFSET= Determined experimentally, based on front end gain

(around -45dBm)Approx. Range at power level 6 in an office corridor = 30ftAntenna Length 2.9cm

[dBm] TRSSI_OFFSE RSSI_VALPRX

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Radio Calibration for TX and RX

Each radio chip is different

E[Pr]=29.94dBmσ=2.7dBm

40cm

40cm E[Pr]=26.375dBmσ=2.88dBm

10Different

Transmitters

10Different

Receivers

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Orientation variations at ground level

Node ID E(RSSI_VAL) σ(RSSI_VAL) 0x0019 25.75 1.159

0x0008 27.48 1.46

0x0022 28.1 1.16

0x001F 30.92 0.98

Across all nodes 28.0625 2.15

Repeat experiment for 4 different nodes, same receiver:• TX Power -15dBm• 8 different positions, 4 orientations for each position

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Indoor Path Loss Measurements Floor measurements in a 24 x 20ft lounge – no obstacles

-100

-90

-80

-70

-60

-50

-40

0 5 10 15 20

Distance (feet)

RS

SI(

dB

m) Same power level using suboptimal antenna

η=3

4/27/05 IPSN/SPOTS 2005

-100

-90

-80

-70

-60

-50

-40

0 5 10 15 20

Distance (feet)

RS

SI(

dB

m)

Indoor Path Loss Measurements Floor measurements in a 24 x 20ft lounge – no obstacles

),0(X

exponent losspath -

d distance reference aat losspath )PL(d

power, transmit P

Xd

d log 10)PL(dPRSS(d)

2

00

T

0100T

N

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Monopole Antenna Radiation Pattern

Side View Top View

Communication rangeSymmetric Region Antenna orientation

independent regions

Communication range

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RSSI at Different Antenna Orientations

At the bad orientation, antenna has to be at similar height to get proper results

0 5 10 15 20 25-45

-40

-35

-30

-25

-20Best Orientation: 135 degrees

Distance(feet)

6.5ft3.5ft1.5ft

0 5 10 15 20 25-50

-45

-40

-35

-30

-25Worst Orientation: 180 degrees

Distance(feet)

6.5ft3.5ft1.5ft

4/27/05 IPSN/SPOTS 2005

01

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X coordinate

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Connectivity at Power Level 7

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rdin

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3-D Radio Connectivity

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Connectivity at Power Level 6

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X coordinate

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Connectivity at Power Level 4

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rdin

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Link Asymmetry in 3D-scenarios

1 2 3 4 5 6 7 820

22

24

26

28

30

32

34

36

Power Level ( 1 - Maximum power level )

One way Links

% o

f on

e-w

ay lin

ks

4/27/05 IPSN/SPOTS 2005

1 2 3 4 5 6 7 820

25

30

35

40

45

50

55Percentage of Assymetric Links

Power Level (1 - Maximum power)

>=2 >=3 >=4 >=5 >=6

dBm diff. 2

dBm diff. 3

dBm diff. 4 dBm diff. 5 dBm diff. 6

RSS Asymmetry at Different Power Levels

Asym

metr

ic L

inks %

4/27/05 IPSN/SPOTS 2005

Platforms in Undergraduate Curriculum – Setting up a lab

EENG 449Computer Systems

Capstone Project

EENG 460aNetworked

Embedded Systems& S. Networks

• Embedded and Real Time OS• Radio Technologies and MAC• Routing for small devices• Sensor network applications

• Self-Configuration• Data Storage• Mobility and Actuation

• Expect to have a research caliber project • Undergraduates participate on research papers

• Computer Architecture• Embedded Processors• Assembly Language

Most important assets: 1. Develop HW intuition early on

2. Have fault diagnostic code for the device

4/27/05 IPSN/SPOTS 2005

Conclusions

• Building HW is a great learning experience and adds to the diversity

• Useful to uncover new ideas and concepts• More insight, more prudent researcher• Close consideration with software design is

crucial– HW changes faster than SW

• One of the biggest challenges– Radio technology – There is a large domain of problems for which the radio

may not be sufficient– Need to become more critical of radio capabilities in

applications– Try out different radios!

• Data traces and benchmarks are still missing– Need better ways of reporting power and performance– Utility value in terms of the application should be

factored in