-
Hindawi Publishing CorporationJournal of EngineeringVolume 2013,
Article ID 309124, 6 pageshttp://dx.doi.org/10.1155/2013/309124
Research ArticleVoltageMode PulseWidthModulator UsingSingle
��erational �ransresistance ���li�er
Rajeshwari Pandey,1 Neeta Pandey,1 and Sajal K. Paul2
1 Department of Electronics and Communication, Delhi
Technological University, Bawana Road, Delhi 110042,
India2Department of Electronics Engineering, Indian School of
Mines, Dhanbad, Jharkhand 826004, India
Correspondence should be addressed to Neeta Pandey;
[email protected]
Received 31 August 2012; Revised 2 December 2012; Accepted 10
December 2012
Academic Editor: Kyoung Kwan Ahn
Copyright © 2013 Rajeshwari Pandey et al. is is an open access
article distributed under the Creative Commons AttributionLicense,
which permits unrestricted use, distribution, and reproduction in
any medium, provided the original work is properlycited.
is paper presents a voltage mode pulse width modulator (PWM)
using single operational transresistance ampli�er (OTRA).eproposed
PWM consists of a relaxation oscillator output which is modulated
using modulating signal. PSPICE simulation resultsand experimental
results have been included to verify the theoretical analysis.
1. Introduction
Pulse width modulation (PWM) scheme is widely used
incommunication systems, DC motor speed controller, powerconversion
control circuits [1–3], and instrumentation. InPWM, the width of
pulses of a pulse train is changed inaccordance to voltage level of
modulating signal. e PWMgenerators are available in Integrated
Circuits (ICs) form;however, the internal circuitry is somewhat
complex andtypically consists of current sources, �ip-�op,
comparators,and analog switches [4]. Apart from these readily
availableICs, the PWM signal can most commonly be generated
bycomparing a modulating signal with a sawtooth or trian-gular
waveform. Alternatively, information signal can �rstbe combined
with a sawtooth or triangular waveform andthereaer comparing the
combined signal with a referencelevel to generate PWM signal.is can
be implemented usinga Schmitt trigger with an RC circuit in
feedback loop [5].Extensive literature review reveals that PWMs
based on thisconcept are available using different active analog
buildingblocks such as op-amps [6], current conveyor II (CCII)[4],
and operational transconductance ampli�er (OTA) [7,8].
High-frequency performance of PWMs employing op-amps is limited due
to lower slew rate and constant gain-bandwidth product of the
op-amps. e CCII-based PWMhas the advantage of generating accurate
PWM signal with
high operating frequencies [4], and the output amplitudeand
frequency of the PWMs based on OTAs can be
inde-pendently/electronically tuned [7]. Despite these
advantages,the circuits proposed in [4, 7] suffer a drawback of
usingexcessive number of active elements. Reference [8]
presentsanother OTA-based PWM which uses derivative method.
Inderivative method, the duty cycle of PWM signal dependson a
differentiated result of the modulating signal. ismethod is not
suitable for applications where the changes inmodulating signal are
rare, such as in power converters [7].e open literature suggests
that a PWM pulse train can alsobe producedwith the use of
voltage-controlled delay lines [9],current-controlled delay cells
[10], and voltage-controlledphase shier [11] wherein the underlying
concept is not thesame as used in [4–8]; that is, the comparison of
modulatingsignal with reference triangular/sawtooth waveform [9]
usestwo voltage-controlled delay lines, a �xed delay element,
tworising edge detectors, along with an RS latch to generate
a0%–50% duty cycle at the output of the latch. Two 0%–50%modulators
are connected in parallel to extend the duty cycleto 100%.
Current-controlled delay cell-based duty oscillatorand
pseudohyperbola charge current generator are used in[10] for
generating PWM. Yet, another PWM is proposed in[11] which employs a
voltage-controlled phase shier, a two-input logic AND gate, a
network of logic inverters, and FET
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2 Journal of Engineering
switches.is circuit generates a 0% to 50% pulse width usingthe
phase shier and anANDgate and then extends the rangeto 0%–100%
using the inverters.
is paper aims at presenting an operational transre-sistance
ampli�er (OTRA) based PWM, using a relativelysimpler scheme,
wherein the modulating signal is combinedwith an exponential
carrier waveform and compared witha reference. is paper is
organized as follows. In Section2, the function of an OTRA is
brie�y described, followedby the operation principle of the
proposed PWM circuit.e feasibility of the presented circuits is
veri�ed throughcircuit simulations and experimental results in
Section 3.It is observed that the simulation and experimental
resultsare in close agreements with theoretical propositions.
ecomparison of the proposed circuit with earlier reportedstructures
is presented in Section 4. Section 5 concludes thepaper.
2. Circuit Descriptions
OTRA is a high gain current input voltage output device.e input
terminals of OTRA are internally grounded,thereby eliminating
response limitations due to parasiticcapacitances and resistances
and, hence, are appropriate forhigh-frequency operation. e circuit
symbol of OTRA isshown in Figure 1, and the port characteristics
are given by(1), where 𝑅𝑅𝑚𝑚 is transresistance gain of OTRA. For
idealoperations, the 𝑅𝑅𝑚𝑚 of OTRA approaches in�nity and forcesthe
input currents to be equal. us, OTRA must be used ina negative
feedback con�guration. Consider
𝑉𝑉𝑝𝑝𝑉𝑉𝑛𝑛𝑉𝑉𝑜𝑜
=
0 0 00 0 0𝑅𝑅𝑚𝑚 −𝑅𝑅𝑚𝑚 0
𝐼𝐼𝑝𝑝𝐼𝐼𝑛𝑛𝐼𝐼𝑜𝑜
. (1)
e general scheme of PWM is depicted in Figure 2. emodulating
signal and carrier signal are �rst summed up,and then PWM output
signal is generated by comparing thesummation signal and reference
level.
e proposed PWM circuit is shown in Figure 3. ecircuit consisting
of OTRA, resistors 𝑅𝑅𝐹𝐹 and 𝑅𝑅𝐿𝐿, and capac-itor C serves as square
wave generator. Exponential voltagewaveform across capacitor C
serves as carrier waveform.emodulating signal 𝑣𝑣𝑖𝑖 and the carrier
wave are summed upat node 𝑝𝑝 through resistor 𝑅𝑅𝑠𝑠. us, the voltage
across thecapacitorwill be summation of carrier andmodulating
signal,and the PWM output is available at 𝑣𝑣𝑜𝑜.
e resistor 𝑅𝑅𝐹𝐹 and capacitor C form a positive feedbackloop.
𝑉𝑉+sat and 𝑉𝑉
−sat are the two possible saturation levels of
output 𝑣𝑣0. Assume initially that 𝑣𝑣0 switches to
saturationlevel 𝑉𝑉+sat at 𝑡𝑡 = 0, as shown in Figure 4. is results
incharging of the capacitor present in the feedback loop, andthe
voltage across the capacitor reaches𝑉𝑉TH, a value at which𝐼𝐼𝑝𝑝, the
current through 𝑝𝑝 terminal, becomes slightly less thanthe current
through 𝑛𝑛 terminal, 𝐼𝐼𝑛𝑛. As a result, the outputvoltage switches
to 𝑉𝑉−sat, and the capacitor starts charging inthe opposite
direction. Now, as capacitor voltage approaches𝑉𝑉TL, the output
once again switches back to 𝑉𝑉
+sat.
��
�n
��
�n
�
�����
F 1: OTRA circuit symbol.
PWM output
Carrier waveform generator
ComparatorModulating
input
Reference
level
∑
F 2: e scheme of PWM [4].
e𝑉𝑉TH and𝑉𝑉TL values can be obtained from the routineanalysis of
this PWM circuit and are expressed by (2) and (3),respectively.
Consider
𝑉𝑉TH = 𝑉𝑉+sat 1 −
𝑅𝑅𝐹𝐹𝑅𝑅𝐿𝐿
+ 𝑣𝑣𝑖𝑖 (𝑡𝑡)𝑅𝑅𝐹𝐹𝑅𝑅𝑆𝑆
, (2)
𝑉𝑉TL = 𝑉𝑉−sat 1 −
𝑅𝑅𝐹𝐹𝑅𝑅𝐿𝐿
+ 𝑣𝑣𝑖𝑖 (𝑡𝑡)𝑅𝑅𝐹𝐹𝑅𝑅𝑆𝑆
. (3)
ese values of 𝑉𝑉TH and 𝑉𝑉TL result in 𝑇𝑇on and 𝑇𝑇off
asfollows:
𝑇𝑇on = 𝑅𝑅𝐹𝐹C ln2𝑅𝑅𝐿𝐿/𝑅𝑅𝐹𝐹 − 1 − 𝑣𝑣𝑖𝑖 (𝑡𝑡) 𝑅𝑅𝐿𝐿/𝑉𝑉
+sat𝑅𝑅𝑆𝑆
1 − 𝑣𝑣𝑖𝑖 (𝑡𝑡) 𝑅𝑅𝐿𝐿/𝑉𝑉+sat𝑅𝑅𝑆𝑆,
𝑇𝑇off = 𝑅𝑅𝐹𝐹C ln2𝑅𝑅𝐿𝐿/𝑅𝑅𝐹𝐹 − 1 − 𝑣𝑣𝑖𝑖 (𝑡𝑡) 𝑅𝑅𝐿𝐿/𝑉𝑉
−sat𝑅𝑅𝑆𝑆
1 − 𝑣𝑣𝑖𝑖 (𝑡𝑡) 𝑅𝑅𝐿𝐿/𝑉𝑉−sat𝑅𝑅𝑆𝑆.
(4)
e overall period of the modulated output is given by
𝑇𝑇 = 𝑇𝑇on + 𝑇𝑇off, (5)
and the duty factor (𝐷𝐷) can be computed as
𝐷𝐷 =𝑇𝑇on𝑇𝑇
× 100%. (6)
Equation (4) shows that the duty cycle of the output canbe
controlled with the help of modulating signal 𝑣𝑣𝑖𝑖(𝑡𝑡).
3. Realizing an OTRA and Nonideality Analysis
For the proposed PWM circuit, the OTRAwas realized usingAD844
CFOA IC as shown in Figure 5 [12]. e equivalentcircuit of Figure 5
for nonideal analysis [13] is presentedin Figure 6. e CFOAs have
been replaced with currentconveyors having �nite input resistances
(𝑅𝑅𝑋𝑋) and �nite
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Journal of Engineering 3
𝑉𝑖(𝑡)𝑅𝑆
𝐶
𝑅𝐿
𝑝
𝑛
𝑅𝐹
𝑉𝑜
F 3: e OTRA PWM circuit.
𝑉TH
𝑉TL
𝑉−
𝑡
𝑉𝑜(𝑡)
𝑉𝑐(𝑡)
𝑉+sat
sat
𝑇on 𝑇off
F 4: Output of the square wave generator of Figure 3.
resistance at its 𝑍𝑍 terminal (𝑅𝑅𝑍𝑍). Ideally, the input
resistanceat the𝑋𝑋 terminal is �ero and is in�nite at the𝑍𝑍
terminal. Forthe AD844 CFOA, the input resistance 𝑅𝑅𝑋𝑋 is around
50Ω,and 𝑅𝑅𝑍𝑍 is around 3MΩ [14].
From Figure 6, various currents can be calculated asfollows:
𝐼𝐼𝑍𝑍𝑍 = 𝐼𝐼+,
𝐼𝐼𝐷𝐷 = 𝐼𝐼𝑍𝑍𝑍 𝑅𝑅𝑍𝑍
𝑅𝑅𝑋𝑋 + 𝑅𝑅𝑍𝑍 ,
𝐼𝐼𝑋𝑋𝑋 = 𝐼𝐼− − 𝐼𝐼𝐷𝐷,
𝐼𝐼𝑍𝑍𝑋 = 𝐼𝐼𝑋𝑋𝑋.
(7)
Ideally, 𝐼𝐼𝐷𝐷 should be equal to 𝐼𝐼𝑍𝑍𝑍, which can be
approx-imated only if 𝑅𝑅𝑍𝑍 ≫ 𝑅𝑅𝑋𝑋, which is true for AD844.
Also,
+
−
+
−
AD844
1
AD844
2𝐼𝑛
𝐼𝑝𝑉𝑂1
𝑉𝑂2𝑉𝑂
𝐼𝑍1
𝐼𝑍2
𝑇𝑍1
𝑇𝑍2𝐼2
𝑅𝑚
𝑉𝑝 𝑝
𝑉𝑛 𝑛
F 5: OTRA constructed with AD844.
CCII
1
1
1
2
RZ
CCII
𝐼𝑛
𝑝
𝑛
𝑅𝑋
𝑅𝑋
𝐼𝑋2
𝑋𝑌
𝑍
𝑋𝑌
𝑍
𝐼𝐷
𝐼𝑍1
𝐼𝑍2
𝑅𝑍
𝑊
𝑊 𝑉𝑂
𝐼𝑝
F 6: Equivalent circuit of OTRA constructed with AD844.
the approximation that the input terminals are virtuallygrounded
will be true only if the external resistance at theinput terminal
of the OTRA is much larger than 𝑅𝑅𝑋𝑋. If thesetwo conditions are
satis�ed, the OTRA constructed withAD844 closely approximates an
ideal OTRA.
From (7), the output voltage 𝑉𝑉𝑂𝑂, taking into account
thepreviously mentioned approximations, can be calculated as
𝑉𝑉𝑂𝑂 = 𝐼𝐼+ − 𝐼𝐼− 𝑅𝑅𝑍𝑍, (8)
where 𝑅𝑅𝑍𝑍 is the transimpedance gain of the OTRA.If in
PWMcircuit shown in Figure 3 the equivalent circuit
of OTRA constructed with AD844 is used, then the thresholdlimits
of the output get modi�ed to
𝑉𝑉TH = 𝑉𝑉+sat 𝑍 −
𝑅𝑅𝐹𝐹 + 𝑅𝑅𝑥𝑥𝑅𝑅𝐿𝐿 + 𝑅𝑅𝑋𝑋//𝑅𝑅𝑍𝑍
+ 𝑣𝑣𝑖𝑖 (𝑡𝑡)𝑅𝑅𝐹𝐹 + 𝑅𝑅𝑥𝑥𝑅𝑅𝑆𝑆 + 𝑅𝑅𝑥𝑥
, (9)
𝑉𝑉TL = 𝑉𝑉−sat 𝑍 −
𝑅𝑅𝐹𝐹 + 𝑅𝑅𝑥𝑥𝑅𝑅𝐿𝐿 + 𝑅𝑅𝑋𝑋//𝑅𝑅𝑍𝑍
+ 𝑣𝑣𝑖𝑖 (𝑡𝑡)𝑅𝑅𝐹𝐹 + 𝑅𝑅𝑥𝑥𝑅𝑅𝑆𝑆 + 𝑅𝑅𝑥𝑥
. (10)
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4 Journal of Engineering
250 300 350 400−10
0
10
𝑉 0(V
)
Times (𝜇s)
F 7: PWM output without modulating signal.
0 0.5 1
−10
0
10
Time (ms)
𝑉 𝑜(V
)
(a) Modulating signal and PWM output signal
Time (ms)
0 0.5 1−10
0
10
𝑉 𝑜(V
)
(b) Summed up modulating and carrier signals
F 8: PWMoutput for 5V, 1 KHz sinusoidal modulating signal.
e external resistance at the input of the OTRA shouldbe much
larger than R𝑋𝑋 so that the feedback current canbe absorbed into
the input terminals. Since 𝑅𝑅𝐿𝐿, 𝑅𝑅𝐹𝐹, 𝑅𝑅𝑆𝑆, and𝑅𝑅𝑍𝑍 ≫ 𝑅𝑅𝑋𝑋,
Equations (9) and (10) reduce to (2) and (3),respectively.
4. Simulation and Experimental Results
e proposed circuit is simulated using PSPICE. OTRAis realized
using current feedback operational ampli�ers(CFOAs) IC AD844 as
shown in Figure 5. Macro model ofAD844 is used for simulations.
Figure 7 shows the outputvoltage of the PWM when modulating signal
is not applied,for 𝑅𝑅𝐹𝐹 = 20KΩ, 𝑅𝑅𝐿𝐿 = 70KΩ, 𝑅𝑅𝑆𝑆 = 80KΩ, and C
=200 pF, and corresponds to a 50% duty cycle. e observedoutput
frequency is 66.7 KHz as against the calculated valueof 69.7
KHz.
Simulated output of pulse width modulator, with samecomponent
values as used in Figure 7, is shown in Figure
0 400 800
−10
0
10
𝑉 𝑜(V
)
Time (𝜇s)
(a) Modulating signal and PWM output signal
0 400 800−10
0
10
𝑉 𝑜(V
)Time (𝜇s)
(b) Summed up modulating and carrier signals
F 9: PWM output of for 8V, 2.2 KHz modulating signal.
8 for a 5V, 1KHz sinusoidal modulating signal. Figure 8(a)shows
the modulating signal and the PWM output, andsummation of
modulating and carrier wave is depicted inFigure 8(b). Figures 9
and 10 show the output of pulsewidth modulator for an 8V, 2.2 KHz
modulating signal and5V, 40KHz modulating signal, respectively, for
same set ofcomponent values. Frequency spectrum of the pulse
widthmodulator for 8V, 2.2 KHz modulating signal is shown inFigure
11 which consists of modulating component andcarrier signal. us,
the modulating signal can be recoveredwith the help of appropriate
low pass �lter.
Figure 12 shows the variation of theoretically computedand
simulated%duty factor of themodulatorwith the appliedinput signals.
is shows that the two results closely matchwith each other.
e functionality of the proposed pulse width modulatorcircuits is
veri�ed through hardware as well.
e commercial IC AD844AN is used to implement anOTRA. Supply
voltages used are±5V. Figure 13 shows typicalexperimental results
of the circuit for two different mod-ulating signals. Figure 13(a)
depicts output for componentvalues 𝑅𝑅𝐹𝐹 = 20KΩ, 𝑅𝑅𝐿𝐿 = 70KΩ, 𝑅𝑅𝑆𝑆 =
80KΩ andC = 200 pF and for an 8V, 2.2 KHz modulating signal.Another
screen shot of oscilloscope is shown in Figure 13(b)for a
high-frequency modulating signal of 40KHz with 5Vamplitude.ese
experimental results are in close agreementto simulated
results.
-
Journal of Engineering 5
T 1: Comparison between the proposed and the previously reported
works.
References no. of active components No. of passive components
Carrier signal type Electronictunability[4] Single CC-II, two
op-amps Single capacitor, three resistors Triangular No[6] Single
op-amp Single capacitor, three resistors Exponential No
[7] (i) Two OTAs, an inverter, and a MOS switch (i) Single
capacitor, single resistor (i) Sawtooth Yes(ii) Four OTAs and an
inverter (ii) Single capacitor, single resistor (ii) Triangular
Yes
[8] ree OTAs Single capacitor, two resistors Triangular
YesProposed Single OTRA Single capacitor, three resistors
Exponential No
0 100 200−10
0
10
𝑉 𝑜(V
)
Time (𝜇s)
(a) Modulating signal and PWM output signal
0 100 200
−10
0
10
𝑉 𝑜(V
)
Time (𝜇s)
(b) Summed up modulating and carrier signals
F 10: PWM output for 5V, 40KHz modulating signal.
5. Comparison
In this section, a comparison of the proposed work withthe
previously reported analog PWM circuits [4, 6–8] ispresented, which
are all based on the concept of comparinga modulating signal with a
reference sawtooth or trian-gular waveform to generate PWM signal.
Table 1 showsthe detailed comparison. e study of Table 1 reveals
thattopologies presented in [4, 7, 8] use more number ofactive
components as compared to the proposed work. eproposed circuit is
simpler as compared to the topologiesof [4, 7, 8], since it uses
the exponential voltage wave-form across the capacitor of the
square wave generatoras carrier wave and, hence, does not require
additionalcircuitry needed for triangular/sawtooth waves.
oughexponential carrier wave being a nonlinear signal yields
Frequency (KHz)
0 50 100 1500
5
10
� �(V
)
(a) Frequency spectrum of modulating signal
Frequency (KHz)
0 50 100 150 0
5
10
� �(V
)
(b) Frequency spectrum of modulated signal
F 11: Frequency spectrum of the PWM.
relatively inaccurate PWM signal at lower carrier frequenciesas
compared to the triangular/sawtooth wave, yet one cantrade off
accuracy for simplicity depending upon the appli-cation.
e PWM topology of [6], which is a classical opamp-based design,
uses same number of active and passivecomponents as in proposed
circuit. However, the opamp-based circuits show limited
high-frequency performance dueto lower slew rate and constant
gain-bandwidth product ofthe op-amps. Additionally, the input
terminals of OTRAbeing virtually grounded, the proposed circuit is
free fromparasitic effects.
6. Conclusion
In this paper, single OTRA-based PWM generator, a nonlin-ear
application ofOTRA, is proposed.is circuit can be usedfor speed
control of DC motors and for DC-DC converters.
-
6 Journal of Engineering
0
10
20
30
40
50
60
70
80
90
100
−7 −6 −5 −4 −3 −2 −1 0 1 2 3 4 5 6 7
Du
ty f
acto
r (%
)
Simulated
Ideal
𝑉𝑖 (V)
F 12: Variation of duty factor with applied input signal.
(a) PWM output for an 8V, 2.2 KHz modulating signal
(b) PWM output for a 5V, 40KHz modulating signal
F 13: Experimental results of the proposed PWM.
PSPICE simulation results using AD844 macromodel andexperimental
results have been included for veri�cation of thetheoretical
propositions which are found in close agreement.
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