Rev. 1.00 1 October 26, 2017 BC32F7611 32-bit Arm ® Cortex ® -M0+ MCU with BLE Transparent Transmission Controller Features • Operating Voltage: 3.3V (T ypical) • Core ♦ 32-bit Arm ® Cortex ® -M0+ processor core ♦ 0.93 DMIPS/MHz (Dhrystone v2.1) ♦ Up to 40MHz operating frequency • On-chip Memory ♦ 64KB Flash Memory ♦ 8KB SRAM • Clock Control Unit ♦ External 4~16MHz crystal oscillator ♦ External 32.768kHz crystal oscillator ♦ Internal 8MHz (±2%) RC oscillator ♦ Internal 32kHz RC oscillator • Peripherals ♦ GPIO: 22 GPIOs pin-shared with other alternative functions ♦ ADC: 6 external channels 1MSPS 12-bit SAR ADC ♦ two I 2 C interfaces with a speed up to 1MHz ♦ One Universal Synchronous/Asynchronous Receiver/ Transmitter – USART ♦ Two Universal Asynchronous Receiver/Transmitters – UART ♦ Master/Slave SPI controller with FIFO ♦ One 16-bit General-Purpose Counter/Timers with 4 independent input channels ♦ One 16-bit up-counter Single-Channel Timer with 6 input channels ♦ Motor Control Timer ♦ CRC-16/32 generator ♦ Real-time Clock (RTC) with alarm function ♦ Watchdog Timer • Debug Support ♦ Serial Wire Debug Port – SW-DP • BLE ♦ Integrated high performance RF and MODEM for BLE (Bluetooth Low Energy) applications ♦ O n-chip capacitors for BLE 32MHz crystal oscillator ♦ Integrated DC/DC converter and LDOs allowing a wider supply range with a single power supply ♦ Over 75dB RX gain and programmable gain steps ♦ Sleep, Deep-Sleep and Power-Down modes for low power consumption ♦ Few external components required for BLE applications • Power Management ♦ Multiple power saving modes: Sleep, Deep-Sleep1 and Deep-Sleep2 for low power consumption • Package type: 46-pin QFN – 6.5mm×4.5mm Applications • Health care products • Smart home appliances • Beacons General Description The BC32F7611 device is a fully-integrated, single- chip BLE SoC (System on Chip) microcontroller based around a high performance, low power consumption 32-bit Arm ® Cortex ® -M0+ processor core. The BLE function is designed to act as a BLE slave controller in accordance with the Bluetooth specification v4.1. The device operates at a frequency of up to 40MHz with a Flash accelerator to obtain maximum efficiency. It provides 64KB of embedded Flash memory for code/data storage and 8KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as ADC, I 2 C, USART, UART, SPI, GPTM, SCTM, MCTM, CRC- 16/32, RTC, WDT, SW-DP(Serial Wire Debug Port), etc. , are also implemented in this device. Several power saving modes provide the flexibility for maxi- mum optimization between wakeup latency and pow- er consumption, an especially important consideration in low power applications. The above features ensure that the device is suitable for use in a wide range of applications, especially in areas such as white goods application control, power monitors, alarm systems, consumer products, handheld equipment, data logging applications, health care products, smart home and so on. Moreover, during the intervals with no active BLE RF connection, The BC32F7611 works in the sleep mode which can furtherly reduce power consumption.
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32-bit Arm Cortex -M0+ MCU with BLE Transparent ... · 32-bit Arm ® Cortex -M0+ MCU with BLE Transparent Transmission Controller Features • Operating Voltage: 3.3V (Typical) •
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Rev. 1.00 1 October 26, 2017 Rev. 1.00 PB October 26, 2017
General DescriptionTheBC32F7611deviceisafully-integrated,single-chipBLESoC (SystemonChip)microcontrollerbased around a high performance, low powerconsumption32-bitArm®Cortex®-M0+ processorcore.TheBLEfunctionisdesignedtoactasaBLEslavecontroller in accordancewith theBluetoothspecificationv4.1.
Thedeviceoperatesata frequencyofup to40MHzwithaFlashacceleratortoobtainmaximumefficiency.Itprovides64KBofembeddedFlashmemory forcode/data storage and8KBof embeddedSRAMmemoryforsystemoperationandapplicationprogramusage.Avarietyofperipherals, suchasADC, I2C,USART,UART,SPI,GPTM,SCTM,MCTM,CRC-16/32,RTC,WDT,SW-DP(SerialWireDebugPort),etc., are also implemented in thisdevice.Severalpowersavingmodesprovidetheflexibilityformaxi-mumoptimizationbetweenwakeuplatencyandpow-erconsumption,anespeciallyimportantconsiderationinlowpowerapplications.
Theabovefeaturesensure that thedevice issuitableforuse inawiderangeofapplications,especially inareassuchaswhitegoodsapplicationcontrol,powermonitors,alarmsystems,consumerproducts,handheldequipment,data loggingapplications,health careproducts,smarthomeandsoon.
VDD 1 P Digital power supply; 2.2V~3.6VVSS 2 P Connect to groundnRST 3 DI MCU core reset inputPB9 4 IO General Purpose I/O / MT_CH3X32KIN/PB10 5 IO X32KIN / General Purpose I/O / GT_CH0 / USR_TX / SCTM2X32KOUT/PB11 6 IO X32KOUT / General Purpose I/O / GT_CH1 / USR_RX / SCTM3PB12 7 IO PB12 / SPI_MISO / UR0_RX / SCTM0 / WAKEUPXTALIN/PB13 8 AIO Crystal Input / PB13 / UR0_TX / I2C0_SCLXTALOUT/PB14 9 AIO Crystal Output / PB14 / UR0_RX / I2C0_SDAPA9_BOOT 10 DI General Purpose I/O / Boot mode selections / SPI_MOSI / SCTM3 / CKOUTSWCLK/PA12 11 DIO Serial-Wired debug clock input / PA12SWDIO/PA13 12 DIO Serial-Wired debug data pin / PA13PA14 13 IO General Purpose I/O / MT_CH0 / USR_RTS / I2C1_SCLPA15 14 IO General Purpose I/O / MT_CH0N / USR_CTS / I2C1_SDA / SCTM1PB0 15 IO General Purpose I/O / MT_CH1 / USR_TX / I2C0_SCLPB1 16 IO General Purpose I/O / MT_CH1N / USR_RX / I2C0_SDA / SCTM2PB2 17 IO General Purpose I/O / MT_CH2 / SPI_SEL / UR1_TXPB3 18 IO General Purpose I/O / MT_CH2N / SPI_SCK / UR1_RX / SCTM1PB4 19 IO General Purpose I/O / MT_BRK / SPI_MOSI / UR1_TX / SCTM0VDDIF_15 20 P Analog power for IF part, connect to VOUT_15
VDDRF_15 21 P Analog power for RF part, connect to VOUT_15
RFIO 22 AIO RF input or outputRFGND 23 P RF Power GroundVDDRF_15 24 P Analog power for RF part, connect to VOUT_15DC_TEST 25 AO Test pin for RF functionVDDLO_15 26 P Analog power for RF part, connect to VOUT_15
Rev. 1.00 6 October 26, 2017
BC32F7611
Pin Name Pin No. I/O DescriptionXI 27 AI BLE 32MHz Crystal oscillator inputXO 28 AO BLE 32MHz Crystal oscillator output
DVDD_12 29 P Internal digital power 1.2V, require a 0.1μF capacitor to RFGND
RFGND 30 P RF Power GroundNC 31 — Connect to groundNC 32 — Connect to groundRST_N 33 DI BLE hardware reset inputINT_EXT 34 DO BLE External InterruptWAKEUP 35 DI BLE Wakeup pinPVIN 36 DI BLE Power-supply; 2.2V~3.6VVOUT_15 37 P 1.5V power outputDCDC_SW 38 P Switching Output. Connect this pin to the switching end of the inductorAVDD 39 P +3.3V Analog Power supply PA0 40 AIO General Purpose I/O / ADC_IN2 / GT_CH0 / USR_RTS / I2C1_SCLPA1 41 AIO General Purpose I/O / ADC_IN3 / GT_CH1 / USR_CTS / I2C1_SDAPA2 42 AIO General Purpose I/O / ADC_IN4 / GT_CH2 / USR_TXPA3 43 AIO General Purpose I/O / ADC_IN5 / GT_CH3 / USR_RXPA4 44 AIO General Purpose I/O / ADC_IN6 / GT_CH0 / SPI_SCK / UR1_TX / I2C0_SCLPA5 45 AIO General Purpose I/O / ADC_IN7 / GT_CH1 / SPI_MISO / UR1_RX / I2C0_SDA
CLDO 46 P MCU Core power LDO 1.5V output. It is recommended to connect a 1μF capacitor as close as possible between this pin and VSS.
RFGND EP P
Exposed Pad on the bottom of the package. Internally connected to RFGND. Solder this exposed pad to a PCB pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground planes. These multiple ground vias are also required to achieve the noted RF performance.
Pin Alternate Function MappingTheBC32F7611usesthesamearchitectureastheCoretex-M0+32-bitStandardMCU(http://www.holtek.com.tw/producthome/-/pid/35/164/165),fortheMCUfilepleasedirectlyrefertotheHT32F52241relateddocuments(http://www.holtek.com.tw/productdetail/-/vg/HT32F52231-41_HT32F52331-41).
Symbol Parameter Test Conditions Min. Typ. Max. Unit
NENDUNumber of Guaranteed Program/Erase Cycles before Failure (Endurance) Ta = 0°C ~ 70°C 10 — — K cycles
tRET Data Retention Time Ta = 0°C ~ 70°C 10 — — YearstPROG Word Programming Time Ta = 0°C ~ 70°C 20 — — μstERASE Page Erase Time Ta = 0°C ~ 70°C 2 — — mstMERASE Mass Erase Time Ta = 0°C ~ 70°C 10 — — ms
CI isthestoragecapacitor,RIistheresistanceofthesamplingswitchandRSistheoutputimpedanceofthesignalsourceVS.Normallythesamplingphasedurationisapproximatelyequalto3.5/fADC.Thecapacitance,CI,mustbechargedwithinthistimeframeanditmustbeensuredthatthevoltageatitsterminalsbecomessufficientlyclosetoVSforaccuracy.Toguaranteethis,RSisnotallowedtohaveanarbitrarilylargevalue.
Symbol Parameter Test Conditions Min. Typ. Max. UnitSPI Master Mode
fSCK (1/tSCK) SPI Master Output SCK Clock Frequency
Master modeSPI peripheral clock frequency fPCLK
— — fPCLK/2 MHz
tSCK(H)
tSCK(L)SCK Clock High and Low Time — tSCK/2-2 — tSCK/2+1 ns
tV(MO) Data Output Valid Time — — — 5 nstH(MO) Data Output Hold Time — 2 — — nstSU(MI) Data Input Setup Time — 5 — — nstH(MI) Data Input Hold Time — 5 — — nsSPI Slave Mode
tSU(SEL) SEL Enable Setup Time — 3×tPCLK — — nstH(SEL) SEL Enable Hold Time — 2×tPCLK — — nstA(SO) Data Output Access Time — — — 3×tPCLK nstDIS(SO) Data Output Disable Time — — — 10 nstV(SO) Data Output Valid Time — — — 25 nstH(SO) Data Output Hold Time — 15 — — nstSU(SI) Data Input Setup Time — 5 — — nstH(SI) Data Input Hold Time — 4 — — ns
MCU CoreTheCortex®-M0+core is a very lowgate count,highlyenergyefficientprocessorthatis intendedformicrocontrolleranddeeplyembeddedapplicationsthatrequireanareaoptimized, low-powerprocessor.TheprocessorisbasedontheARMv6-MarchitectureandsupportsThumb®instructionsets,single-cycleI/Oport,hardwaremultiplierandlowlatencyinterruptrespondtime.
Reset Control Unit – RSTCUTheResetControlUnit,RSTCU,has threekindsofreset,apoweronreset,asystemresetandanAPBunitreset.Thepoweronreset,knownasacoldreset,resetsthefullsystemduringpowerup.Asystemresetresets theprocessorcoreandperipheral IPcompo-nentswiththeexceptionoftheSW-DPcontroller.Theresetscanbetriggeredbyanexternalsignal,internaleventsandtheresetgenerators.
MCU Clock Control Unit – CKCUTheClockControlunit,CKCU,providesarangeofoscillatorandclockfunctions.TheseincludeaHighSpeedInternalRCoscillator(HSI),aHighSpeedEx-ternalcrystaloscillator(HSE),aLowSpeedInternalRCoscillator (LSI),aLowSpeedExternalcrystaloscillator (LSE),aPhaseLockLoop(PLL),aHSEclockmonitor,clockprescalers,clockmultiplexers,APBclockdividerandgatingcircuitry.TheAHB,APBandCortex®-M0+clocksarederivedfromthesystemclock (CK_SYS)whichcancomefromtheHSI,HSEorPLL.TheWatchdogTimerandRealTimeClock(RTC)useeithertheLSIorLSEastheirclocksource.
Analog to Digital Converter – ADCA12-bitmulti-channelADCisintegratedinthedevice.Therearemultiplexedchannels,whichinclude6externalanalogsignalchannelsand2internalchannelswhichcanbemeasured. If the inputvoltage is required toremainwithinaspecificthresholdwindow,anAnalogWatchdogfunctionwillmonitoranddetectthesesignals.Aninterruptwillthenbegeneratedtoinformthedevicethattheinputvoltageisnotwithinthepresetthresholdlevels.Therearethreeconversionmodestoconvertananalogsignaltodigitaldata.TheADCcanbeoperatedinoneshot,continuousanddiscontinuousconversionmodes.
I/O Ports – GPIOThereare22GeneralPurposeI/Opins,GPIO,namedfromPortA~B for the implementationof logicinput/outputfunctions.EachoftheGPIOportshasaseriesofrelatedcontrolandconfigurationregisterstomaximizeflexibilityandtomeettherequirementsofawiderangeofapplications.
TheGPIOportsarepin-sharedwithotheralternativefunctionstoobtainmaximumfunctionalflexibilityonthepackagepins.TheGPIOpinscanbeusedasalter-nativefunctionalpinsbyconfiguringthecorrespond-ingregisters regardlessof the inputoroutputpins.TheexternalinterruptsontheGPIOpinsofthedevicehaverelatedcontrolandconfigurationregistersintheExternalInterruptControlUnit,EXTI.
Motor Control Timer – MCTMTheMotorControlTimerconsistsofasingle16-bitup/downcounter,four16-bitCCRs(Capture/CompareRegisters),singleone16-bitcounter-reloadregister(CRR), single8-bit repetitioncounterandseveralcontrol/status registers. Itcanbeusedforavarietyofpurposesincludingmeasuringthepulsewidthsofinputsignalsorgeneratingoutputwaveformssuchascomparematchoutputs,PWMoutputsorcomplementaryPWMoutputswithdead-timeinsertion.TheMCTMiscapableofofferingfullfunctionalsupportformotorcontrol,hallsensorinterfacingandbrakeinput.
Basic Function Timer – BFTMTheBasicFunctionTimer isasimplecount-up32-bitcounterdesigned tomeasure time intervalsandgenerateaoneshotorrepetitiveinterrupts.TheBFTMoperates in twofunctionalmodes, repetitiveoroneshotmode.IntherepetitivemodetheBFTMrestartsthecounterwhenacomparematcheventoccurs.TheBFTMalsosupportsaoneshotmodewhichforcesthecounter tostopcountingwhenacomparematcheventoccurs.
Real Time Clock – RTCThe Real Time Clock, RTC, includes an APBinterface,a24-bitcount-upcounter,acontrolregister,aprescaler,acompareregisterandastatusregister.Mostof theRTCcircuitsare located in theBackupDomain except for theAPB interface.TheAPBinterface is located in theVDD15powerdomain.Therefore,itisnecessarytobeisolatedfromtheISOsignal thatcomesfromthepowercontrolunitwhentheVDD15powerdomain ispoweredoff, that iswhenthedeviceenters thePower-Downmode.TheRTCcounterisusedasawakeuptimertogenerateasystemresumesignalfromthePower-Downmode.
Universal Synchronous Asynchronous Receiver Transmitter – USARTTheUniversalSynchronousAsynchronousReceiverTransceiver,USART,providesaflexiblefullduplexdataexchangeusingsynchronousorasynchronousdata transfer.TheUSARTisused to translatedatabetweenparallelandserialinterfaces,andiscommonlyusedforRS232standardcommunication.TheUSARTperipheral functionsupports four typesof interruptincludingLineStatus Interrupt,TransmitterFIFOEmptyInterrupt,ReceiverThresholdLevelReachingInterruptandTimeOutInterrupt.TheUSARTmoduleincludesatransmitterFIFO,(TX_FIFO)andreceiverFIFO(RX_FIFO).ThesoftwarecandetectaUSARTerrorstatusbyreadingtheLineStatusRegister,LSR.The status includes the typeand theconditionoftransferoperationsaswellasseveralerrorconditionsresultingfromParity,Overrun,FramingandBreakevents.
• Suppor ts both asynchronous and c lockedsynchronousserialcommunicationmodes
Cyclic Redundancy Check – CRCTheCRC calculation unit is an error detectiontechniquetestalgorithmwhichisusedtoverifydatatransmissionor storagedata correctness.ACRCcalculation takesadata streamorablockofdataas its inputandgeneratesa16-bitor32-bitoutputremainder.Ordinarily,adatastreamissuffixedbyaCRCcodeandusedasachecksumwhenbeingsentorstored.Therefore,thereceivedorrestoreddatastreamiscalculatedby thesamegeneratorpolynomialasdescribedabove.IfthenewCRCcoderesultdoesnotmatchtheonecalculatedearlier,thenthismeansthatthedatastreamcontainsadataerror.
BLE Application Controller Interface TheBC32F7611BLEfunctionissetbytheinternalSPIinterface.FortheBLEprotocol, theWriteFIFOcommandmustbesent first foreachCMDfromthehosttotheBLEcontrollerandthereadFIFOcommandmustbesentfirstforeachReturnoperation.Datafollowsthelittle-endianformat.Commandsareshownbelow.
Abbreviation ExplanationBD Bluetooth DeviceBD_Addr Bluetooth Device AddressBD_Name Bluetooth Device Name
Rev. 1.00 23 October 26, 2017
BC32F7611
Opcode Read Command Write Command Description
0x30 IntvRead Read connection interval setting (only valid when connected)
BLE Control InterfaceThe innerconnectionbetween theMCUandBLEcontrollerisdescribedasbelow.Thedeviceincludesa5-wire,8-bit,MSB-first,Motorola-compatiblewithCPOL=0andCPHA=0SPIinterface.Theinterfacehasthefollowingfeatures.
SPI_CLK In ClockSPI_MOSI In Master output slave inputSPI_MISO Out Master input slave outputSPI_CS In EnableSPI_INT Out Interrupt request
BLE SPI Signal Function
Protocol and TimingTheBLESPItimingdiagramisshownbelow.
SPI_CLK CPOL=0
SPI_MOSI
SPI_MISO
SPI_CS
MSB 6 5 4 3 2 1 LSB
MSB 6 5 4 3 2 1 LSB
BLE SPI Timing Diagram
BLE Command Format and TimingTheBLEregisterscanbeaccessedbyboththehostandcontrollerforgettingorconfiguringthestatusofBLEcontroller.
BLE Register
name
BLE Register Address
Parameter Value Description
Threshold 0x00 Bit[11:6]: BLE TX FIFO threshold Bit[5:0]: BLE RX FIFO threshold
Int_status 0x01
Interrupt status: Bit[4]: BLE RX FIFO not empty Bit[3]: BLE RX FIFO overflow Bit[2]: BLE RX FIFO over threshold Bit[1]: BLE RX FIFO empty Bit[0]: BLE RX FIFO under threshold
Int_Set 0x02
Interrupt Enable: For detail bits definition, refer to Int_status. Set 1 to enable INT
Int_Clr 0x03Interrupt clear, write onlyFor detail definition, refer to Int_status. Set 1 to clear the status bit
FIFOCount 0x04 Bit[11:6]: BLE TX FIFO countBit[5:0]: BLE RX FIFO count
BLE SPI Interface Register Description
BLE CMD FORMATCMD Name Bit[7:5] Bit[4:0]
Read Register 000b Bit[4:1]: BLE Register address,
bit[0] =1Write Register 001b Bit[4:1]: BLE Register address,
bit[0] =1Read FIFO 011b Bit[4:0]=data length, 0 means 32
bytes, 1 means 1 byteWrite FIFO 101b Bit[4:0]=data length, 0 means 32
Sleep and Wake-up TheWAKEUP pin is used for the BC32F7611operationmode setting.When theWAKEUPpinis low, theBLEcanenter the sleepmodeand theBC32F7611 can check the operationmode bymonitoringtheSTATEpin.WhentheBLEcontrollerisinSleepmode,itcanbewokenupbytheinternalBLE_SPIortheWAKEUPpin.
Power-Down Mode ThePDNpinisusedfortheBLEpower-downmodesetting.IfthePDNpinpulledlow,theBLEcontrollerwill enter thepower-downmode and all internalclockswillbedisabled.
External InterruptTheBLEcontrollerprovidesan INT_EXTpin tooutput the interruptsignalof themicrocontroller. IftheINT_EXTpin is low, itmeans thevaliddata isready.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek's products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com/en/.