31250270-Metro 1050 Hardware Description Manual(V1.40)

1 Overview 1-1........................................................................................................

1.1 Structure of the OptiX Metro 1050 I 1-3........................................................1.1.1 The Front Panel 1-3.............................................................................1.1.2 The Rear Panel 1-5..............................................................................

1.2 of the OptiX Metro 1050 II 1-7......................................................................1.3 Boards 1-10....................................................................................................1.4 Cables 1-12....................................................................................................1.5 Technical Specifications 1-12.........................................................................

2 Boards Description 2-1.......................................................................................

2.1 STM-1 Optical Interface Board (SL1/SD1) 2-1.............................................2.1.1 Functions 2-1.......................................................................................2.1.2 Principle 2-2.........................................................................................2.1.3 Front Panel 2-3....................................................................................2.1.4 Parameter Configuration 2-4................................................................2.1.5 Technical Parameters 2-5....................................................................

2.2 STM-1 Single-fiber Bidirectional Optical Interfaces Board (SB2D) 2-6........2.2.1 Functions 2-6.......................................................................................2.2.2 Principle 2-6.........................................................................................2.2.3 Front Panel 2-8....................................................................................2.2.4 Parameter Configuration 2-9................................................................2.2.5 Technical Parameters 2-9....................................................................

2.3 STM-1 Electrical Interface Board (SLE/SDE/EU1S/EU2S/EUPB) 2-11.........2.3.1 Functions 2-11.......................................................................................2.3.2 Principle 2-11.........................................................................................2.3.3 Front Panel 2-13....................................................................................2.3.4 Tributary Protection Switching 2-14.......................................................2.3.5 Parameter Configuration 2-16................................................................2.3.6 Technical Parameters 2-17....................................................................

2.4 STM-1 Optical Interface Board (OSB1) 2-18..................................................2.4.1 Functions 2-18.......................................................................................2.4.2 Principle 2-18.........................................................................................2.4.3 Parameter Configuration 2-19................................................................2.4.4 Technical Specifications 2-20................................................................

2.5 STM-4 Optical Interface Board (OSB4) 2-21..................................................2.5.1 Functions 2-21.......................................................................................2.5.2 Principle 2-21.........................................................................................2.5.3 Parameter Configuration 2-22................................................................2.5.4 Technical Specifications 2-23................................................................

2.6 E1/T1 Electrical Interface Board(PL1S/PL1D/PF1S/PF1D/PM1S/PM1D/C12/C12S) 2-24.....................................

2.6.1 Functions 2-25.......................................................................................2.6.2 Principle 2-25.........................................................................................2.6.3 Front Panel 2-26....................................................................................2.6.4 Tributary Protection Switching 2-30.......................................................2.6.5 Parameter Configuration 2-32................................................................2.6.6 Technical Specifications 2-33................................................................

2.7 E3/DS3 Electrical Interface Board (PL3/C34S/TSB3) 2-34............................2.7.1 Functions 2-34.......................................................................................2.7.2 Principle 2-34.........................................................................................2.7.3 Fornt Panel 2-36....................................................................................2.7.4 Tributary Protection Switching 2-37.......................................................2.7.5 Parameter Configuration 2-38................................................................2.7.6 Technical Specifications 2-39................................................................

2.8 Ethernet Interface Board (EMS3/ETF4/EFT) 2-40.........................................2.8.1 Functions 2-40.......................................................................................2.8.2 Principles 2-41.......................................................................................2.8.3 Front Panel 2-43....................................................................................2.8.4 Parameter Configuration 2-47................................................................2.8.5 Technical Parameters 2-48....................................................................

2.9 N x 64 kbit/s Rate Interface Board (N64/N64I) 2-49.......................................2.9.1 Functions 2-49.......................................................................................2.9.2 Principle 2-49.........................................................................................2.9.3 Front Panel 2-52....................................................................................2.9.4 Parameter Configuration 2-54................................................................2.9.5 Technical Parameters 2-54....................................................................

2.10 System Control & Communication Board (FSCC) 2-55................................2.10.1 Functions 2-55.....................................................................................2.10.2 Principle 2-55.......................................................................................2.10.3 Front Panel 2-56..................................................................................2.10.4 DIP Switches 2-58................................................................................2.10.5 Parameter Configuration 2-59..............................................................2.10.6 Technical Specifications 2-60..............................................................

2.11 Cross-connect & Timing Board (XCS/XCS1/XCS4) 2-61.............................2.11.1 Functions 2-61.....................................................................................2.11.2 Principle 2-61.......................................................................................2.11.3 Front Panel 2-62..................................................................................2.11.4 Parameter Configuration 2-64..............................................................2.11.5 Technical Specifications 2-65..............................................................

2.12 Engineering Orderwire Board (FEOW) 2-66.................................................

2.12.1 Functions 2-66.....................................................................................2.12.2 Principle 2-66.......................................................................................2.12.3 Front Panel 2-67..................................................................................2.12.4 Parameter Configuration 2-70..............................................................2.12.5 Technical Specifications 2-71..............................................................

2.13 Power Board (SPIU/FPIU) 2-72....................................................................2.13.1 Functions 2-72.....................................................................................2.13.2 Principle 2-72.......................................................................................2.13.3 Front Panel 2-73..................................................................................2.13.4 Parameter Configuration 2-74..............................................................2.13.5 Technical Specifications 2-75..............................................................

2.14 Fan Interface Board (FAN) 2-76...................................................................2.14.1 Functions 2-76.....................................................................................2.14.2 Principle 2-76.......................................................................................2.14.3 Front Panel 2-77..................................................................................2.14.4 Parameter Configuration 2-78..............................................................2.14.5 Technical Specifications 2-78..............................................................

2.15 Synchronous Timing Interface Board (STIA/STIB/STIC/STID) 2-79............2.15.1 Functions 2-79.....................................................................................2.15.2 Principle 2-79.......................................................................................2.15.3 Front Panel 2-80..................................................................................2.15.4 Technical Specifications 2-82..............................................................

2.16 Case-shape Optical Amplifier (COA) 2-83....................................................2.16.1 Functions 2-83.....................................................................................2.16.2 Principle 2-83.......................................................................................2.16.3 Front Panel 2-84..................................................................................2.16.4 Installing 2-86.......................................................................................2.16.5 Technical Specifications 2-87..............................................................

3 Cables Description 3-1.......................................................................................

3.1 75 ohm E1 Cable 3-2....................................................................................3.1.1 Structure 3-2........................................................................................3.1.2 Pin Assignments 3-3............................................................................3.1.3 Technical Specifications 3-4................................................................

3.2 120 ohm E1/T1 Cable 3-5............................................................................3.2.1 Structure 3-5........................................................................................3.2.2 Pin Assignments 3-5............................................................................3.2.3 Teachnical Specifications 3-7..............................................................

3.3 E3/DS3 Cable 3-8.........................................................................................3.3.1 Structure 3-8........................................................................................3.3.2 Technical Specifications 3-8................................................................

3.4 STM-1 Cable 3-9..........................................................................................3.4.1 Structure 3-9........................................................................................3.4.2 Technical Parameters 3-9....................................................................

3.5 Power Cable 3-10...........................................................................................3.5.1 Structure 3-10........................................................................................3.5.2 Pin Assignments 3-10............................................................................3.5.3 Technical Specifications 3-10................................................................

3.6 PGND Cable 3-11...........................................................................................3.7 75 ohm Clock Cable 3-11...............................................................................3.8 120 ohm Clock Cable 3-12.............................................................................

3.8.1 Structure 3-12........................................................................................3.8.2 Pin Assignments 3-12............................................................................3.8.3 Teachnical Specifications 3-13..............................................................

3.9 Network Cable 3-14........................................................................................3.9.1 Structure 3-14........................................................................................3.9.2 Pin Assignments 3-14............................................................................3.9.3 Technical Specifications 3-15................................................................

3.10 Fiber 3-16.....................................................................................................3.10.1 Structure 3-16......................................................................................3.10.2 Technical Specifications 3-16..............................................................

3.11 V.35 Cable 3-17............................................................................................3.11.1 Structure 3-17......................................................................................3.11.2 Pin Assignments 3-18..........................................................................3.11.3 Technical Specifications 3-18..............................................................

4 Power System 4-1...............................................................................................

4.1 Overview 4-1................................................................................................4.2 Power Box of the CAU 4-2...........................................................................4.3 Storage Battery Box of the CAU 4-2.............................................................4.4 Installation of the CAU 4-3............................................................................

A Power Consumption A-1....................................................................................

A.1 Power Consumption of the OptiX Metro 1050 A-1.......................................A.2 Power Consumption of the Boards A-2........................................................

B Board Indicators B-1...........................................................................................

B.1 SL1/SD1/SB2D B-1......................................................................................B.2 PL1D/PL1S/PM1D/PM1S PF1D/PF1S B-2..................................................B.3 PL3 B-2.........................................................................................................B.4 SLE/SDE B-2................................................................................................B.5 EMS3 B-3.....................................................................................................B.6 EFT/ETF4 B-4..............................................................................................

B.7 XCS/XCS1/XCS4 B-4...................................................................................B.8 FEOW B-4....................................................................................................B.9 FSCC B-5.....................................................................................................B.10 PIU B-5.......................................................................................................B.11 FAN B-5......................................................................................................

C Abbreviations and Acronyms C-1.....................................................................

Index .................................................................................................................

Huawei Technologies Proprietary

HUAWEI

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Hardware Description Manual

V100R004


OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Hardware Description Manual Manual Version T2-042570-20041126-C-1.40

Product Version V100R004

BOM 31250270

Huawei Technologies Co., Ltd. provides customers with comprehensive technical support and service. Please feel free to contact our local office or company headquarters.

Huawei Technologies Co., Ltd. Address: Administration Building, Huawei Technologies Co., Ltd., Bantian, Longgang District, Shenzhen, P. R. China Postal Code: 518129 Website: http://www.huawei.com Email: [email protected]


Copyright © 2004 Huawei Technologies Co., Ltd.

All Rights Reserved No part of this document may be reproduced or transmitted in any form or by any means without prior written consent of Huawei Technologies Co., Ltd. Trademarks

, HUAWEI, C&C08, EAST8000, HONET, , ViewPoint, INtess, ETS, DMC, TELLIN, InfoLink, Netkey, Quidway, SYNLOCK, Radium, M900/M1800, TELESIGHT, Quidview, Musa, Airbridge, Tellwin, Inmedia, VRP, DOPRA, iTELLIN, HUAWEIOptiX, C&C08 iNET, NETENGINE, OptiX, iSite, U-SYS, iMUSE, OpenEye, Lansway, SmartAX, infoX, TopEng are trademarks of Huawei Technologies Co., Ltd. All other trademarks and trade names mentioned in this manual are the property of their respective holders. Notice The information in this document is subject to change without notice. Every effort has been made in the preparation of this document to ensure accuracy of the contents, but all statements, information, and recommendations in this document do not constitute the warranty of any kind, express or implied.


Summary of Updates

This section provides a summary of updates of this manual.

Update History

Manual version Notes

T2-042516-20030325-C-1.10 Initial commercial release

T2-042515-20040330-C-1.20 Second commercial release

T2-042544-20040630-C-1.30 Third commercial release

T2-042570-20041126-C-1.40 Fourth commercial release

Updates of Contents

Updates between document versions are cumulative. Therefore, the latest document version contains all updates made to previous versions.

Updates in Manual Version 1.40

Chapter 1 Overview Information of the boards SDE, EFT and COA is added.

Chapter 2 Board Description Detailed description of the boards SDE, EFT and COA are added.


Chapter 1 Overview Information of the boards SLE, EU1S, EUPB, SB2D, N64 and N64I are added.

Chapter 2 Board Description Detailed description of the boards SLE, EU1S, EUPB, SB2D, N64 and N64I are added.


Chapter 1 Overview Information of the boards EMS3 and ETF4 are added.


Chapter 2 Board Description Detailed description of the boards EMS3 and ETF4 are added.

OptiX Metro 1050 Hardware Description Manual Contents


i

Contents

1 Overview 1-1

1.1 Structure of the OptiX Metro 1050 I 1-3

1.1.1 The Front Panel 1-3

1.1.2 The Rear Panel 1-5

1.2 Structure of the OptiX Metro 1050 II 1-7

1.3 Boards 1-10

1.4 Cables 1-12

1.5 Technical Specifications 1-12

2 Boards Description 2-1

2.1 STM-1 Optical Interface Board (SL1/SD1) 2-1

2.1.1 Functions 2-1

2.1.2 Principle 2-2

2.1.3 Front Panel 2-3

2.1.4 Parameter Configuration 2-4

2.1.5 Technical Parameters 2-5

2.2 STM-1 Single-fiber Bidirectional Optical Interfaces Board (SB2D) 2-6

2.2.1 Functions 2-6

2.2.2 Principle 2-6




2.3 STM-1 Electrical Interface Board (SLE/SDE/EU1S/EU2S/EUPB) 2-11

2.3.1 Functions 2-11

2.3.2 Principle 2-11



ii


2.3.4 Tributary Protection Switching 2-14



2.4 STM-1 Optical Interface Board (OSB1) 2-18




2.4.4 Technical Specifications 2-20

2.5 STM-4 Optical Interface Board (OSB4) 2-21





2.6 E1/T1 Electrical Interface Board (PL1S/PL1D/PF1S/PF1D/PM1S/PM1D/C12/C12S) 2-24







2.7 E3/DS3 Electrical Interface Board (PL3/C34S/TSB3) 2-34



2.7.3 Fornt Panel 2-36




2.8 Ethernet Interface Board (EMS3/ETF4/EFT) 2-40


2.8.2 Principles 2-41




2.9 N x 64 kbit/s Rate Interface Board (N64/N64I) 2-49





iii




2.10 System Control & Communication Board (FSCC) 2-55




2.10.4 DIP Switches 2-58



2.11 Cross-connect & Timing Board (XCS/XCS1/XCS4) 2-61






2.12 Engineering Orderwire Board (FEOW) 2-66






2.13 Power Board (SPIU/FPIU) 2-72






2.14 Fan Interface Board (FAN) 2-76






2.15 Synchronous Timing Interface Board (STIA/STIB/STIC/STID) 2-79





iv



2.16 Case-shape Optical Amplifier (COA) 2-83




2.16.4 Installing 2-86


3 Cables Description 3-1

3.1 75 ohm E1 Cable 3-2

3.1.1 Structure 3-2

3.1.2 Pin Assignments 3-3


3.2 120 ohm E1/T1 Cable 3-5

3.2.1 Structure 3-5


3.2.3 Teachnical Specifications 3-7

3.3 E3/DS3 Cable 3-8

3.3.1 Structure 3-8


3.4 STM-1 Cable 3-9

3.4.1 Structure 3-9


3.5 Power Cable 3-10

3.5.1 Structure 3-10



3.6 PGND Cable 3-11

3.7 75 ohm Clock Cable 3-11

3.8 120 ohm Clock Cable 3-12



3.8.3 Teachnical Specifications 3-13

3.9 Network Cable 3-14





v


3.10 Fiber 3-16



3.11 V.35 Cable 3-17




4 Power System 4-1

4.1 Overview 4-1

4.2 Power Box of the CAU 4-2

4.3 Storage Battery Box of the CAU 4-2

4.4 Installation of the CAU 4-3

A Power Consumption A-1

A.1 Power Consumption of the OptiX Metro 1050 A-1

A.2 Power Consumption of the Boards A-2

B Board Indicators B-1

B.1 SL1/SD1/SB2D B-1

B.2 PL1D/PL1S/PM1D/PM1S PF1D/PF1S B-2

B.3 PL3 B-2

B.4 SLE/SDE B-2

B.5 EMS3 B-3

B.6 EFT/ETF4 B-4

B.7 XCS/XCS1/XCS4 B-4

B.8 FEOW B-4

B.9 FSCC B-5

B.10 PIU B-5

B.11 FAN B-5

C Abbreviations and Acronyms C-1

Index I-1

OptiX Metro 1050 Hardware Description Manual Figures


vi

Figures

Figure 1-1 Appearance of the OptiX Metro 1050 I 1-1

Figure 1-2 Appearance of the OptiX Metro 1050 II 1-2

Figure 1-3 Front slot assignment of the OptiX Metro 1050 I 1-3

Figure 1-4 Rear slot assignment of the OptiX Metro 1050 I 1-5

Figure 1-5 Slot assignment of the OptiX Metro 1050 II 1-7

Figure 2-1 Principle block diagram of SL1 2-2

Figure 2-2 The SL1 board front panel 2-3

Figure 2-3 The SD1 board front panel 2-3

Figure 2-4 Principle block diagram of SB2D 2-7

Figure 2-5 The SB2D board front panel 2-8

Figure 2-6 Principle block diagram of SLE 2-12

Figure 2-7 The SLE board front panel 2-13

Figure 2-8 The SDE board front panel 2-13

Figure 2-9 The EU1S board front panel 2-13

Figure 2-10 The EU2S board front panel 2-13

Figure 2-11 The EUPB board front panel 2-14

Figure 2-12 Block diagram of TPS protection to the SLE board 2-15

Figure 2-13 Configuration of the working and the protection SLE under TPS 2-15

Figure 2-14 Principle block diagram of OSB1 2-18

Figure 2-15 Principle block diagram of OSB4 2-21

Figure 2-16 Block diagram of the PM1S board 2-25

Figure 2-17 Process of mapping and multiplexing 2048 kbit/s or 1544 kbit/s signals 2-26

Figure 2-18 The PL1S board front panel 2-27

Figure 2-19 The PL1D board front panel 2-27

Figure 2-20 The PF1S board front panel 2-27



vii

Figure 2-21 The PF1D board front panel 2-27

Figure 2-22 The PM1S board front panel 2-27

Figure 2-23 The PM1D board front panel 2-28

Figure 2-24 The C12 board front panel 2-28

Figure 2-25 The C12S board front panel 2-28

Figure 2-26 The DB78 connector of the C12 board 2-29

Figure 2-27 Principle of TPS for PL1S/PL1D/PF1S/PF1D/PM1S/PM1D 2-31

Figure 2-28 Slot assignment for the working and protection PL1S/PL1D/PF1D/PF1S/PM1S/PM1D under TPS 2-32

Figure 2-29 Block diagram of the PL3 board 2-35

Figure 2-30 Process of mapping and multiplexing 34368 kbit/s or 44736 kbit/s signal 2-35

Figure 2-31 The PL3 board front panel 2-36

Figure 2-32 The C34S board front panel 2-36

Figure 2-33 The TSB3 board front panel 2-36

Figure 2-34 Principle of TPS for PL3 board 2-37

Figure 2-35 Configuration of the working and the protection PL3 under TPS 2-38

Figure 2-36 Principle block diagram of EMS3 2-42

Figure 2-37 Principle block diagram of EFT 2-42

Figure 2-38 The EMS3 board front panel 2-43

Figure 2-39 The ETF4 board front panel 2-44

Figure 2-40 The EFT board front panel 2-44

Figure 2-41 Pins on RJ-45 connector of the EMS3, ETF4 and EFT 2-47

Figure 2-42 Principle block diagram of N64 2-50

Figure 2-43 Mapping and multiplexing of E1 signal 2-51

Figure 2-44 The N64 board front panel 2-52

Figure 2-45 The N64I board front panel 2-52

Figure 2-46 Block diagram of the FSCC board 2-55

Figure 2-47 The FSCC board front panel 2-56

Figure 2-48 F&f interface 2-58

Figure 2-49 Pinouts of RJ-45 connector of FSCC 2-58

Figure 2-50 Location of DIP switches on the FSCC 2-59

Figure 2-51 Block diagram of the XCS/XCS1/XCS4 board 2-61

Figure 2-52 SD cross-connect and TD cross-connect 2-62

Figure 2-53 The XCS board front panel 2-63

Figure 2-54 The XCS1 board front panel 2-63

Figure 2-55 The XCS4 board front panel 2-63



viii

Figure 2-56 Block diagram of the FEOW board 2-66

Figure 2-57 The FEOW board front panel 2-67

Figure 2-58 RJ-11 pin numbering of the FEOW 2-68

Figure 2-59 Positions of X3, X2, X1 and F2 bytes in the STM frame structure 2-68

Figure 2-60 RJ-45 pin numbering of the FEOW 2-69

Figure 2-61 Block diagram of the power board 2-72

Figure 2-62 The SPIU board front panel 2-73

Figure 2-63 The FPIU board front panel 2-74

Figure 2-64 Block diagram of the FAN 2-76

Figure 2-65 The FAN board front panel 2-77

Figure 2-66 The position of the fans on the FAN board 2-78

Figure 2-67 Block diagram of the STIA/STIB/STIC/STID 2-79

Figure 2-68 The STIA board front panel 2-80

Figure 2-69 The STIB board front panel 2-80

Figure 2-70 The STIC board front panel Front panel of the 2-80

Figure 2-71 The STID board front panel 2-80

Figure 2-72 Principle block diagram of COA 2-83

Figure 2-73 Front panel diagram of COA case-shaded 2-84

Figure 2-74 The DIP switches of the COA 2-85

Figure 2-75 The position of the COA in OptiX rack 2-86

Figure 3-1 Structure of the 75 ohm E1 cable 3-2

Figure 3-2 Pin assignments of DB78 connector for 75 ohm E1 cable 3-2

Figure 3-3 Arrangement of the eight cores 3-2

Figure 3-4 Structure of the 120 ohm E1/T1 cable 3-5

Figure 3-5 Pin assignments of DB78 connector for 120 ohm E1/T1 cable 3-5

Figure 3-6 Structure of the 75 ohm E3/DS3 cable 3-8

Figure 3-7 Structure of the STM-1 cable 3-9

Figure 3-8 Structure of the –48 V/–60 V DC power cable 3-10

Figure 3-9 Structure of the PGND grounding cable 3-11

Figure 3-10 Structure of the 75 ohm clock cable 3-11

Figure 3-11 Structure of the 120 ohm clock cable 3-12

Figure 3-12 Structure of the network cable 3-14

Figure 3-13 RJ-45 connector 3-14

Figure 3-14 Structure of the fiber 3-16

Figure 3-15 Structure of the V.35 cable 3-17

Figure 3-16 Pins on the DB34 connector 3-17



ix

Figure 4-1 Front view of the CAU power box 4-2

Figure 4-2 Storage battery box of the CAU 4-2

Figure 4-3 The connection of the CAU and the OptiX Metro 1050 4-3

OptiX Metro 1050 Hardware Description Manual Tables


x

Tables

Table 1-1 The relation between boards and slots in the front panel 1-4

Table 1-2 The relation between boards and slots in the rear panel 1-5

Table 1-3 Slots for processing boards and corresponding slots for interface boards. 1-6

Table 1-4 Relation between boards and slots of the OptiX Metro 1050 II 1-8

Table 1-5 Slots for processing boards and corresponding slots for interface boards 1-9

Table 1-6 Board configuration resources 1-10

Table 1-7 The technical specifications of the OptiX Metro 1050 1-12

Table 2-1 Description of indicator of SL1/SD1 2-4

Table 2-2 Corresponding relationship between the C2 byte and the service type 2-4

Table 2-3 Description of indicator of SB2D 2-8


Table 2-5 Description of indicator of SLE/SDE 2-14

Table 2-6 Description of interfaces of EUIS/EU2S 2-14




Table 2-10 Different function of PL1S, PL1D, PF1D, PF1S, PM1D and PM1D 2-24

Table 2-11 Description of indicator of PL1S/PL1D/PF1S/PF1D/PM1S/PM1D 2-28

Table 2-12 Pinouts of DB78 interface 2-29

Table 2-13 Corresponding relation of the working and protection PL1S/PL1D/PF1S/PF1D/PM1S/PM1D under 1:5 protection 2-31

Table 2-14 Description of indicator of PL3 2-37

Table 2-15 Description of interfaces of C34S 2-37

Table 2-16 Service processing capability and access capability of EMS3 and ETF4 2-40

Table 2-17 Description of indicator of EMS3 2-45

OptiX Metro 1050 Hardware Description Manual Tables


xi

Table 2-18 Description of indicator of ETF4 and EFT 2-46

Table 2-19 Description of interfaces on the front panel of EMS3 2-46

Table 2-20 Description of interfaces on the front panel of ETF4 2-46

Table 2-21 Description of interfaces on the front panel of EFT 2-46

Table 2-22 Service processing capability and access capability of N64 and N64I 2-49

Table 2-23 Description of interface on the front panel of N64 and N64I 2-52

Table 2-24 Pin assignment of DB28 connector for N64 and N64I 2-53

Table 2-25 Description of indicators of FSCC 2-57

Table 2-26 Description of indicators of XCS, XCS1 and XCS4 2-64

Table 2-27 Description of indicators of the FEOW 2-67

Table 2-28 Pin assignment of S1 interface 2-69




Table 2-32 Description of indicator of the SPIU/FPIU 2-74

Table 2-33 Description of indicators of FAN board 2-78

Table 2-34 The interface description of the STIA and STIB board 2-81

Table 2-35 Pin assignment of DB9 2-81

Table 2-36 Description of indicators of COA 2-85

Table 2-37 Description of the monitor 2-85

Table 3-1 Pin assignments of the DB78 connector for 75 ohm E1 cable 3-3

Table 3-2 Pin assignments of the DB78 connector for 120 ohm E1/T1 cable 3-6

Table 3-3 Pin assignments of the 3-core connector for power cable 3-10

Table 3-4 Pin assignments of the DB9 connector for 120 ohm clock cable 3-12

OptiX Metro 1050 Hardware Description Manual About This Manual


xii

About This Manual

Related Manuals

The related manuals are listed in the following table. Manual Usage

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Technical Manual System Documentation Guide

Introduces the manuals used for project planning, hardware installation, commissioning, service configuration, and maintenance, including the contents and usage of the manuals.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Technical Manual System Description Volume

Introduces the functionality, structure, performance, specifications, and theory of the product, letting user get a preliminary understanding of the equipment.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Technical Manual Networking and Application Volume

Introduces the networking and protection of SDH, PDH, and Ethernet services, as well as the planning of NE ID, orderwire and clock.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Hardware Description Manual

Introduces the hardware architecture, functions, principles, interfaces and technical parameters of respective boards, as well as the cable of the equipment, facilitating user to get a deeper understanding of the equipment.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Installation Manual

Introduces the equipment installation procedure and the cable arrangement requirements, offering user instructions to install the equipment.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Service Configuration Guide

Guides you through the configuration of SDH and Ethernet services on the T2000 network management system. Configuration examples are provided.



xiii

Manual Usage

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Maintenance Manual

Introduces the precautions and common methods for the equipment maintenance, offering user instructions to perform the routine maintenance. Various alarm reasons and handling methods are described to help user in troubleshooting.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Commissioning Guide

Introduces equipment commissioning process, including hardware, software, and service operation.

OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Electronic Documentation (CD-ROM)

Contains all manuals in the print documentation package in CD-ROM format, readable with Acrobat Reader and is convenient to use and carry.

Organization

The manual is organized as follows: Chapter Description

Chapter 1 Overview Introduces the architecture, slot assignment, board type, and relation between boards and slots, and the classification of cables.

Chapter 2 Board Description Gives detailed introduction to respective boards of the OptiX Metro 1050 from the following aspects: Functions and principle Front panel (includes the description of the interfaces and indicators)

Parameter configuration Technical parameters

Chapter 3 Cable Description Gives detailed introduction to the cables of the OptiX Metro 1050 from the following aspects: Structure Pin assignment Technical parameters

Chapter4 Power System Introduces the power system of the OptiX Metro 1050.

Appendix A Power Consumption

Summarizes the power consumption of the equipment and respective boards for convenient query.

Appendix B Board Indicators Summarizes the description of various board indicators for convenient query.

Appendix C Abbreviations and Acronyms

Summarizes all abbreviations and acronyms in this manual.

Index The index



xiv

Intended Audience

This manual is intended for: Network administrators Maintenance engineers Provisioning engineers

Conventions

The manual uses the following conventions. Symbol Conventions

Symbol Description

Warning A warning notice with this symbol indicates a risk of personal injury.

Caution A caution notice with this symbol indicates a risk to equipment damage or loss of data.

Important Note

An important note notice with this symbol helps you avoid an undesirable situation or indicates important supplementary information.

Note A note notice with this symbol indicates additional, helpful, non-critical information.

OptiX Metro 1050 Hardware Description Manual 1 Overview


1-1

1 Overview

This chapter introduces the architecture, slot assignment and equipment composition of the OptiX Metro 1050.

The OptiX Metro 1050 adopts a box-shaped design. There are two equipment types:

OptiX Metro 1050 I as shown in Figure 1-1

OptiX Metro 1050 II as shown in Figure 1-2

Figure 1-1 Appearance of the OptiX Metro 1050 I



1-2

Figure 1-2 Appearance of the OptiX Metro 1050 II



1-3

1.1 Structure of the OptiX Metro 1050 I

The front panel and the rear panel of the OptiX Metro 1050 I provide front outlets and rear outlets respectively.

1.1.1 The Front Panel

Slot assignment Figure 1-3 shows the front slot assignment of the OptiX Metro 1050 I. Slot 15–20 and slot 33 are logical slots in T2000 network management system (NMS).

XCS A XCS B

Slot 13

Slot 1 Slot 2 Slot 3




Slot 17 Slot 18

Slot 33 Slot 15 Slot 16 Slot 19 Slot 20

Figure 1-3 Front slot assignment of the OptiX Metro 1050 I

Installed unit Plesiochronous digital hierarchy (PDH) electrical interface processing unit

Synchronous digital hierarchy (SDH) optical interface unit

Ethernet network interface processing unit

Cross-connect & timing unit

System control unit

Power supply unit

Engineering orderwire unit

Fan unit



1-4

Relation between boards and slots

In the front panel, the relation between boards and slots is given in Table 1-1.

Table 1-1 The relation between boards and slots in the front panel

Slots Board Remarks

slots 1, 2 FPIU/SPIU Null

slot 3 FSCC Null

slots 4, 5, 6, 10, 11, 12 PL1S, PL1D, PF1S, PF1D, PM1S, PM1D, PL3, N64

Null

slots 4, 5, 10, 11 EMS3, EFT Null

slots 10, 11 SL1, SD1, SLE, SDE, SB2D

Null

slots 7, 8 XCS1, XCS4, XCS

slots 17, 18 OSB1, OSB4

slots 15, 16, 19, 20 COA Logical slot in NMS

slot 33 CAU Logical slot in NMS

slot 9 FEOW Null



1-5

1.1.2 The Rear Panel

Slot assignment Figure 1-4 shows the rear slot assignment of the OptiX Metro 1050 I.

XCS BSlot 21



Figure 1-4 Rear slot assignment of the OptiX Metro 1050 I

Installed unit Electrical interface commutator

Electrical interface switching & bridging unit

Synchronous timing interface unit


In the rear panel, the relation between boards and slots is given in Table 1-2.

Table 1-2 The relation between boards and slots in the rear panel

Slot Board Remarks

slot 21 STIA/STIB Null

slots 24, 25, 26, 30, 31 or 32

C12, C12S,C34S, N64I

Null

slots 24, 25, 30 or 31

ETF4 Null

slot 26 or 32 TSB3 Only TSB3 board can be inserted in this slot if tributary protection switching (TPS) is provided for 34368 kbit/s or 44736 kbit/s services.

slot 30 or 31 EU1S, EU2S Null

slot 31 EUPB Null

Table 1-3 shows the front slots for processing boards and the corresponding rear slots for interface boards.



1-6

Table 1-3 Slots for processing boards and corresponding slots for interface boards.

Slot for processing board Corresponding slot for interface board

slot 24 slot 4

slot 25 slot 5

slot 26 slot 6

slot 30 slot 10

slot 31 slot 11

slot 32 slot 12

slot 21 slots 7, 8



1-7

1.2 Structure of the OptiX Metro 1050 II

Slot assignment The outlets are on the front panel of the OptiX Metro 1050 II. Figure 1-5 shows the slot assignment. Slot 15–20 and slot 33 are logical slots in T2000 NMS.

Slot 13



Slot 9


Slot 26

Slot 31 Slot 21Slot 30

Slot 24

Slot 13



Slot 9


Slot 13



Slot 9


Slot 26

Slot 31 Slot 21/32Slot 30

Slot 24

Slot 13



Slot 9


Slot 26

Slot 31 Slot 21Slot 30

Slot 24

Slot 13



Slot 9


Slot 13





Slot 25 Slot 26

Slot 31 Slot 21/32Slot 30

Slot 24

Slot 33 Slot 15 Slot 16 Slot 19 Slot 20

Slot 17 Slot 18

Figure 1-5 Slot assignment of the OptiX Metro 1050 II

Installed unit The OptiX Metro 1050 II can be divided into two parts:

In the lower part

Plesiochronous digital hierarchy (PDH) electrical interface processing unit

Synchronous digital hierarchy (SDH) optical interface unit

Ethernet network interface processing unit

Cross-connect & timing unit

System control unit

Power supply unit

Engineering orderwire unit

Fan unit

In the upper part:

Electrical interface commutator

Electrical interface switching & bridging unit

Synchronous timing interface unit



1-8


In the OptiX Metro 1050 II, the relation between boards and slots is given in Table 1-4.

Table 1-4 Relation between boards and slots of the OptiX Metro 1050 II

Slot Board

slots 1, 2 FPIU/SPIU

slot 3 FSCC

slots 4, 5, 6, 10, 11, 12 PL1S, PL1D, PM1S, PM1D, PF1S, PF1D, PL3, N64

slots 4, 5, 10, 11 EMS3, EFT

slots 10, 11 SL1, SD1, SLE, SDE, SB2D

slots 7, 8 XCS4, XCS1, XCS

slots 17, 18 OSB1, OSB4

slot 9 FEOW

slot 13 FAN

slots 15, 16, 19, 20 COA

slot 33 CAU

slot 21 STIC/STID

slots 24, 25, 26, 30, 31, 32 C12, C12S, C34S, N64I

slots 24, 25, 30, 31 ETF4

slots 26, 32 TSB3

slots 30, 31 EU1S, EU2S

slot 31 EUPB

Table 1-5 shows the front slots for processing boards and the corresponding rear slots for interface boards.



1-9

Table 1-5 Slots for processing boards and corresponding slots for interface boards

Slot for processing board Corresponding slot for interface board

slot 24 slot 4

slot 25 slot 5

slot 26 slot 6

slot 30 slot 10

slot 31 slot 11

slot 32 slot 12

slot 21 slots 7, 8

Note:

The synchronous timing interface boards STIC/STID and PDH interface bridging board use the same slot: slot 21/32.

When the slot is seated with STIC/STID, the slot No. is slot 21.

When the slot is seated with PDH bridging board or switching board, the slot No. is slot 32.



1-10

1.3 Boards

Board configuration resources are shown in Table 1-6.

Table 1-6 Board configuration resources

Board Function description

PL1S 8 x 2048 kbit/s interfaces board

PL1D 16 x 2048 kbit/s interfaces board

PF1S 8 x 2048 kbit/s framed interfaces board

PF1D 16 x 2048 kbit/s framed interfaces board

PM1S 8 x 2048 kbit/s or 1544 kbit/s interfaces board

PM1D 16 x 2048 kbit/s or 1544 kbit/s interfaces board

C12 2048 kbit/s or 1544 kbit/s 75 ohm/100 ohm/120 ohm electrical interface commutator

C12S 2048 kbit/s or 1544 kbit/s 75 ohm/100 ohm/120 ohm electrical interface switching & bridge board

PL3 3 x 34368 kbit/s or 44736 kbit/s interfaces board

C34S 34368 kbit/s or 44736 kbit/s electrical interface switching board

TSB3 34368 kbit/s or 44736 kbit/s electrical interface switching & bridging board

EMS3 3-port FE/GE processing board

ETF4 4-port 10M/100M BAST fast Ethernet interface board

EFT Fast Ethernet transparent transmission board

N64 N x 64 kbit/s service processing board

N64I N x 64 kbit/s service access board

OSB1 STM-1 optical interface board

OSB4 STM-4 optical interface board

SL1 STM-1 optical interface board

SD1 2 x STM-1 optical interface board

SB2D STM-1 single-fiber bidirectional optical interfaces board

SLE STM-1 electrical interface board

SDE 2 x STM-1 electrical interface board

EU1S STM-1 electrical switching board

EU2S 2 x STM-1 electrical switching board



1-11

Board Function description

EUPB STM-1 electrical bridging board

XCS General cross-connect & timing board

XCS1 Cross-connect & timing board with STM-1 line board

XCS4 Cross-connect &timing board with STM-4 line board

FSCC System control and communication board

FEOW Engineering orderwire board

FPIU/ SPIU

Power input unit (DC input)

COA Case-shape optical amplifier

FAN Fan board

STIA Synchronous timing interface board -- with impedance of 75 ohm, is used for OptiX Metro 1050 I.

STIB Synchronous timing interface board with impedance of 120 ohm, is used for OptiX Metro 1050 I.

STIC Synchronous timing interface board with impedance of 75 ohm, is used for OptiX Metro 1050 II.

STID Synchronous timing interface board with impedance of 120 ohm, is used for OptiX Metro 1050 II.



1-12

1.4 Cables

The cables of the OptiX Metro 1050 include:

75 ohm E1 cable

120 ohm E1/T1 cable

75 ohm E3/DS3 cable

STM-1 cable

Power cable

PGND cable

Clock cable

Network cable

Fiber

V.35 cable

1.5 Technical Specifications

The technical specifications of the OptiX Metro 1050 are shown in Table 1-7

Full configuration: 4 x EMS3+4 x ETF4+ 2 x PM1D+2 x XCS4+FSCC+FEOW+ STIA

Typical configuration: EMS3+ETF4+2 x PM1D+2 x XCS4+FSCC+FEOW

Table 1-7 The technical specifications of the OptiX Metro 1050

Specifications OptiX Metro 1050 I OptiX Metro 1050 II

Dimensions 436 mm (W) x 365 mm (D) x 130.6 mm (H)

436 mm (W) x 291 mm (D) x 219 mm (H)

Weight Full configuration:15 kg

Topical configuration:12.5 kg

Power consumption

Full configuration: 114 W

Typical configuration: 55.5 W

Working voltage Within –48 V/–60 V; Range: –36.8 V to –72 V

OptiX Metro 1050 Hardware Description Manual 2 Boards Description


2-1

2 Boards Description

This chapter gives detailed introduction to the boards of the OptiX Metro 1050 from the following aspects:

Functions

Principle

Front panel

Parameter configuration

Technical parameters

2.1 STM-1 Optical Interface Board (SL1/SD1)

The STM-1 optical interface board includes:

SL1: the 1 x STM-1 optical interface board.

SD1: the 2 x STM-1 optical interface board.

Both the SL1 and SD1 boards receive and transmit the STM-1 optical signals. They can convert the optical STM-1 signals into electrical ones, extract and insert overhead bytes, and generate various alarm signals on the line.

SL1 and SD1 can be seated in slot 10 or slot 11.

2.1.1 Functions

Receives/transmits STM-1 optical signals.

Provides Ie-1 optical interface and S-1.1, L-1.1 and L-1.2 standard optical interfaces, with their characteristics compliant with ITU-T Recommendation G.957.

Provides inloop and outloop function.



2-2

Supports pass-through of the data communication channel (DCC) byte and orderwire byte. When the FSCC board is not in position, the D byte and E1/E2 byte can pass through the eastbound and westbound optical interface boards of this station, without affecting the DCC and orderwire communication between this station and other stations.

Supports automatic laser shutdown (ALS) function.

Detects and reports various alarm signals and performance events on the lines.

Supports online board query function.

2.1.2 Principle

The SL1 board is taken as the example here for describing the working principle of the SL1 and SD1 boards. Figure 2-1 shows a principle block diagram of SL1.

STM-1

STM-1

FSCC board

Framesynchroni-zaion and

scramblingprocessing

module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

Figure 2-1 Principle block diagram of SL1

1. In Receive Direction

The O/E conversion module converts the received STM-1 optical signal into electrical ones and restores the clock signal. Then, it sends the clock signal together with the STM-1 electrical signals to the frame synchronization and scrambling module. The R_LOS alarm signal is also detected at the O/E conversion module.

At the frame synchronization and scrambling module, the incoming STM-1 electrical signals are descrambled and converted into parallel signals, and then sent to the overhead processing module. The R_LOF and R_OOF alarm signals are also detected at the frame synchronization and scrambling module.

The overhead processing module performs overhead extraction to the received STM-1 signals and converts them into VC-4 signals, which are sent to the cross-connect unit through the backplane.

2. In Transmit Direction

At overhead processing unit, the VC-4 signals from the cross-connect unit are



2-3

inserted with overhead bytes and then sent to the frame synchronization and scrambling module.

Parallel/serial conversion and scrambling are performed to the incoming STM-1 electrical signals at the frame synchronization and scrambling module. After that, the signals are sent to the E/O conversion module.

The E/O conversion module converts the electrical STM-1 signals into optical ones and then sends them onto optical fiber for transmission.

3. Auxiliary Functional Module

Logical control module: This module generates the timing clock and frame header information required by SL1/SD1. When fault occurs to the cross-connect board, it implements switching to the active/standby boards, and supports ALS function. When the FSCC board is not in position, it allows the overhead bytes to pass through the eastbound and westbound optical interface boards of this station.

2.1.3 Front Panel

The front panel of SL1 and SD1 is shown in Figure 2-2 and Figure 2-3 respectively.

SL1

Figure 2-2 The SL1 board front panel

SD1

Figure 2-3 The SD1 board front panel

There are alarm indicators and SC optical interfaces on the front panel of SL1 and SD1.



2-4

Indicator Table 2-1 gives a description to the alarm indicator.

Table 2-1 Description of indicator of SL1/SD1

Indicator Status Description

Off The optical power of interface 1 is normal. LOS1 (red)

On The interface 1 has no optical power input, or the optical power is too lower.

Off The optical power of interface 2 is normal. LOS2 (red)


Interface The SL1 has one pair of SC optical interfaces, providing input and output of 1 x STM-1 optical signal.

The SD1 has two pairs of SC optical interfaces, providing input and output of 2 x STM-1 optical signals.

2.1.4 Parameter Configuration

Main parameters that should be configured for SL1/SD1 are as follows:

J0 byte Generally, the default value is used. The parameter configured for the interconnected equipments should be inconsistent.

C2 byte The C2 byte should be configured according to the service type in practice.

Table 2-2 shows the corresponding relationship between the parameter configuration of C2 byte and the service type.

Table 2-2 Corresponding relationship between the C2 byte and the service type

Service type C2 byte

E1 or T1 tugs

E3 or DS3 asyn

E4 a140

Laser status The laser can be set to either ON or OFF, and the former is the default setting.

Loopback Loopback is usually used for fault localization, falling into two types:

VC-4 loopback: for the one VC-4 in the STM-1 signal

Optical interface loopback: for VC-4 in the STM-1 signal.

The default setting is non-loopback.



2-5

2.1.5 Technical Parameters

Description Parameter SL1 SD1

Rate STM-1

Processing capability 1 x STM-1 2 x STM-1

Code pattern NRZ

Connector SC

Optical fiber 1310 nm, single-mode or multi-mode optical fiber

Dimensions 245 mm (L) x 100 mm (W)

Power consumption 4 W 4.5 W

Code of optical module

Ie-1 S-1.1 L-1.1 L-1.2

Transmission distance

0.5 km 15 km 50 km 80 km

Mean launched power

–19 dBm to –14 dBm


0 dBm to –5 dBm 0 dBm to –5 dBm

Receiver sensitivity –23 dBm –28 dBm –34 dBm –34 dBm

Overload point –14 dBm –8 dBm –10 dBm –10 dBm

Environment Temperature Humidity

Long-term working conditions: 0°C to 45°C 10% to 90%

Short-term working conditions: –5°C to 50°C 5% to 95%

For storage: –40°C to +70°C 10% to 100%

For transportation: –40°C to +70°C 10% to 100%



2-6

2.2 STM-1 Single-fiber Bidirectional Optical Interfaces Board (SB2D)

SB2D is a dual STM-1 single-fiber bidirectional optical interfaces board. It receives/transmits the STM-1 optical signals and fulfills the O/E conversion of STM-1 signals, extraction and insertion of overhead bytes and generation of alarm signals on the line.

The SB2D board can be seated in slot 10 and slot 11.

2.2.1 Functions

Receives/transmits STM-1 optical signals.

Provides L-1.1 standard optical interfaces, with their characteristics compliant with ITU-T Recommendation G.957.


Supports pass-through of the DCC byte and orderwire byte. When the FSCC board is not in position, the D byte and E1/E2 byte can pass through the eastbound and westbound optical interface boards of this station, without affecting the DCC and orderwire communication between this station and other stations.

Supports ALS function.



2.2.2 Principle

With the help of wavelength division multiplexing (WDM) technology, the SB2D board achieves unidirection on a single fiber, which is transmitting and receiving on the same fiber. Two optical signals of different wavelengths on a fiber are capable of transmitting and receiving at the same time. The SB2D board has two optical interfaces. The interface 1 transmits 1550 nm wavelength and receives 1310 nm wavelength, and the interface 2 transmits 1310 nm wavelength and receives 1550 nm wavelength.

Figure 2-4 take the processing of one channel STM-1 optical signal for example, the block diagram of the SB2D board is shown in Figure 2-4.



2-7

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

Figure 2-4 Principle block diagram of SB2D


The O/E conversion module converts the received STM-1 optical signal into electrical ones and restores the clock signal. Then, it sends the clock signal together with the STM-1 electrical signals to the frame synchronization and scrambling module. The R_LOS alarm signal is also detected at the O/E conversion module.




At overhead processing unit, the VC-4 signals from the cross-connect unit are inserted with overhead bytes and then sent to the frame synchronization and scrambling module.




Logical control module: This module generates the timing clock and frame header information required by SB2D. When fault occurs to the cross-connect board, it implements switching to the active/standby boards, and supports ALS function. When the FSCC board is not in position, it allows the overhead bytes to pass through the eastbound and westbound optical interface boards of this station.



2-8

2.2.3 Front Panel

The front panel of SB2D is shown in Figure 2-5.

Figure 2-5 The SB2D board front panel

There are alarm indicators and SC optical interfaces on the front panel of SB2D.

Indicator

Table 2-3 gives a description to the alarm indicator.

Table 2-3 Description of indicator of SB2D


Off The optical power of the interface 1 is normal. LOS1 (red)


Off The optical power of the interface 2 is normal. LOS2 (red)


Interface The SB2D board has one pair of SC optical interfaces, providing input and output of 2 x STM-1 optical signals.



2-9


Main parameters that should be configured for SB2D are as follows:


C2 byte

The C2 byte should be configured according to the service type in practice.




E1 or T1 tugs

E3 or DS3 asyn

E4 a140


Loopback Loopback is usually used for fault localization, falling into two types:





Description Parameter SB2D

Rate STM-1

Processing capability 2 x STM-1

Code pattern NRZ

Connector SC

Optical fiber 1310 nm, single-mode optical fiber


Power consumption 4.35 W

Code of optical module L-1.1

Transmission distance 50 km



2-10

Description Parameter SB2D

Mean launched power 0 dBm to –5 dBm

Receiver sensitivity –34 dBm

Overload point –10 dBm








2-11

2.3 STM-1 Electrical Interface Board (SLE/SDE/EU1S/EU2S/EUPB)

The SLE board is an STM-1 electrical interface board. It adds/drops STM-1 electrical signals and supports protection at path and board level.

The SDE board is a 2 x STM-1 electrical interface board. It adds/drops STM-1 electrical signals and does not support TPS protection.

The EU1S board is an STM-1 electrical switching board, used in conjunction with the SLE board. It access 1 x STM-1 electrical signal.

The EU2S board is used in conjunction with the SDE board. It access 2 x STM-1 electrical signal.

The EUPB board is an STM-1 electrical bridging board, used in conjunction with the SLE board and EU1S board. It supports protection to the SLE board.

The SLE/SDE board can be seated in slot 10 and slot 11, the EU1S/EU2S board in slot 30 and slot 31, and the EUPB board in slot 31.

2.3.1 Functions

Receives/transmits STM-1 electrical signals.


Supports pass-through of the DCC byte and orderwire byte. When the FSCC board is not in position, the D byte and E1/E2 byte can pass through the eastbound and westbound optical interface boards of this station, without affecting the DCC and orderwire communication between this station and other stations.



2.3.2 Principle

The SLE and SDE are similar in working principle. The principle block diagram of SLE is shown in Figure 2-6.



2-12

FSCC board



module

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1(e)

STM-1(e)

FSCC board



module

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

FSCC board



module

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1(e)

STM-1(e)

FSCC board



module

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

Figure 2-6 Principle block diagram of SLE


At the frame synchronization and scrambling module, the incoming STM-1 electrical signals are descrambled (with the clock signal restored as well), and then sent to the overhead processing module. The R_LOS, R_LOF and R_OOF alarm signals are also detected at the frame synchronization and scrambling module.




Scrambling is performed to the incoming STM-1 electrical signals at the frame synchronization and scrambling module. After that, the signals are sent onto optical fiber for transmission.


Logical control module: This module generates the SLE board type and slot information for the query by the FSCC board, and fulfills communication between the FSCC board and the SLE board.



2-13

2.3.3 Front Panel

The front panel of the SLE, SDE, EU1S, EU2S and EUPB boards are shown in Figure 2-7, Figure 2-8, Figure 2-9, Figure 2-10 and Figure 2-11 respectively.

Figure 2-7 The SLE board front panel

Figure 2-8 The SDE board front panel

RX TX

Figure 2-9 The EU1S board front panel

RX2TX1RX1 TX2

Figure 2-10 The EU2S board front panel



2-14

Figure 2-11 The EUPB board front panel

Indicator

There is an indicator on the front panel of SLE/SDE, indicating the board hardware status.

Table 2-5 gives a description to the indicator.

Table 2-5 Description of indicator of SLE/SDE


Off The board is not configured with service, or the board is under protection.

STATE (green)

On The board is configured with service and is in working status.

Interface SLE/SDE provides no interface on its front panel. EU1S/EU2S is needed for the input and output of STM-1 electrical signal. There are two BNC connectors on the EU1S board. There are four BNC connectors on the EU2S board.

Table 2-6 gives a description to the interface on the EUIS/EU2S front panel.

Table 2-6 Description of interfaces of EUIS/EU2S

Interface Description Type

RX/RX1/RX2 Receiving end

TX/TX1/TX2 Transmitting end

BNC

2.3.4 Tributary Protection Switching

Used in conjunction with the EU1S board and the EUPB board, the SLE board can support TPS. Figure 2-12 show the block diagram of TPS to the SLE board.



2-15

Principle STM-1(e)

EUPB EUIS

Working

SLE

slot 11

Protection

SLE

slot 10 Figure 2-12 Block diagram of TPS protection to the SLE board

In Receive Direction

STM-1 electrical signals are accessed through the BNC interface of the EU1S board, and sent to the SLE board and EUPB board by the EU1S board drive.

In Transmit Direction

The STM-1 electrical signals are sent over both the working and the protection SLE board simultaneously, received at the EU1S board selectively.

Board configuration

When the SLE board is configured with TPS, the SLE board seated in slot 11 protects the one seated in slot 10. The board configuration is illustrated in Figure 2-13.

XCS A XCS B

FAN

Slot 1-PIU Slot 2-PIU Slot 3-FSCC


Slot 7-XCS4 Slot 8-XCS4 Slot 9-FEOW

Slot 10-SLE Slot 11-SLE Slot 12

XCS BSlot 21


Slot 32 Slot 31-EUPB Slot 30-EU1S

Figure 2-13 Configuration of the working and the protection SLE under TPS



2-16


Main parameters that should be configured for SLE/SDE are as follows:

J0 byte J0 is the path trace byte. It is constantly transmitted by the transmitting end, which is a sign for the higher order access point and helps identify the receiving end is connected with the transmitting end. If the receiving end detects mismatched J0, the associated channel (VC-4) will generate HP_TIM alarms.

The J0 default value is HuaWei SBS.

C2 byte

C2 is the signal label byte. It indicates the VC multiframe structure and the feature of information payload. The received byte is required to be matched with the one transmitted. If mismatched bytes are detected, the associated channel (VC-4) will generate HP_SLM alarms, and all “1”s are inserted to the C2 byte of the lower level information structure.





E1 or T1 tugs

E3 or DS3 asyn

E4 a140

Loopback Loopback is usually used for fault localization. There are two types of loopback:






2-17


Description Parameter SLE SDE EU1S EU2S EUPB

Rate STM-1 STM-1 STM-1 STM-1 STM-1

Connector No interface No interface BNC BNC No interface

Processing capability 1 x STM-1 2 x STM-1 1 x STM-1 2 x STM-1 1 x STM-1

Dimensions 245 mm (L) x 100 mm(W)

245 mm (L) x 100 mm(W)

70 mm (L) x 100 mm (W)

70 mm (L) x 100 mm (W)

70 mm (L) x 100 mm (W)

Power consumption 5.0 W 5.0 W 1.4 W 2.4 W -

Weight 300 g 300 g 300 g 300 g 200 g








2-18

2.4 STM-1 Optical Interface Board (OSB1)

The OSB1 board provides one STM-1 optical interface. It receives/transmits 1 x STM-1 optical signals and fulfills the O/E conversion of STM-1 signals, extraction and insertion of overhead bytes and generation of alarm signals on the line.

Being a module of the XCS1 board, the OSB1 is mounted on the XCS1 board, which can be inserted in slot 7 and slot 8 of the OptiX Metro 1050. This design gives full utilization of available space.

2.4.1 Functions

Receives/transmits 1 x STM-1 optical signals.

Provides the Ie-1 and S-1.1, L-1.1, L-1.2 standard optical interfaces described in International Telecommunication Union - Telecommunication Standardization Sector (ITU-T) Recommendation G.957.

Provides in-loop and out-loop functions for system testing.

Supports DCC and orderwire pass-through function. When the FSCC board is not in position, such bytes as D byte and E1/E2 can pass through the east and west line boards at this station, which will not affect the data and orderwire communications with other stations.

The optical interface has the ALS function.

Supports the online query of board information.

2.4.2 Principle

The block diagram of the OSB1 board is shown in Figure 2-14.

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-1

STM-1

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

Figure 2-14 Principle block diagram of OSB1


The O/E conversion module converts the received STM-1 optical signal into electrical ones and restores the clock signal. Then, it sends the clock signal together with the



2-19

STM-1 electrical signals to the frame synchronization and scrambling module. The R_LOS alarm signal is also detected at the O/E conversion module.








Logical control module: This module generates the timing clock and frame header information required by OSB1. When fault occurs to the cross-connect board, it implements switching to the active/standby boards, and supports ALS function. When the FSCC board is not in position, it allows the overhead bytes to pass through the eastbound and westbound optical interface boards of this station.


Main parameters that should be configured for OSB1 are as follows:


C2 byte





E1 or T1 tugs

E3 or DS3 asyn

E4 a140



2-20




Optical interface loopback: for VC-4 in the STM-1 signal


2.4.4 Technical Specifications

Description Item OSB1

Line bite rate STM-1

Line code Non Return to Zero code (NRZ)

Connectors SC

Fiber 1310 nm, single-mode or multi-mode fiber


Application codes Ie-1 S-1.1 L-1.1 L-1.2

Transmission distance 0.5 km 15 km 50 km 80 km

Mean launched power –19 dBm to –14 dBm


0 dBm to –5 dBm

0 dBm to –5 dBm


Receiver overload power

–14 dBm –8 dBm –10 dBm –10 dBm








2-21

2.5 STM-4 Optical Interface Board (OSB4)

The OSB4 board provides STM-4 optical interface. It receives/transmits 1 x STM-4 optical signals and fulfills the O/E conversion of STM-4 signals, extraction and insertion of overhead bytes and generation of alarm signals on the line.

As a module of the XCS4 board, the OSB4 shares a slot with the XCS4 board and can be seated in slot 7 and slot 8 of the OptiX Metro 1050. This design helps to achieve maximum space utilization.

2.5.1 Functions

Receives/transmits 1 x STM-4 optical signals.

Provides the Ie-4 and S-4.1, L-4.1, L-4.2 standard optical interfaces described in ITU-T Recommendation G.957.

Provides inloop and outloop functions for system testing.

Supports DCC and orderwire pass-through function. When the FSCC board is not in position, such bytes as D byte and E1/E2 byte can pass through the eastbound and westbound line boards at this station, which will not affect the embedded control channel (ECC) and orderwire communications with other stations.

The optical interface has the ALS function.


2.5.2 Principle

The block diagram of the OSB4 board is shown in Figure 2-15.

STM-4

STM-4

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-

STM-

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

STM-4

STM-4

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmoudle

Overheadprocessing

module

STM-

STM-

FSCC board



module

O/Econversion

E/Oconversion

Cross-connect unit

Cross-connect unit

Logic controlmodule

Overheadprocessing

module

Figure 2-15 Principle block diagram of OSB4


The O/E conversion module converts the received STM-4 optical signal into electrical ones and restores the clock signal. Then, it sends the clock signal together with the STM-4 electrical signals to the frame synchronization and scrambling module. The



2-22

R_LOS alarm signal is also detected at the O/E conversion module.








Logical control module: This module generates the timing clock and frame header information required by OSB4. When fault occurs to the cross-connect board, it implements switching to the active/standby boards, and supports ALS function. When the FSCC board is not in position, it allows the overhead bytes to pass through the eastbound and westbound optical interface boards of this station.


Main parameters that should be configured for OSB4 are as follows:


C2 byte The C2 byte should be configured according to the service type in practice.




E1 or T1 tugs

E3 or DS3 asyn

E4 a140



2-23




Optical interface loopback: for all 4 VC-4s in the STM-4 signal.



Description Item OSB4

Line bite rate STM-4

Line code NRZ

Connectors SC

Fiber 1310 nm, single mode or multi-mode fiber

Dimensions 90 mm (L) × 85 mm (W)

Application codes Ie-4 S-4.1 L-4.1 L-4.2

Transmission distance - 25 km 50 km 80 km

Mean launched power –8 dBm to –15 dBm


+2 dBm to –3 dBm

+2 dBm to –3 dBm


Receiver overload power

–8 dBm –8 dBm –8 dBm –8 dBm








2-24

2.6 E1/T1 Electrical Interface Board (PL1S/PL1D/PF1S/PF1D/PM1S/PM1D/C12/C12S)

The E1/T1 electrical interface boards including:

The PL1S board is an 8 x 2048 kbit/s framed electrical interfaces board.

The PL1D board is a 16 x 2048 kbit/s framed electrical interfaces board.

The PF1S board is an 8 x 2048 kbit/s framed electrical interfaces board.

The PF1D board is a 16 x 2048 kbit/s framed electrical interfaces board.

The PM1S board is an 8 x 2048 kbit/s framed or 8 x 1544 kbit/s electrical interfaces board.

The PM1D board is a 16 x 2048 kbit/s framed or 16 x 1544 kbit/s electrical interfaces board.

The C12 board is a 16 x 2048 kbit/s or 1544 kbit/s signal conversion board. It is used together with the PL1D, PL1S, PM1D, PM1S, PF1D and PF1S boards to achieve electrical transfer of 2048 kbit/s or 1544 kbit/s signals.

The C12S board is a 16 x 2048 kbit/s or 1544 kbit/s electrical interface switching & bridge board. It is used together with the PL1D, PL1S, PM1D, PM1S, PF1D and PF1S boards to achieve electrical transfer of 2048 kbit/s or 1544 kbit/s signals. In addition, it provides TPS protection for these boards.

E1/T1 signals processing is carried out on the boards PL1S, PL1D, PF1D, PF1S, PM1D and PM1D. They have different functions, as shown in Table 2-10.

Table 2-10 Different function of PL1S, PL1D, PF1D, PF1S, PM1D and PM1D

Board name

Access capability

Interface impedance Remarks

PL1S 8 x E1 75 ohm and 120 ohm

PL1D 16 x E1 75 ohm and 120 ohm

Interface impedance of 75 ohm: The board whose bar code is labeled as “A”.

Interface impedance of 120 ohm: the board whose bar code is labeled as “B”.

PF1S 8 x E1 75 ohm -

PF1D 16 x E1 75 ohm -

PM1S 8 x E1/T1 100 ohm and 120 ohm -

PM1D 16 x E1/T1 100 ohm and 120 ohm -

The PL1S, PL1D, PF1D, PF1S, PM1D and PM1D boards can be seated in slot 4, 5, 6, 10, 11 or 12.



2-25

The C12 board is seated in the slots 24, 25, 26, 30, 31, 32.

When TPS is configured for the equipment, C12S can be seated in slots 24, 25, 26, 30 and 31.

2.6.1 Functions

Maps and multiplexes 2048 kbit/s or 1544 kbit/s signals into the VC-4, and demaps and demultiplexes the VC-4 to 2048 kbit/s or 1544 kbt/s signals.

Provides 75 ohm unbalanced interface and 100 ohm /120 ohm balanced interface. The interface characteristics comply with ITU-T Recommendation G.703.

PF1S/PF1D/PM1S/PM1D supports cyclic redundancy check (CRC), and the board can detect bit errors in the received signals (PL1S/PL1D not support).

Supports the re-timing function (Not supported in the T1 mode).

Provides inloop and outloop functions for testing.


Supports 1:N (N ≤ 5) TPS works with C12S board.

Supports hot-swapping

2.6.2 Principle

PL1S, PL1D, PF1S, PF1D, PM1S and PM1D are similar in working principle. Here take PM1S for example. Figure 2-16 shows one channel-signal input and output.

Cross-connectunitInterface

Moudle

Decoder Mapping

Logicalcontrolmodul

FSCC board

Encoder DemappingCross-connectunit

Cross-connectunit

E1/T1

E1/T1Interfacemodule

Decoder Mapping

Logicalcontrolmodule

FSCC board

Encoder Demapping

C12/C12S

C12/C12SCross-connectunit

Cross-connectunitInterface

Moudle

Decoder Mapping

Logicalcontrolmodul

FSCC board

Encoder DemappingCross-connectunit

Cross-connectunit

E1/T1

E1/T1Interfacemodule

Decoder Mapping


FSCC board

Encoder Demapping

C12/C12S

C12/C12SCross-connectunit

Figure 2-16 Block diagram of the PM1S board


The incoming 2048 kbit/s or 1544 kbit/s signal passes the interface module and enters decoder for decoding. Then, the recovered NRZ data and clock signals are sent to the mapping module.

In the mapping module, the 2048 kbit/s or 1544 kbit/s signal sent by decoder is



2-26

mapped asynchronously to the C-12, and then forms the VC-12 after the path overhead processing. Then, it transforms into TU-12 after pointer processing and then is multiplexed to get the VC-4. Finally, the VC-4 is sent to the cross-connect unit.

The mapping process is shown in Figure 2-17.

X3VC-4 TUG-3 TU-12

VC-12

C-12

X3TUG-2

X7

2048kbit/s1544kbit/s

Figure 2-17 Process of mapping and multiplexing 2048 kbit/s or 1544 kbit/s signals


The demapping module demaps the VC-4 signal sent by the cross-connect unit and extracts the binary data and clock signal to send to the encoder. After encoding, the HDB3 or B8ZS data signal is output through the interface module.

Note:

The code patterns of 2048 kbit/s and 1544 kbit/s signals are HDB3 and B8ZS respectively.


Logical control module: This module fulfills communication with FSCC board. It reports the board information, alarm and performance to FSCC board and receives the configuration command from FSCC board.

2.6.3 Front Panel

The front panel of the PL1S, PL1D, PF1D, PF1S, PM1S and PM1D are shown in Figure 2-18, Figure 2-19, Figure 2-20, Figure 2-21, Figure 2-22 and Figure 2-23 respectively.



2-27

PL1S

STATE

Figure 2-18 The PL1S board front panel

PL1D

STATE

Figure 2-19 The PL1D board front panel

PF1S

STATE

Figure 2-20 The PF1S board front panel

PF1D

STATE

Figure 2-21 The PF1D board front panel

PM1S

STATE

Figure 2-22 The PM1S board front panel



2-28

PM1D

STATE

Figure 2-23 The PM1D board front panel

The front panel of the C12 and C12S boards are shown in Figure 2-24 and Figure 2-25 respectively.

C12 116

Figure 2-24 The C12 board front panel

C12S 116

Figure 2-25 The C12S board front panel

Indicator

There is an indicator on the front panel of PL1S/PL1D/PF1S/PF1D/PM1S/ PM1D, indicating the board working status.

Table 2-11 gives a description to the indicator of PL1S/PL1D/PF1S/PF1D/ PM1S/PM1D board.

Table 2-11 Description of indicator of PL1S/PL1D/PF1S/PF1D/PM1S/PM1D



STATE (green)


Interface The PL1S/PL1D/PF1S/PF1D/PM1S/ PM1D board provides no interface on its front



2-29

panel. A DB78 connector is on the C12 and C12S front panel.

Figure 2-26 shows the DB78-connector pin numbering, followed by Table 2-12 listing its pinouts.

12 11 10 916 15 14 131720 19 4 3 2 158 7 618

31 30 29 2835 34 33 323639 38 23 22 212427 26 2537

51 50 49 4855 54 53 525659 58 43 42 41 404447 46 4557

70 69 68 6774 73 72 717578 77 62 61 606366 65 6476

Figure 2-26 The DB78 connector of the C12 board

Table 2-12 Pinouts of DB78 interface

Pin No. Signal Functions Pin No. Signal Functions

2 RP1 1st positive input 6 RP9 9th positive input

22 RN1 1st negative input 26 RN9 9th negative input

31 TP1 1st positive output 35 TP9 9th positive output

12 TN1 1st negative output 16 TN9 9th negative output

41 RP2 2nd positive input 45 RP10 10th positive input

61 RN2 2nd negative input 65 RN10 10th negative input

70 TP2 2nd positive output 74 TP10 10th positive output

51 TN2 2nd negative output 55 TN10 10th negative output

3 RP3 3rd positive input 7 RP11 11th positive input

23 RN3 3rd negative input 27 RN11 11th negative input

32 TP3 3rd positive output 36 TP11 11th positive output

13 TN3 3rd negative output 17 TN11 11th negative output

42 RP4 4th positive input 46 RP12 12th positive input

62 RN4 4th negative input 66 RN12 12th negative input

71 TP4 4th positive output 70 TP12 12th positive output

52 TN4 4th negative output 51 TN12 12th negative output






2-30

Pin No. Signal Functions Pin No. Signal Functions














1 GND Protection ground 40 GND Protection ground








Principle Figure 2-27 show the block diagram of TPS to the PL1S/PL1D/PF1S/PF1D /PM1S/PM1D board.



2-31

2048kbit/s or 1544kbit/s electrical sighal

working slot(slot 4)

TPScontrolsignal


TPScontrolsignal


TPScontrolsignal


TPScontrolsignal


TPScontrolsignal

protection slot(slot 12)

C12S

Figure 2-27 Principle of TPS for PL1S/PL1D/PF1S/PF1D/PM1S/PM1D

In normal state, the 2048 kbit/s or 1544 kbit/s signals accessed by the C12S board will be sent to the PL1S/PL1D/PF1S/PF1D/PM1S/PM1D board in the working slot.

When the PL1S/PL1D/PF1S/PF1D/PM1S/PM1D board in slot 4, 5, 6, 10 or 11 is faulty, the C12S board in slot 24, 25, 26, 30 or 31 will receive the TPS control signal sent from the cross-connect unit, and control the relay to switch the service signals to the protection board in slot 12.

Board configuration

When a PL1S/PL1D/PF1S/PF1D/PM1S/PM1D board is configured as 1: 5 protected, the corresponding relation of the working and protection boards is shown in Table 2-13.

Table 2-13 Corresponding relation of the working and protection PL1S/PL1D/PF1S/PF1D/PM1S/PM1D under 1:5 protection

Working board Protection board Slot assignment

PL1S PL1S, PL1D

PL1D PL1D

PF1S PF1S, PF1D

PF1D PF1D

PM1S PM1S, PM1D

PM1D PM1D

Figure 2-28 shows the slot assignment for the working and protection boards.



2-32

XCS A

FAN



XCS BSlot 21

Slot 26-C12S Slot 25-C12S Slot 24-C12S

Slot 32 Slot 31-C12S Slot 30-C12S

Slot 4-Working Slot 5-Working Slot 6-Working

Slot 10-Working Slot 11-Working Slot 12-Protection

Figure 2-28 Slot assignment for the working and protection PL1S/PL1D/PF1D/PF1S/PM1S/PM1D under TPS


Main parameters that should be configured for PL1S/PL1D/PF1D/PF1S/ PM1S/PM1D are as follows:

Payload loading indication

If “Unloaded” is selected, the service carried by this path will not be processed, and the alarm of this path will not be reported to the FSCC board.

“Unloaded” is selected to screen the alarms of the paths with no service loaded.

Tributary loopback

Tributary loopback is used to locate the fault of each service path.

Tributary loopback is a diagnostic function which will affect the service of relevant path. Please use it careful.

Path service type

2048 kbit/s or 1544 kbit/s can be selected according to the input service type.



2-33


Description Item PL1S PL1D PF1S PF1D PM1S PM1D C12 C12S

Rate 2048 kbit/s 2048 kbit/s or 1544 kbit/s

Processing capability

8 16 8 16 8 16 null

Connector null DB78

Code HDB3 HDB3, B8ZS null

Dimensions 245 mm (L) x 100 mm (W) 70 mm (L) × 100 mm (W)

Weight 200 g 250 g 240 g 300 g 240 g 300 g 250 g

Power consumption

3.0 W 4.0 W 4.0 W 5.5 W 4.2 W 5.5 W 0.5 W Normally state:0.5 W

Switching state:5.0 W

Interface specifications

2048 kbit/s 1544 kbit/s

Input jitter tolerance

Satisfy for G.823 Satisfy for G.824

Output jitter B2(18 kHz–100 kHz) ≤0.075 UI B1(10 Hz–40 kHz) ≤0.7 UI

Allowable frequency deviation at input port

≥|±50| ppm ≥|±50| ppm








2-34

2.7 E3/DS3 Electrical Interface Board (PL3/C34S/TSB3)

The PL3 board is a 3 x 34368 kbit/s or 3 x 44736 kbit/s electrical interface board with 75 ohm impedance.

The C34S board is a 3 x 34368 kbit/s or 44736 kbit/s switching board. It works with PL3 to transfer the 34368 kbit/s or 44736 kbit/s signal.

The TSB3 board is a 3 x 34368 kbit/s, 44736 kbit/s signal switching & bridging board. It works with PL3 and C34S to fulfill TPS of the 34368 kbit/s and 44736 kbit/s electrical signals.

The PL3 board can be seated in slot 4, 5, 6, 10, 11, 12.

The C34S board is seated in slot 24, 25, 26, 30, 31, or 32 when no TPS is provided. When TPS protection is provided the C34S is seated in slot 24, 25, 30 or 31 and the TSB3 board is seated in slot 26 or 32.

2.7.1 Functions

Maps and multiplexes 3 x 34368 kbit/s or 44736 kbit/s signals to the VC-4, and demaps and demultiplexes the VC-4 into 3 x 34368 kbit/s or 44736 kbit/s signals.

Provides inloop and outloop functions at the tributary for testing.

Supports signal input equalization to enhance the transmission distance of the signal.

Supports the board information query.

Supports two groups of 1: 1 or 1: 2 TPS works with C34S and TSB3 board.

Supports hot-swapping.

2.7.2 Principle

Take one channel-signal input and output for example, the block diagram of the PL3 board is shown in Figure 2-29.



2-35

connect

connect

Cross-unitInterface

Moudle

Decoder Mapping

Logicalcontrolmodul

FSCC board

Encoder DemappingCross-unit

Cross-connectunit

E3/DS3

E3/DS3Interfacemodule

Decoder Mapping


FSCC board

Encoder Demapping

C34S

C34SCross-connectunit

connect

connect

Cross-unitInterface

Moudle

Decoder Mapping

Logicalcontrolmodul

FSCC board

Encoder DemappingCross-unit

Cross-connectunit

E3/DS3

E3/DS3Interfacemodule

Decoder Mapping


FSCC board

Encoder Demapping

C34S

C34SCross-connectunit

Figure 2-29 Block diagram of the PL3 board


The incoming 34368 kbit/s or 44736 kbit/s signal passes the interface module and enters decoder for decoding. Then, the recovered NRZ data and clock signals are sent to the mapping module.

In the mapping module, the 34368 kbit/s or 44736 kbit/s signal sent by decoder is mapped asynchronously to the C-3, and then forms the VC-3 after the path overhead processing. Then, it transforms into TU-3 after pointer processing and then is multiplexed into VC-4 and sent to the cross-connect unit.

The mapping process is shown in Figure 2-30.

x 3

44736kbit/s

VC-4 TUG-3 TU-3

VC-3

C-3

34368kbit/s

Figure 2-30 Process of mapping and multiplexing 34368 kbit/s or 44736 kbit/s signal


The demapping module demaps the VC-4 signal sent by the cross-connect unit and extracts the binary data and clock signal to send to the encoder. After encoding, the HDB3 or B3ZS data signal is output by the interface module.



2-36

Note:

The code patterns of 34368 kbit/s and 44736 kbit/s signals are HDB3 and B3ZS respectively.


Logical control module: This module fulfills communication with FSCC. It reports the board information, alarm and performance to FSCC and receives the configuration command from FSCC.

2.7.3 Fornt Panel

The front panel of the PL3, C34S and TSB3 board are shown in Figure 2-31, Figure 2-32 and Figure 2-33 respectively.

PL3

STATE

Figure 2-31 The PL3 board front panel

C34S

TX1RX1 RX2 TX2 RX3 TX3

Figure 2-32 The C34S board front panel

TSB3

Figure 2-33 The TSB3 board front panel



2-37

Indicator There is an indicator on the front panel of PL3, indicating the board working status.

Table 2-14 gives a description to the indicator of the PL3 board.

Table 2-14 Description of indicator of PL3



STATE (green)


Interface

PL3 provides no interface on its front panel. C34S is needed for the input and output of 34368 kbit/s or 44736 kbit/s signal. There are three pairs of BNC connectors on the C34S board.

Table 2-15 gives a description to the interface on the C34S front panel.

Table 2-15 Description of interfaces of C34S


RX1 Input of the first channel of signal

TX1 Output of the first channel of signal

RX2 Input of the second channel of signal

TX2 Output of the second channel of signal

RX3 Input of the third channel of signal

TX3 Output of the third channel of signal

BNC


Principle Figure 2-34 show the block diagram of TPS protection to the PL3 board.

slot 24 protection bus

slot 25 protection bus

working slot

TPS control signal

slot 4 (slot 10)

C34S

TPS control signal

protection slotslot 6 (slot 12)

TSB3

TPS control signal

working slotslot 5 (slot 11)

C34S

Figure 2-34 Principle of TPS for PL3 board



2-38

In normal state, 34368 kbit/s or 44736 kbit/s signals accessed by the C34S board are sent to the service bus through the relay and then sent to the PL3 board in the working slot.

When the PL3 board in slot 5 or 11 is faulty, the C34S board in slot 25 or 31 will receive the TPS control signal sent from the cross-connect unit, and control the relay switching to the protection bus. The TSB3 board in slot 26 or slot 32 is in default position, and will send the 34368 kbit/s or 44736 kbit/s signal to the PL3 protection board in slot 6 or slot 12 for processing.

When the PL3 board in slot 4 or slot 10 is faulty, the C34S board in slot 24 or 30 will receive the TPS control signal sent from the cross-connect unit, and control the relay switching to the protection bus. Meanwhile, the TSB3 board in slot 26 or 32 will receive the TPS control signal controlling the relay switching, and send the 34368 kbit/s or 44736 kbit/s signals to the PL3 board in slot 6 or 12 for processing.

Board configuration

A PL3 board can be two groups of 1:3 (protected with other PL3 boards), you must install the PL3 board in slot 4 or 5 serve as working board and in slot 6 to serve as protect board. Or you must install the PL3 board in slot 10 or 11 serve as working board and in slot 12 to serve as protection board.

The board configuration is illustrated in Figure 2-35.

XCS A

FAN



Slot 21



Slot 4-Working 1 Slot 5-Working 1 Slot 6-Protection 1

Slot 10-Working 2 Slot 11-Working 2 Slot 12-Protection 2

Figure 2-35 Configuration of the working and the protection PL3 under TPS


Main parameters that should be configured for PL3 are as follows:

Payload loading indication

If “Unloaded” is selected, the service carried by this path will not be processed, and the alarm of this path will not be reported to the FSCC board.

“Unloaded” is selected to screen the alarms of the paths with no service loaded.

If the path is loaded with service, “Loaded” must be selected.



2-39

Tributary loopback

Tributary loopback is used to locate the fault of each service path.

Tributary loopback is a diagnostic function which will affect the service of relevant path. Please use it careful.

Path service type

34368 kbit/s and 44736 kbit/s can be selected according to the input service type.


Description Item PL3 C34S TSB3

Rate 34368 kbit/s or 44736 kbit/s

Processing capability 3 x 34368 kbit/s or 44736 kbit/s

Support code HDB3, B3ZS

Connectors - BNC -


70 mm (L) x 100 mm (W) 70 mm (L) x 100 mm (W)

Weight 250 g 400 g 175 g

Power consumption 4.5 W 1.0 W 0.5 W

Interface specifications 34368 kbit/s 44736 kbit/s

Input jitter tolerance Satisfy for G.823 Satisfy for G.824

Output jitter B2(10 kHz–800 kHz) ≤0.075 UI B1(10 Hz–400 kHz) ≤0.4 UI

Allowable frequency deviation at input port

≥|±20| ppm ≥|±20| ppm








2-40

2.8 Ethernet Interface Board (EMS3/ETF4/EFT)

The EMS3 board is a 3-channel FE/GE processing board. The ETF4 board is a 4-channel FE interface board. The EFT board is a fast Ethernet transparent transmission board.

The EMS3 board transmits/receives and processes two channels of FE (10M/100M) and one channel of GE (1000M) Ethernet services. When used in conjunction with the ETF4 board, it can transmit/receive and process 6-channel FE and one channel of GE (1000M) Ethernet services.

The EFT board accesses four channels of FE Ethernet services. This board offers point-to-point transparent transmission and Ethernet over SDH (EOS) function.

The service processing capability and access capability of EMS3, ETF4 and EFT are shown in Table 2-16.

Table 2-16 Service processing capability and access capability of EMS3 and ETF4

Board Processing capability Access capability

EMS3 2-channel FE and 1-channel GE 2-channel FE and 1-channel GE

ETF4 None 4-channel FE

EMS3+ETF4 6-channel FE and 1-channel GE 6-channel FE and 1-channel GE

EFT 4-channel FE 4-channel FE

The EMS3 and EFT board can be seated in slot 4, 5, 10 or slot 11. The ETF4 board can be seated in slot 24, 25, 30 or slot 31.

2.8.1 Functions

1. EMS3/ETF4

Provides two 10 M/100 M electrical interfaces.

Provides one 1000 M optical interface.

Works with ETF4 to expand 10M/100M user interfaces (two to six).

Complies with the IEEE 802.3x-compliant electrical characteristics.

Maps three channels of Ethernet services into one to sixty-three VC12s or three VC3s.

Provides reliable transmission channels for users using SDH protection (MSP and SNCP).

Supports half duplex and full duplex modes.

Supports layer 2 switching of Ethernet data.

Supports link capacity adjustment scheme (LCAS).



2-41

Supports transparent transmission and convergence of Ethernet services.

Supports the application of Ethernet virtual private line (EVPL) and Ethernet private line (EPL).

Supports the application of two virtual LAN services: Ethernet private LAN (EPLAN) and Ethernet virtual private LAN (EVPLAN).

Supports committed access rate (CAR), the bandwidth adjustment granularity being 64kbps.

Supports MAC self-learning, broadcast, multicast, and rapid spanning tree protocol (RSTP).

Provides subscriber security isolation and VLAN security isolation insider subscribers.

Supports the filtering to MAC addresses and the suppression to broadcast packets.

Provides bandwidth sharing and statistic multiplexing based on VLAN and port to improve bandwidth utility.

Encapsulates packets by following generic framing procedure (GFP), link access protocol-SDH (LAPS) and high level data link control (HDLC) protocols.

Receives and transmits testing frames.

Supports the identification and transparent transmission of packet frame in online test.

Provides multiple inloop and outloop methods to enable fast location and elimination of faults.

Reports the flow statistics and alarms of frames.

2. EFT

Provides four 10 M/100 M electrical interfaces.

Complies with the IEEE 802.3x-compliant electrical characteristics.

Maps Ethernet services into one to sixty-three VC12s at most or six VC3s. The maximum bandwidth at SDH side is two VC4s.

Supports auto-negotiation and full-duplex.

Supports LCAS.

Supports GFP, LAPS and HDLC.

Provides multiple inloop and outloop methods to enable fast location and elimination of faults.

Reports the flow statistics and alarms of frames.

2.8.2 Principles

The EMS3 board can only access and process two channels of 10 M/100 M Ethernet



2-42

services when it is used alone. However, it can process up to six channels of 10 M/100 M Ethernet services when used together with ETF4.

Figure 2-36 shows the working principle of EMS3. In the figure, six channels of 10 M/100 M and one channel of 1000 M Ethernet services are accessed and processed.

The EFT board works similarly. Figure 2-37 shows the working principle of EFT. Compared with the EMS3 board, the EFT board does not have 1000M optical interface. It has only four 10M/100M Ethernet electrical interfaces.

Electricalinterfacemodule

Opticalinterfacemodule

Serviceprocessing

moduleEncapsulation/decapsulation

module

Mapping/demapping

module

4 x 10M/100METF4

Cross-connect

unit

Logic contrilmodule

FSCC

2 x 10M/100M

1 x 1000M

Figure 2-36 Principle block diagram of EMS3

Electricalinterfacemodule

Encapsulation/decapsulation

module

Mapping/demapping

module

4 x 10M/100M Cross-connect

unit

Logic contrilmodule

FSCC

Figure 2-37 Principle block diagram of EFT

The following is the working principle of EMS3.


The 10 M/100 M Ethernet data signal from ETF4 and the signal cable is decoded and converted into parallel signal at the Ethernet electrical interface module, and then is sent to the service processing module.

The 1000 M optical signal from the optical fiber is converted to electrical signal prior to



2-43

decoding and serial/parallel conversion at the optical interface module, and then is sent to the service processing module.

In service processing module, the parallel data signals from the electrical and optical interfaces are performed with packet framing and CRC.

Then the data signals are encapsulated in the encapsulation/decapsulation module.

In the mapping/demapping module, the encapsulated signals are mapped into VC12 or VC3 and then output to the cross-connect unit.


The signal from the cross-connect unit is sent to the decapsulation module after being demapped.

In the encapsulation/decapsulation module, the demapped signal is decapsulated to Ethernet data signal.

Then the service processing module extracts the tunnel and VC labels of the signal, and forwards it.

The Ethernet electrical interface module converts the received data signal to serial one, codes it and then sends it to the signal cable and ETF4.

The Ethernet optical interface module converts the received data signal to serial one, codes it and then coverts the coded signal to optical signal, and sends it to the optical fiber for transmission.


Logical control module: It provides the function to communicate with FSCC and monitor the performance of Ethernet data services.

2.8.3 Front Panel

The front panel of EMS3, ETF4 and EFT are shown in Figure 2-38, Figure 2-39 and Figure 2-40.

Figure 2-38 The EMS3 board front panel



2-44

1 2 3

ETF4 FE3 FE4 FE5 FE6

1. RJ-45 electrical interface 2. Active indicator 3. Link indicator

Figure 2-39 The ETF4 board front panel

1 2 3

EFT FE1 FE2 FE3 FE4

1. RJ-45 electrical interface 2. Active indicator 3. Link indicator

Figure 2-40 The EFT board front panel

The following describes the indicators and interfaces of the EMS, ETF4 and EFT boards.



2-45

Indicator

Table 2-17 gives the description of indicators on EMS3.

Table 2-17 Description of indicator of EMS3


Flashing five times every second

Loading the NE software

Flashing three times every second

Deleting the NE software

Flashing once every second Wait to load the NE software for the original one is lost

RUN (green)

Flashing once every other second

Normal

Off No alarm occurs to NE


Minor alarm occurs to NE

Flashing twice every other second

Major alarm occurs to NE

ALM (red)

Flashing three times every other second

Critical alarm occurs to NE

On The link is normal LINK

Off The link is interrupted or not connected

On The data is in transmission ACT

Off No data is transmitted

On The link is normal Green indicator at Ethernet interface –connection status Off The link is interrupted or not

connected

Flashing or On The data is in transmission Yellow indicator at Ethernet interface –data status Off No data is transmitted



2-46

Indicator Table 2-18 gives the description of indicators on ETF4 and EFT.

Table 2-18 Description of indicator of ETF4 and EFT




On The data is in transmission ACTIVE


Interface Table 2-19, Table 2-20 and Table 2-21 show the description of interfaces on the front panel of EMS3, ETF4 and EFT.

Table 2-19 Description of interfaces on the front panel of EMS3

Interface Description Interface type

FE1 The first 10 M/100 M interface. RJ-45

FE2 The second 10 M/100 M interface. RJ-45

OUT The output interface for GE optical signal

IN The input interface for GE optical signal

LC

Table 2-20 Description of interfaces on the front panel of ETF4


FE3 The third 10 M/100 M autosensing Ethernet interface.

FE4 The fourth 10 M/100 M autosensing Ethernet interface.

FE5 The fifth 10 M/100 M autosensing Ethernet interface.

FE6 The sixth 10 M/100 M autosensing Ethernet interface.

RJ-45

Table 2-21 Description of interfaces on the front panel of EFT


FE1 The first 10 M/100 M autosensing Ethernet interface.

FE2 The second 10 M/100 M autosensing Ethernet interface.

FE3 The third 10 M/100 M autosensing Ethernet interface.

FE4 The fourth 10 M/100 M autosensing Ethernet interface.

RJ-45



2-47

Figure 2-41 shows the pins on the RJ-45 connector of the EMS3, ETF4 and EFT.

18 7 6 5 4 3 2

1

2

3

6

TX+TX-RX+RX-

No. Signal

Figure 2-41 Pins on RJ-45 connector of the EMS3, ETF4 and EFT


Main parameters that should be configured for EMS3 are as follows. The EFT can be configured similarly.

Item Description

TAG mark Tag port refers to an Ethernet port that can identify and transmit packets with VLAN TAG header. The TAG mark of this port is set to “Tag aware”.

While an Ethernet port that cannot identify and transmit packets with VLAN TAG header is named as Access port, whose TAG mark is “Access”.

An Ethernet port that can receive and transmit packets with or without VLAN TAG header is called Hybrid port, whose TAG mark is “Hybrid”.

Working mode The working mode of the port can be autosensing, 10 M half/full duplex, or 100 M half/full duplex.

Port enable It indicates the working status of a port. A port must be enabled when it is configured with services.

Flow control enable

The flow control function of a port is usually enabled.

Forwarding filter table

The forwarding filter table contains the slot information, VB name, VLAN ID and correspondence between VB ports.



2-48


Description Item EMS3 ETF4 EFT

Rate 10 M/100 M and 1000 M 10 M/100 M 10 M/100 M

Processing capability Two/six channels of 10 M/100 M Ethernet services and one channel of 1000 M Ethernet service.

Use together with EMS3 Four channels of 10 M/100 M Ethernet services

Connectors Two RJ-45 connectors and a pair of LC connectors

Four RJ-45 connectors

Four RJ-45 connectors

Dimensions 245 mm (L) x100 mm (W)

70 mm (L) x 100 mm (W) 245 mm (L) x100 mm (W)

Weight 377 g 196 g 290 g

Power consumption 19 W 0.5 W 5.9 W








2-49

2.9 N x 64 kbit/s Rate Interface Board (N64/N64I)

The N64 board is an N x 64kbit/s service processing board. The N64I board is an N x 64kbit/s service access board.

The N64 board transmits/receives and processes 2-channel signals based on different physical interface protocols. When used in conjunction with the N64I board, it can transmit/receive and process 4-channel signals based on different physical interface protocols.

The service processing capability and access capability of N64 and N64I are shown in Table 2-22.

Table 2-22 Service processing capability and access capability of N64 and N64I

Board Processing capability Access capability

N64 4-channel 2-channel

N64I None 2-channel

N64+N64I 4-channel 4-channel

The N64 board can be seated in slot 4, 5, 6, 10, 11 or 12. The N64I board can be seated in slot 24, 25, 26, 30, 31 or 32.

2.9.1 Functions

Processes 4-channel signals based on different physical interface protocols such as V.35/V.24/X.21/RS-449/EIA-530.

Provides two physical interfaces, characteristics of which conform to the specifications stipulated in the ITU-T Recommendations and EIA standards.

Supports the integration of various signals at the rate of N × 64kbit/s, thus saving the transmission bandwidth.

Supports the integration of N x 64kbit/s signals and Fraction E1 signals, thus saving the transmission bandwidth.

Supports the board configuration through the NM system.

Supports the time slot cross-connection of the board service at the 64kbit/s level.

Provides the inloop and outloop testing function which enables fast and effective troubleshooting.

2.9.2 Principle

Block diagram of the N64 board is shown in Figure 2-42.



2-50

N64I64k/E1RCM

TIM E1F/DM

M/D M

2 channel4 Cross

connectionunit

LCM FSCC

MPIPM

MPIPM: Multiprotocol physical interface processing moduleRCM: Rate coversion moduleTIM: Timeslot interchange moduleF/D M: Framed/deframed moduleM/D M: Mapping/demapping moduleLCM: Logical control module

Nx64k2 channel

Nx64k

Figure 2-42 Principle block diagram of N64


The multi-protocol physical interface processing module receives the N x 64kbit/s service from the interconnected equipment and the N64I board, and sends it to the rate conversion module after the protocol conversion.

The rate conversion module inserts the N x 64kbit/s service to the first N time slots, then performs rate conversion from N x 64kbit/s to E1, and then sends it to the time slot cross connection module.

According to different service application, the time slot cross connection module has several processing ways:

Sends the service accessed through the N64 board to the Framed E1 module, after the point-to-point transmission.

When the 2-channel or 4-channel N x 64kbit/s services, which are accessed through the N64 board, are integrated and timeslot combined by this module and finally form one-channel Framed E1 signal (the sum of 2 Ns or that of 4 Ns [30).

When the N x 64kbit/s service, which is accessed through the N64 board, is integrated with the Fraction E1 service, they are timeslot cross-connected by this module and finally form one-channel Framed E1 signal.

The Framed E1 module insert the No. 0 time slot of the E1 signal, which has been processed by the time slot cross connection module, to the frame synchronization byte and form the standard Framed E1 signal.

The mapping module maps the Framed E1 signal into the VC-4, in the way shown in Figure 2-43, and then sends it to the cross connection unit.



2-51

×3

2048kbit/s

VC-4 TUG-3 TUG-2 TU-12

VC-12

C-12

×3×7

Figure 2-43 Mapping and multiplexing of E1 signal


The demapping module demaps VC-4 from the cross-connection unit into E1 signals, and then sends them to the Deframed E1 module.

The Deframed E1 module realigns the received signals according to the system given frame signal, then makes them synchronized with the board, and then sends them to the time slot interchange module.

According to different service application, the time slot interchange module has several processing ways:

Sends the service accessed through the N64 board to the Framed E1 module, after the point-to-point transmission.

When the accessed 2-channel or 4-channel N x 64kbit/s services are integrated, this module converts the E1 signals from the Deframed E1 module to 4-channel N x 64kbit/s services, and finally sends them to the rate conversion module.

When the accessed N x 64kbit/s service is integrated with the Fraction E1 service, this module converts the E1 signals from the Deframed E1 module to 4-channel N x 64kbit/s services, and finally sends them to the rate conversion module.

The rate conversion module converts the E1 signals to the N x 64kbit/s signals and sends them to the multi-protocol physical interface processing module.

The multi-protocol physical interface processing module performs protocol processing to the N x 64kbit/s signals and output them through the N64 board interface.


Control module: This module assigns address to the chips of the N64 board, and controls the working mode and status of different modules.

Mailbox module: This module keeps communication between the board and the FSCC board, reports the alarm and performance events to the NM system and receives the setting command from NM.



2-52

2.9.3 Front Panel

The front panel of N64 and N64I is shown in Figure 2-44 and Figure 2-45 respectively.

Figure 2-44 The N64 board front panel

Figure 2-45 The N64I board front panel

Interface

The N64 and N64I board have two DB28 interfaces, so each board provides input and output of 2-channel N x 64kbit/s signals. Table 2-23 gives a description to the interface on the front panel of N64 and N64I.

Table 2-23 Description of interface on the front panel of N64 and N64I


PORT1 The first N x 64kbit/s interface

PORT2 The second N x 64kbit/s interface

PORT3 The third N x 64kbit/s interface

PORT4 The fourth N x 64kbit/s interface

DB28, its pin assignment is shown in Table 2-24.



2-53

Table 2-24 Pin assignment of DB28 connector for N64 and N64I

Pin No. Signal Description Pin No. Signal Description

1 TXD+ Transmitting data 15 TXCE+ Transmitting data clock for DCE; loopback clock for DTE

2 TXD– Transmitting data 16 TXCE– Transmitting data clock for DCE; loopback clock for DTE

3 TXC+ Transmitting clock provided by DCE to DTE

17 RXC+ Receiving clock

4 TXC– Transmitting clock provided by DCE to DTE

18 RXC+ Receiving clock

5 NC 19 RXD+ Receiving data

6 GND Circuit_GND 20 RXD– Receiving data

7 MODE0 Cable type identification signal

21 GND Shield_GND


22 LL Loopback control signal


23 CTS+ To be transmitted

10 MODE_DCE

DCE/DTE cable type identification signal

24 CTS– To be transmitted

11 DCD+ Carrier detect 25 DSR+ DCE is ready

12 DCD– Carrier detect 26 DSR– DCE is ready

13 RTS+ Request for transmitting 27 DTR+ DTE is ready

14 RTS– Request for transmitting 28 DTR– DTE is ready



2-54


Main parameters that should be configured for N64 as follows:

Port External port protocol modes such as V.35/X.21/RS-499/V.24/EIA-530

Internal port protocol modes such as F.E1

External port working modes such as DCE/DTE

Internal port working modes such as PCM30/PCM31

Configure the serial port rate as N x 64 kbit/s (the range of N is 1–31)

Configure the serial clock as internal clock, external clock or slave clock

Working clock There are five clock sources available:

Local 2M system clock

External interface clock accessed through port DD3

External interface clock accessed through port DD4

Line clock accessed through port 2M1

Line clock accessed through port 2M5


Description Parameter N64 N64I

Rate 64 kbit/s 64 kbit/s

Connector DB28


Power consumption 5 W 4.5 W

Weight 300 g 200 g








2-55

2.10 System Control & Communication Board (FSCC)

The FSCC board is a system control & communication board.

It performs management on synchronous equipment and executes communication among them. It also provides interfaces for the equipment to connect with the transmission network management system.

The FSCC board can be seated in slot 3.

2.10.1 Functions

Communicates with various boards of the NE, implements the configuration of various function units, and collects performance parameters and alarm data.

Process six DCCs to enable remote system management interface.

Provides audio and visual alarms for the OptiX Metro 1050.


2.10.2 Principle

Figure 2-46 shows the block diagram of the FSCC board. It is mainly composed of system control unit and communication unit.

Ethernet

CPU

Inner memory

RS232

F2 in

terfac

e

Overhead time-division multiplexing

module

To/fr

om lin

e boa

rd

RJ45

inter

face

To/fr

om ov

erhe

adpr

oces

sing b

oard

To/fr

om cr

oss-

conn

ect a

nd

Bus

System control unitCommunication unitDC

C 2M

b/s

Buzzer

Figure 2-46 Block diagram of the FSCC board

1. System Control Unit

The unit consists of Center Processing Unit (CPU), inner memory, buzzer as so on. It mainly performs Synchronous Equipment Management Function (SEMF) and Message Communication Function (MCF). It provides control processing interfaces



2-56

for various boards via the drive on the FSCC board, and performs initialization and configuration of various boards. It also monitors and collects the alarms and performance data of the boards. It deals with four DCCs and performs management to remote system. Audio alarm is also the provision of the system control unit.

2. Communication Unit

The unit mainly provides Q and F interfaces, required for the network management. It implements time-division switching of the system overhead buses. It also provides Ethernet interface and RS-232 interface on the FSCC board front panel, for the network management.

2.10.3 Front Panel

The FSCC front panel is shown in Figure 2-47.

FSCC

Figure 2-47 The FSCC board front panel

Switch “RESET” is used to restart the system. To avoid any incident, this button is only accessed by a sharp-pointed object.

“ALMCUT” is an alarm cutoff switch, and it should be ON during normal operation. When critical alarm is received by the FSCC board, an alarm sound will be generated. To clear audiable alarm indications, switch the ALMCUT to OFF and then ON.



2-57

Indicator Table 2-25 gives a description to the indicator of the FSCC board.

Table 2-25 Description of indicators of FSCC


5 times every other second NE software is being loaded

3 times every other second NE software is being deleted

Once every other second NE software is lost, waiting for loading

RUN (running indicator)

Once every other two second Normal operation state

Off No alarm

Once every other second Minor alarm

2 times every other second Major alarm

ALM (alarm indicator)

3 times every other second Critical alarm

On Data is being transmitted. Yellow

Off No data is transmitted.

On Link connection is normal.

Ethernet interface indicator

Green

Off Link is broken or not connected.



2-58

Interface F&f interface

F&f is an RS-232 type interface and is used in communication with the transmission network management system. A DB9 socket is available for interconnection, its pin assign is shown in Figure 2-48.

9 8 7 6

12345

No. Signal

2 RS232RXD

GND

3 RS232TXD

5

1,4,6,7,8 NC

Figure 2-48 F&f interface

Ethernet interface

Ethernet interface is a RJ-45 socket and is used for NMS communication, there are two indicators on the port.

Ethernet interface is shown in Figure 2-49.

18 7 6 5 4 3 2

1

2

3

6

TX+TX-R X+R X-

N o. S ignal

Figure 2-49 Pinouts of RJ-45 connector of FSCC

2.10.4 DIP Switches

The OptiX Metro 1050 supports setting NE ID through software other than DIP switches. The DIP switches on the FSCC use a 4-bit mode. Figure 2-50 shows the position of them on FSCC.



2-59

Front panel

Mode DIP switches

0 1 2 3

There are totally four bits for the DIP switches, bit sequence of 3210 from high to low. It is "0" when the switch is put upward, and "1" when put downward.

If the debugging mode 3 is desired, the DIP switches should be set as 0011. That is, put the bits 3 and 2 upward, and the bits 1 and 0 downward.

If the BIOS mode 5 is desired, the DIP switches should be set as 0101. That is, put the bits 3 and 1 upward, and the bits 2 and 0 downward.

Figure 2-50 Location of DIP switches on the FSCC

Note:

The mode DIP switches are used for equipment debugging. All of them are in "0" position during the equipment operation.


Common parameter settings for the FSCC board include:

Gateway setting

Extended ID

Extended ECC parameter settings



2-60


Description Item FSCC

Interface type F&f, Ethernet


Weight 300 g

Power consumption 2.5 W








2-61

2.11 Cross-connect & Timing Board (XCS/XCS1/XCS4)

The XCS is a cross-connect & timing board.

The XCS1 is a cross-connect & timing board with STM-1 line unit.

The XCS4 is a cross-connect & timing board with STM-4 line unit.

The working of the line units on the XCS1 and the XCS4 boards are independent.

The XCS/XCS1/XCS4 board can be seated in slot 7 and slot 8 (displayed as slot 17 and slot 18 on network management system).

2.11.1 Functions

Provides full cross-connection with the capacity of 20 x 20 VC-4, fulfilling service grooming at the VC-4 or VC-12 level.

Provides synchronization clock sources for itself and the system.

Queries the information about board making.

Provides board temperature check function.

Detects and controls the TPS.

Provides 1+1 hot backup for the board, ensuring the reliability of the cross-connect and timing subsystems running in the entire system.

2.11.2 Principle

Block diagram of the working principle is shown in Figure 2-51.

Cross-connectmodule

Clock module

VC-4 BUS

Clock signal

Clock signalSTIA/STIB board

Service processingboards

Service processingboards

Figure 2-51 Block diagram of the XCS/XCS1/XCS4 board

1. Cross-connect Module

This module grooms service between the service boards. The OptiX Metro 1050 does not support time division (TD) cross-connect but space division (SD) cross-connect only.



2-62

Note:

SD cross-connect refers to the cross-connect between the same VC-12 timeslots in different VC-4s, as shown by (a) in Figure 2-52.

TD cross-connect refers to the cross-connect between different VC-12 timeslots in different VC-4s, as shown by (b) in Figure 2-52.

The OptiX Metro 1050 supports cross-connects between the tributary board port and the VC-12 timeslot are supported.

#2 VC-4

#3 VC-4

#1 VC-4

#4 VC-4

#1 VC-4

#2 VC-4

#3 VC-4

#4 VC-4

1

12 1

12

2

#2 VC-4

#3 VC-4

#1 VC-4

#4 VC-4

#1 VC-4

#2 VC-4

#3 VC-4

#4 VC-4

1

12 1

12

2

2

a（（

b（（ Figure 2-52 SD cross-connect and TD cross-connect

2. Clock Module

This module implements source selection, detection, phase locking to the system clock, switches the active and standby XCS boards, and communicates with FSCC through mailbox.

2.11.3 Front Panel

Appearances of the front panel of the XCS, the XCS1 and XCS4 are shown in Figure 2-53, Figure 2-54 and Figure 2-55.



2-63

XCS

ACT

Figure 2-53 The XCS board front panel

XCS1

INOUT LOS

RUN

ACT

Figure 2-54 The XCS1 board front panel

XCS4

INOUT LOS

RUN

ACT

Figure 2-55 The XCS4 board front panel



2-64

Indicators

Table 2-26 gives a description to the indicator of the XCS, XCS1 and XCS4 boards.

Table 2-26 Description of indicators of XCS, XCS1 and XCS4


Off No alarm occurs to the board LOS

(red) On R_LOS alarm occurs to the board.

Flashing 5 times every second. NE software is being loaded.

Flashing 3 times every second. NE software is being deleted.

Flashing once every second. NE software is lost, awaiting for loading

RUN

(green)

Flash once every two seconds. Normal operation state

Off The board is in the standby state. ACT

(green) On The board is in the working state.

Interface There is no interface on the XCS front panel.

The XCS1 board provides one pair of SC/PC connector to process 1 x STM-1 signal.

The XCS4 board provides one pair of SC/PC connector to process 1 x STM-4 signal.


Main parameters that should be configured for XCS/XCS1/XCS4 are as follows:

Protection parameter

Active board

Generally, slot 7 is set as active slot.

Standby board

Generally, slot 8 is set as active slot.

Clock parameter settings

Clock source and priority table

Clock quality

External clock source mode and synchronization status byte

Phase-lock source of external clock output

Clock source switching conditions and clock source restoration parameters

Clock subnet



2-65


Description Item XCS XCS1+OSB1 XCS4+OSB4

Cross-connect capability

20 x 20 VC-4

1260 x 1260 VC-12

Cross-connect level VC-4, VC-12


Weight 350 g 400 g 420 g

Power consumption 6.5 W 7.5 W 8.0 W








2-66

2.12 Engineering Orderwire Board (FEOW)

The FEOW board is an engineering orderwire board, and mainly performs extraction and insertion of the overhead bytes. It provides orderwire phone, transparent data transmission or Boolean inputs/outputs.

The FEOW board can be seated in slot 9.

2.12.1 Functions

Extracts/inserts E1, E2, and F2 bytes.

Provides one channel of orderwire phone over E1/E2 byte and supports addressing call and conference call.

Provides four transparent data transmission (RS-232) broadcast interfaces, namely, S1, S2, S3 and S4 via F2, X1, X2 and X3 bytes, with the maximum data transmission rate of 19.2 kbit/s per channel. It also supports the point-to-point and point-to-multipoint data transmission.

The four data interfaces can be multiplexed for three Boolean inputs and one Boolean output.

2.12.2 Principle

Block diagram of the FEOW board is shown in Figure 2-56. It mainly implements the extraction and insertion of overhead bytes such as E1, E2 and F2 and other user data interface bytes. The orderwire phone channel and data interfaces are also available.

User circuit

Data circuit

Boolean circuit

FPGA

Phone interface

S1,S2,S3,S4

S1:The first data interface (Boolean output )

S2:The second data interface (Input of the third boolean)

S3:The third data interface (Input of the second boolean)S4:The forth data interface (Input of the first boolean)

Figure 2-56 Block diagram of the FEOW board

The FEOW board includes user circuit module, data circuit module, Boolean module and FPGA module.



2-67

1. User Circuit Module

It provides one orderwire phone interface, complete function of phone.

2. Data Interface and Boolean Circuit Module

It provides physical interface of the peripheral data terminal equipment. It provides complete transparent data transmission, asynchronous RS-232 serial ports. The RS-232 serial port is optional and its maximum transmission rate is 19.2 kbit/s. The four RS-232 serial ports can be multiplexed into three Boolean inputs and one Boolean output.

3. FPGA Module

It performs the functions of processing and detection of the signaling, generation of the frame header and clock, clock detection and switching.

2.12.3 Front Panel

From Figure 2-57, there is one phone interface and four RS-232 transparent data (or three Boolean inputs/one Boolean output) interfaces on the FEOW board.

FEOW

Figure 2-57 The FEOW board front panel

Indicator

Table 2-27 gives a description to the indicator of the FEOW board.

Table 2-27 Description of indicators of the FEOW


On Normal link connection Connection status indicator (green, right)

Off Link interrupted or not connected

Flashing or On Data being transmitted Data status indicator (orange, left)

Off No data transceiving



2-68

Interface PHONE interface

It is an orderwire phone interface, working in Dual Tone Multi Frequency (DTMF) mode, using E1/E2 overhead byte.

The orderwire phone interface is a RJ-11 socket, its pin number is shown in Figure 2-58.

3

4

1.2.5.6

16 5 4 3 2

No. Signal

Signal1

Signal1NC

Figure 2-58 RJ-11 pin numbering of the FEOW

S1–S4 interfaces

S1–S4 is single-row 4-port RJ-45 network port connectors, used for transparent data transmission or Boolean signal transmission.

When interfaces S1, S2, S3 and S4 are used as data interfaces, they use the bytes X3, X2, X1 and F2 respectively. Figure 2-59 shows the positions of these bytes in the STM frame structure.

A1 A1 A1 A2 A2 A2 J1 J0M

B1 E1 F1

D1 D2 D3 C2

H11 H12 H13 H21 H22 H23 H31 H32 H33 G1

B21 B22 B23 K1 K2 F2

D4 X1 X2 D5 D6 H4

D7 D8 D9 F3

D10 D11 D12 X3 K3

S1 M1 E2 N1

B3 J1M

Figure 2-59 Positions of X3, X2, X1 and F2 bytes in the STM frame structure

For S1–S4 interfaces the pin numbering is shown in Figure 2-60, and the pin assignments are respectively listed in Table 2-28, Table 2-29, Table 2-30 and Table 2-31.



2-69

18 7 6 5 4 3 2 Figure 2-60 RJ-45 pin numbering of the FEOW

Table 2-28 Pin assignment of S1 interface

Pin number Signal Functions

1 PGND Protection ground

2 RS-232RXD_4 RS-232 receiving data (4F2)

3 RS-232TXD_4 RS-232 transmitting data (4F2)


5 DGND Digital ground


7 KGOUTA Boolean output A

8 KGOUTB Boolean output B





3 RS-232TXD_3 RS-232 transmitting data(3F2)




7 KGIN_3 The third Boolean input

8 KGINGND_3 The third Boolean input ground



2-70





3 RS-232TXD_2 RS-232 transmitting data(2F2)




7 KGIN_2 The second Boolean input

8 KGINGND_2 The second Boolean input ground





3 RS-232TXD_1 RS-232 transmitting data (1F2)




7 KGIN_1 The first Boolean input

8 KGINGND_1 The first Boolean input ground


Main parameters for the FEOW board include telephone call parameters and data server parameters:

Telephone call Telephone number

Call waiting time

Orderwire phone occupation byte E1/E2

Data server Working mode

Broadcast data source

Broadcast data sink



2-71


Description Item FEOW

Number of Boolean interface

3 Boolean inputs and 1 Boolean output

Number of orderwire interface

1

Number of data interface 4


Weight 350 g

Power consumption 5 W








2-72

2.13 Power Board (SPIU/FPIU)

The power board includes: SPIU and FPIU.

The SPIU board provides two –48 V/–60 V DC inputs with power of 100 W. If the power of the OptiX Metro 1050 system is less than 100 W, two SPIU boards can be seated, which are respectively inserted in slot 1 and slot 2 for mutual backup.

The FPIU board provides two –48 V/–60 V DC inputs with power of 198W. If the OptiX Metro 1050 is configured with more than two Ethernet process boards, two FPIU boards need to be seated, which are respectively inserted in slot 1 and slot 2 for mutual backup.

2.13.1 Functions

Provides the access of –48 V/–60 V DC, with the allowed voltage ranging –38.4 V to –72 V DC.

Executes the Electro Magnetic Compatibility (EMC) protection, undervoltage and buffer startup protection of the power supply.

Supports board temperature check function.

Provides 1+1 hot backup mode, increases the reliability of the equipment.

Communicates with FSCC.

2.13.2 Principle

The working principles of the SPIU and FPIU board are similar.

Block diagram of the SPIU/FPIU board is shown in Figure 2-61.

EMCUndervoltage

protectionmodule

Output circuitmodule

Communicationmodule FSCC board

Boards-48V/-60V

Figure 2-61 Block diagram of the power board

The –48 V/–60 V DC power supply from the secondary power supply system undergoes EMC protection processing, passes the undervoltage and overcurrent protection module, and then is output with desired voltage for respective boards by the output circuit.

The following is the description of each functional module.



2-73

1. EMC Protection Module

It performs lightning protection and reverse insertion protection of the –48 V/–60 V DC power input to guarantee the subsequent circuits will not be damaged.

2. Undervoltage Protection Module

It realizes the undervoltage and surge current protection.

When the input voltage is below the undervoltage protection point (–36.6 V), the power input will be disconnected.

Board swapping is supported through the suppression of surge current.

3. Output Circuit Module

It converts the input DC power supply into the system operating voltage.

4. Communication Module

It collects the board working statuses, environmental temperature and the alarms of the damages caused by lightning shock and reports the monitoring results to the FSCC board.

2.13.3 Front Panel

The front panel of SPIU and FPIU are shown in Figure 2-62 and Figure 2-63 respectively.

SPIU

1 2 3

I O

NEG(-) RTN(+)

1. OUT (indicator) 2. Power switch 3. PWR (power socket)

Figure 2-62 The SPIU board front panel



2-74

FPIU

1 2 3

I O

NEG(-) RTN(+)

1. OUT (indicator) 2. Power switch 3. PWR (power socket)

Figure 2-63 The FPIU board front panel

Switch There is a power switch on the SPIU/FPIU front panel.

On: Equipment power is on.

Off: Equipment power is off.

Indicator

Table 2-32 gives a description to the indicator of the SPIU/FPIU board.

Table 2-32 Description of indicator of the SPIU/FPIU


On Board is normal. OUT

(green) Off Input voltage is abnormal or SPIU/FPIU board fails.

Interface Through DB3 socket –48 V/–60 V DC power supply is attached to it. The voltage range of power should be –38.4 V to –72 V DC.


Common parameters for SPIU/FPIU board include:

Temperature upper limit and lower limit

Input power upper limit and lower limit



2-75


Description Item SPIU FPIU

Input voltage –48 V/–60 V

Input voltage range –38.4 V to –72 V

Dimensions 245 mm (L) × 100 mm (W)

Weight 540 g 550 g

Power consumption 8 W 15 W








2-76

2.14 Fan Interface Board (FAN)

The FAN board contains two fans and is used for heat dissipation of the equipment.

The FAN board can be seated in slot 13.

2.14.1 Functions

Regulates the fan speed. If the temperature is very high and beyond the upper threshold, the fan will rotate at higher speed. While it will lower the speed if the temperature is lower.

High maintenance ability. If any of the fans stop rotating, an alarm will be reported to the FSCC board. Correspondingly, the red indicator of the FAN will be on.

Overvoltage protection. Since the working voltage of the fan is lower than –56 V DC and the operating voltage range of the OptiX Metro 1050 is –38.4 V to –72 V DC, hence the overvoltage protection must be provided to the fans.


Supports the environmental temperature query of the fan board.

Supports the query of board information.

2.14.2 Principle

Block diagram of the FAN unit is shown in Figure 2-64, followed by the brief introduction of these units.

Localtemperature

detectionmodule

Fan controlmodule Fans

Fans failuredetectionmodule

FSCC board FSCC board

Boardinformation

Alarmindicator

FSCC board

Figure 2-64 Block diagram of the FAN

1. Local Temperature Detection Module

It detects the surrounding temperature.

2. Fan Control Module

It determines the operating voltage of the fans and controls their speeds according to the temperature detected by the Local temperature detection module, and as well as the temperature information of other circuit boards collected by FSCC board. Since the voltage range of the –48 V/–60 V power supply is –38.4 V to –72 V, and the



2-77

operating voltage range of the fans is lower than –56 V, the fans must be provided with –56 V over voltage protection.

3. Fans Failure Detection Module

It detects the on/off state of the fans. When either of the two fans stops, an alarm will be reported to the FSCC board, and the corresponding alarm indicator of the FAN will be on. When both the fans stop running, the FAN not-in-position alarm will be reported to the FSCC board.

2.14.3 Front Panel

The front panel of FAN is shown in Figure 2-65.

FFAN

ESD

FAN1 ALM

FAN2 ALM

handle

ESD jack

Figure 2-65 The FAN board front panel

There are two indicators, one handle and one electrostatic discharge (ESD) jack on the FAN front panel.

Handle Handle used to draw out the air filter and FAN board.



2-78

Indicator

Table 2-33 gives a description to the indicator of the FAN board.

Table 2-33 Description of indicators of FAN board

Indicator Status Description Remark

On FAN 1 stops running FAN1 ALM (red)

Off FAN 1 is normal

FAN 1 is near the front panel, as shown in Figure 2-66


Off FAN 2 is normal

FAN 2 is away from the front panel, as shown in Figure 2-66.

connector

FAN1ALMFAN2ALM

FAN2 FAN1

Front

Figure 2-66 The position of the fans on the FAN board

Interface ESD jack used to insert static wrist.


Common parameters for the FAN board include:

Temperature threshold


Item Description

Number of fans 2


Weight 9500 g









2-79

2.15 Synchronous Timing Interface Board (STIA/STIB/STIC/STID)

The STIA and STIB are used for the OptiX Metro 1050 I, they are used together with the XCS/XCS1/XCS4 to input and output 2048 kHz or 2048 kbit/s clock signals.

The STIA board is a 75 ohm synchronous timing interface board.

The STIB board is a 120 ohm synchronous timing interface board.

The STIC and STID are used for the OptiX Metro 1050 II. They are used together with the XCS/XCS1/XCS4 to input and output 2048 kHz or 2048 kbit/s clock signals.

The STIC board is a 75 ohm synchronous timing interface board.

The STID board is a 120 ohm synchronous timing interface board.

The STIA/STIB board can be seated in slot 21 of the OptiX Metro 1050 I. The STIC/STID board can be seated in slot 21/32 of the OptiX Metro 1050 II.

Slot 21 and slot 32 use the same physical slot in the OptiX Metro 1050 II. When STIC/STID is seated, it should be held by slot 21.

2.15.1 Functions

Processes two 2048 kHz or 2048 kbit/s clock signal.

Control output/input two 2048 kHz or 2048 kbit/s external clocks via board software.

Provides 75 ohm and 120 ohm interfaces.

Processes synchronization status byte S1.

2.15.2 Principle

The block diagram of the STIA/STIB board is shown in Figure 2-67, including the receiving and transmitting parts.

External clock

External clock Clock signalprocessing

module

Controlmodule

2MHz

2Mbit/sXCS/XCS1

/XCS4board

Figure 2-67 Block diagram of the STIA/STIB/STIC/STID


The incoming 2 MHz or 2 Mbit/s signal passes through the clock signal processing unit and control unit and is sent to the XCS/XCS1/XCS4 board.


The 2 M clock signal from XCS passes through the control unit and clock signal processing unit and is output to the external clock interface. The rate of the output



2-80

clock signal may be either 2 MHz or 2 Mbit/s.

2.15.3 Front Panel

Front panel of the STIA, STIB, STIC and the STID are shown in Figure 2-68, Figure 2-69, Figure 2-70 and Figure 2-71.

STIA

IN1 OUT1 IN2 OUT2

Figure 2-68 The STIA board front panel

STIB

Figure 2-69 The STIB board front panel

STIC

IN1 OUT1 IN2 OUT2

Figure 2-70 The STIC board front panel Front panel of the

STID

Figure 2-71 The STID board front panel



2-81

Interface The interface description of the STIA, STIB, STIC and STID boards are shown in Table 2-34.

Table 2-34 The interface description of the STIA and STIB board

Board name Interface description

STIA/STIC There are two pairs of SMB sockets on the front panel of the STIA/STIC, they provide interfaces for 2048 kHz or 2048 kbit/s clock signal.

I is stand for the 1st external clock interface.

II is stand for the 2nd external clock interface.

STIB/STID There is a DB9 connector on the front panel of the STIB/STID, it provides interface for 2048 kHz or 2048 kbit/s clock signal.

The pin assignment of DB9 is shown in Table 2-35.

Table 2-35 Pin assignment of DB9


3 GND Protection ground

5 EXT1R+ 1st external clock positive input

9 EXT1T+ 1st external clock positive output

4 EXT1R– 1st external clock negative input

8 EXT1T– 1st external clock negative output

7 EXT2T+ 2nd external clock positive input

2 EXT2R+ 2nd external clock positive output

6 EXT2T– 2nd external clock negative input

1 EXT2R– 2nd external clock negative output



2-82


Description Item STIA/STIC STIB/STID

Clock reference 2 (Output and Input)

Interface type SMB DB9

Clock signal 2048 kbit/s, 2048 kHz


Weight 200 g 200 g

Power consumption 1.5 W 1.5 W








2-83

2.16 Case-shape Optical Amplifier (COA)

The case-shaped fiber amplifier (COA) is equipped with only one erbium-doped fiber amplifier (EDFA) module, which works as optical amplifier. It needs separate power supply. It can raise the transmitting optical power up to +14 or +17 dBm to extend the effective transmission distance of optical signals.

2.16.1 Functions

The COA raises the optical transmitting power of the circuit board transmitter via the EDFA. The optical transmitting power can be raised up to 14 or 17 dBm and the signal transmission distance is extended.

The COA provides RS-232 serial port communication module and communicates with the FSCC board. It reports the alarms and performance events of the local board to the NM and receives configuration commands from the NM.

The COA is externally installed and does not occupy any slot in the subrack. It can work separately.

2.16.2 Principle

The principle block diagram of the COA board is shown in Figure 2-72.

A/D D/A

Prefilter

Conversion

Communicationmodule

Controlmodule

Optical part

Data processing andcommunication part

Optical input Optical output

EDFA optical module

Drive and detect part Drive and detect part

FSCC

Figure 2-72 Principle block diagram of COA

1. Optical Part

It consists of EDFA to amplify the optical signal.

2. Driving and Detection Part

It provides the EDFA with driving current and detects the working status of the



2-84

components of the EDFA. It predicts and processes the potential faults.

It implements the functions such as pump power detection, optical module drive control or optical module temperature control, input/output optical power detection.

3. Data Processing and Communication Part

It consists of the CPU and its peripheral chips. It analyzes the measurement results of the detected circuit. On the basis of the analysis, it adjusts the driving circuit within the nominal range to keep the EDFA gain or power output at the nominal value level. It sorts out the abnormalities indicated by the detected data and reports to the NM.

2.16.3 Front Panel

The front panel diagram of case-shaded is shown in Figure 2-73.

1 2 3 4 5 6 7

8 9 10

11

1. ID DIP switch 2. Running indicator 3. Alarm indicator 4. RS232-1

5. RS232-2 6. Monitor -1 7. Monitor -2 8. Input optical port 9. Output optical port 10. Power switch 11. –48 V Power interface

Figure 2-73 Front panel diagram of COA case-shaded

Description of indicator of the COA case-shaded is shown in Table 2-36.



2-85

Indicators

Table 2-36 Description of indicators of COA


The constant ON status of the alarm indicator and the constant OFF status of the running indicator

Memory self-test error

Flashing 3 times every other second Critical alarm occurs

Flashing twice every other second Major alarm occurs

Alarm

(red)

Flashing once every other second Minor alarm occurs

Flashing 5 times per second NE software startup/load

Flashing 1 times per 4 second Database protected mode; Communication between board and FSCC mailbox interrupted

Run

(green)

Flashing 1 times per 2 second The board is in working state

Monitors Table 2-37 Description of the monitor

Monitor Pin number Description

1, 6 EDFA output optical power too low

2, 7 Working temperature of the pump laser over threshold

Monitor-1

3, 8 EDFA cool current of pump laser over threshold

1, 6 EDFA output optical power too low

2, 7 Working temperature of the pump laser over threshold

Monitor-2

3, 8 EDFA cool current of pump laser over threshold

DIP switch OFF OFF

ONON

8 7 6 5 4 3 2 1

Left Right

Figure 2-74 The DIP switches of the COA

The DIP switch is switched upward (0) and downward (1) by default.

Bits 1-4 mean the board ID information, ranging from 20 to 35. In practice, the range



2-86

is from 20 to 27.

Bit 5 means the fiber type. 0 means the access fiber is the G.652 fiber and 1 means the G.655 fiber.

Monitor-1 and Monitor-2 is the alarm output port when only one COA is employed. The relation between the output alarm and the interface pin is illustrated in Table 2-37.

The DIP switches of the COA are located on the lower left part of the panel. Figure 2-74 shows the DIP switches. The DIP switches set the ID of the COA. The FSCC board identifies the COAs by different IDs. It also communicates with the COAs with different IDs.

The RS-232-1 and RS-232-2 serial ports are control & communication interfaces. They communicate with the FSCC, report alarms and performance events. When there are several COAs on the same station, the RS-232-2 port is employed. The RS-232-2 of No. 1 COA is connected with the RS-232-1 of No. 2 COA via the serial port, and the RS-232-2 of No. 2 COA is connected with the RS-232-1 of No. 3 COA. The ports are all connected in this way.

2.16.4 Installing

The COA adopts case-shaped design, no slot in the subrack needed. In the OptiX rack, a special bracket is designed to hold the COA unit. The bracket is fixed on the crossbars on both sides at the upper part of the rack. The COA unit is pushed into the brackets along the guide rails in the brackets and fixed. One bracket can house two COA units horizontally with the front panels of both COAs at the front side of the rack, as shown in Figure 2-75.

Figure 2-75 The position of the COA in OptiX rack

The COA can also adopt wall mounting or desktop bracket mounting.



2-87


Item Description

Dimensions 240 mm (L) × 190 mm (W) × 50 mm (H)

Weight 3500 g


Processing capability One path of optical signal

Interface connector type

SC/PC






OptiX Metro 1050 Hardware Description Manual 3 Cables Description


3-1

3 Cables Description

This chapter introduces the architecture and pin assignments of cables of the OptiX Metro 1050.

The following cables are used for the OptiX Metro 1050:

75 ohm E1 cable

120 ohm E1/T1 cable

75 ohm E3/DS3 cable

STM-1 cable

Power cable

PGND cable

Clock cable

Network cable

Fiber

V.35 cable



3-2

3.1 75 ohm E1 Cable

3.1.1 Structure

Structure of the 75 ohm cable is shown in Figure 3-1.

Metal screw

W1~W4

Figure 3-1 Structure of the 75 ohm E1 cable

The pin assignments of the DB78 connector for 75 ohm E1 cable are shown in Figure 3-2.

1

3921

5940

7860

20

Figure 3-2 Pin assignments of DB78 connector for 75 ohm E1 cable

The 75 ohm E1 cable comprises four coaxial cables, namely W1, W2, W3 and W4.

Each coaxial cable is composed of eight cores, numbered 1 through 8 on the sheath respectively. Figure 3-3 shows the arrangement of these eight cores.

23

418

76 5

Figure 3-3 Arrangement of the eight cores



3-3

3.1.2 Pin Assignments

The 75 ohm E1 cable is terminated with a DB78 connector, for connecting the 75 ohm E1 electrical interface board of the OptiX Metro 1050.

Table 3-1 shows the pin assignments of DB78 connector for 75 ohm E1 cable.

Table 3-1 Pin assignments of the DB78 connector for 75 ohm E1 cable

Cable Pin No.

Signal Core No.

Remarks Cable Pin No.

Signal Core No.

Remarks

2 Tip 4 Tip

22 Ring

1 R1

24 Ring

1 R5

31 Tip 33 Tip

12 Ring

2 T1

14 Ring

2 T5

41 Tip 43 Tip

61 Ring

3 R2

63 Ring

3 R6

70 Tip 72 Tip

51 Ring

4 T2

53 Ring

4 T6

3 Tip 5 Tip

23 Ring

5 R3

25 Ring

5 R7

32 Tip 34 Tip

13 Ring

6 T3

15 Ring

6 T7

42 Tip 44 Tip

62 Ring

7 R4

64 Ring

7 R8

71 Tip 73 Tip

W1

52 Ring

8 T4

W2

54 Ring

8 T8

6 Tip 8 Tip

26 Ring

1 R9

28 Ring

1 R13

35 Tip 37 Tip

16 Ring

2 T9

18 Ring

2 T13

45 Tip 47 Tip

65 Ring

3 R10

67 Ring

3 R14

74 Tip 76 Tip

W3

55 Ring

4 T10

W4

57 Ring

4 T14



3-4

Cable Pin No.

Signal Core No.


Signal Core No.

Remarks

7 Tip 9 Tip

27 Ring

5 R11

29 Ring

5 R15

36 Tip 38 Tip

17 Ring

6 T11

19 Ring

6 T15

46 Tip 48 Tip

66 Ring

7 R12

68 Ring

7 R16

75 Tip 77 Tip

W3

56 Ring

8 T12

W4

58 Ring

8 T16


Cable type SFYZTP-75-2-1 x 8 Core number 8 core Connector DB78 Length 10 m, 15 m, 20 m, 30 m, 40 m



3-5

3.2 120 ohm E1/T1 Cable

3.2.1 Structure

Structure of the 120 ohm E1/T1 cable is shown in Figure 3-4.

Metal screw

W1~W4

Figure 3-4 Structure of the 120 ohm E1/T1 cable

The pin assignments of the DB78 connector for 120 ohm E1/T1 cable are shown in Figure 3-5.

1

3921

5940

7860

20

Figure 3-5 Pin assignments of DB78 connector for 120 ohm E1/T1 cable

The 120 ohm E1/T1 cable comprises four twisted pairs, namely W1, W2, W3 and W4.

Each twist-pair cable is composed of eight twisted pairs, numbered 1 through 8 on the sheath respectively.


The 120 ohm E1/T1 cable is terminated with a DB78 connector, for connecting the 120 ohm E1/T1 electrical interface board of the OptiX Metro 1050.

Table 3-2 shows the pin assignments of DB78 connector for the 120 ohm E1/T1 cable.



3-6

Table 3-2 Pin assignments of the DB78 connector for 120 ohm E1/T1 cable

Cable Pin No.

Core color Core No.


Core color Core No.

Remarks

2 Blue 6 Blue

22 White/Blue

Pair1 R1

26 White/Blue

Pair1 R9

41 Orange 45 Orange

61 White/Orang

Pair2 R2

65 White/Orang

Pair2 R10

3 Green 7 Green

23 White/Green

Pair 3 R3

27 White/Green

Pair 3 R11

42 Brown 46 Brown

62 White/Brown

Pair 4 R4

66 White/Brown

Pair 4 R12

4 Gray 8 Gray

24 White/Gray

Pair 5 R5

28 White/Gray

Pair 5 R13

43 Red 47 Red

63 White/Red

Pair 6 R6

67 White/Red

Pair 6 R14

5 Black 59 Black

25 White/Black

Pair 7 R7

29 White/Black

Pair 7 R15

44 Yellow 48 Yellow

W1

64 White/Yello

Pair 8 R8

W2

68 White/Yellow

Pair 8 R16

31 Blue 35 Blue

12 White/Blue

Pair1 T1

16 White/Blue

Pair1 T9

70 Orange 74 Orange

51 White/Orang

Pair2 T2

55 White/Orang

Pair2 T10

32 Green 36 Green

13 White/Green

Pair 3 T3

17 White/Green

Pair 3 T11

71 Brown 75 Brown

52 White/Brown

Pair 4 T4

56 White/Brown

Pair 4 T12

33 Gray 37 Gray

14 White/Gray

Pair 5 T5

18 White/Gray

Pair 5 T13

72 Red 76 Red

53 White/Red

Pair 6 T6

57 White/Red

Pair 6 T14

34 Black 38 Black

W3

15 White/Black

Pair 7 T7

W4

19 White/Black

Pair 7 T15



3-7

Cable Pin No.

Core color Core No.


Core color Core No.

Remarks

73 Yellow 77 Yellow W3

54 White/Yello

Pair 8 T8 W4

58 White/Yellow

Pair 8 T16

3.2.3 Teachnical Specifications

Cable type SEYPVPV-120-8 x 2 x 0.5 Core number 8 core Connector DB78 Length 10 m, 15 m, 20 m, 30 m, 40 m



3-8

3.3 E3/DS3 Cable

3.3.1 Structure

Structure of the 75 ohm E3/DS3 cable is shown in Figure 3-6.

BNC ConnecterHeat shrink tube Main label

Figure 3-6 Structure of the 75 ohm E3/DS3 cable


Cable type RG59/U Connector BNC Length 15 m, 30 m



3-9

3.4 STM-1 Cable

3.4.1 Structure

The structure of the STM-1 cable is shown in Figure 3-7.

1. Coaxial connector -SMB-75 ohm-straight/plug-female-SFYV-75-2-2 2. Main tag 3. Coaxial cable

Figure 3-7 Structure of the STM-1 cable


Model Coaxial cable –bare copper-75 ohm-4.4 mm-2.4 mm-0.4 mm-PANTONE WARM GREY 1U

Length 15 m, 20 m, 25 m, 30 m, 40 m



3-10

3.5 Power Cable

3.5.1 Structure

Structure of the power cable is shown in Figure 3-8.

A2A1

A3 A

Injection molding screw

Tag 1Main tag

X Figure 3-8 Structure of the –48 V/–60 V DC power cable


The power cable is terminated with a 3-core connector, for connecting the power board of the OptiX Metro 1050.

The power cable is composed of two wires. Table 3-3 shows the pin assignments of the 3-core connector.

Table 3-3 Pin assignments of the 3-core connector for power cable

Cable Pin Core color

W1 A1 (–48 V/–60 V) Blue

W2 A3 (ground) Black


Cable type UL2562-18AWG Connector 3 pin plug Length 15 m, 30 m



3-11

3.6 PGND Cable

Structure of the PGND Cable is shown in Figure 3-9.

Main label

OT terminal

Heat shrink tube

Figure 3-9 Structure of the PGND grounding cable

3.7 75 ohm Clock Cable

Structure of the 75 ohm clock cable is shown in Figure 3-10.

Figure 3-10 Structure of the 75 ohm clock cable

The 75 ohm clock cable is terminated with an SMB connector, for connecting the 75 ohm clock interface board of the OptiX Metro 1050.



3-12

3.8 120 ohm Clock Cable

3.8.1 Structure

Structure of the 120 ohm clock cable is shown in Figure 3-11.

Main tagA

Injection molding screw

Pin 1

Pin 9 X1

A

Figure 3-11 Structure of the 120 ohm clock cable


The 120 ohm clock cable is terminated with a DB9 connector, for connecting the 120 ohm clock interface board of the OptiX Metro 1050. Table 3-4 shows the pin assignments of the DB9 connector.

Table 3-4 Pin assignments of the DB9 connector for 120 ohm clock cable

Cable Pin No. Core color Remarks

1 Blue T2R-

2 White/Blue T2R+

3 Braid -

4 Orange T1R-

5 White/Orange T1R+

6 Green T2T-

7 White/Green T2T+

8 Brown T1T-

W

9 White/Brown T1T+



3-13

3.8.3 Teachnical Specifications

Cable type SEYPVPV-120-4 x 2 x 0.4

Connector DB9 Length 5 m, 30 m



3-14

3.9 Network Cable

3.9.1 Structure

Structure of the network cable is shown in Figure 3-12.

X1 X21

8

A1

8 WA

Network interface connector

Lable1 Lable2Main lable

Figure 3-12 Structure of the network cable

Both ends of the network cable are terminated with RJ-45 connectors, for connecting the NM computer and the OptiX Metro 1050 NM interface.

Figure 3-13 shows the RJ-45 connector.

PIN #1PIN #8

Figure 3-13 RJ-45 connector


The network falls into straight through cable and crossover cable.

Straight through cable: Connects the NM computer and the OptiX Metro 1050 through HUB.

Crossover cable: Directly connects the NM computer and the OptiX Metro 1050.

1. Straight through Network Cable

Table 3-5 shows the pin assignments of the X1 connector for straight through cable.



3-15

Table 3-5 Pin assignments of the X1 connector for straight through cable

X1 connector pin No. 8-core twisted pair X2 connector pin No.

1 White/orange 1

2 Orange 2

3 White/green 3

4 Blue 4

5 White/blue 5

6 Green 6

7 White/brown 7

8 Brown 8

2. Crossover Network Cable

Table 3-6 shows the pin assignments of the crossover cable.

Table 3-6 Pin assignments of the X1 connector for crossover cable

X1 connector pin No. 8-core twisted pair X2 connector pin No.

1 White/ orange 3

2 Orange 6

3 White/ green 1

4 Blue 4

5 White/ blue 5

6 Green 2

7 White/ brow 7

8 Brown 8


Cable type CC4P0.5P445U(S)

Connector RJ-45 Length 10 m, 20 m



3-16

3.10 Fiber

3.10.1 Structure

Structure of the fiber is shown in Figure 3-14.

Figure 3-14 Structure of the fiber


Cable type Optical connector-SC/PC-single mode

Connector SC/PC Length 2 m, 5 m, 15 m, 20 m, 25 m, 30 m, 35 m, 50 m



3-17

3.11 V.35 Cable

3.11.1 Structure

Structure of the V.35 cable is shown in Figure 3-15.

Pin 1

Pin 28A

A

B

B

X1

X2

W

Figure 3-15 Structure of the V.35 cable

The pins on the DB34 connector for V.35 cable are shown in Figure 3-16.

B

B

X2

Figure 3-16 Pins on the DB34 connector



3-18


The V.35 cable is terminated with a DB28 connector, for connecting either the N64 board or the N64I board of the OptiX Metro 1050. At the opposite end, it is terminated at the interconnected equipment.

Table 3-7 shows the pin assignments of V.35 cable.

Table 3-7 Pin assignments of V.35 cable

Cable X1 pin No. X2 pin No. Remarks Cable X1 pin No. X2 pin No. Remarks

19 P 11 F

20 S

Pair

22 J

1 R 23 C

2 T

Pair

13 D

15 V 25 H

16 X

Pair

27 E

3 Y 21 B

4 AA

Pair

6, 7, 8 A Pin 6, 7 and 8 are connected

17 U

W

18 W

Pair

W

Shell Shell Braid


Cable type Symmetrical twisted pair cable-100 ohm-0.38 mm-28AWG-5 x 8

Core number 8 core Connector DB28 at one end, DB34 at the other end

Length Null

OptiX Metro 1050 Hardware Description Manual 4 Power System


4-1

4 Power System

4.1 Overview

The OptiX Metro 1050 can access 110 V/220 V AC and –48 V/–60 V DC. The PIU boards of the OptiX Metro 1050 can access –48 V/–60 V DC directly.

The CAU power system (hereinafter referred to as “CAU”) is external power system. The CAU is specially for the OptiX Metro 1050, used to convert 220 V AC to –48 V DC. It connects to PIU board of the OptiX Metro 1050 with power cables.

Employing the standard 19-inch structure, the CAU consists of the power box for converting 220 V to –48 V and the storage battery box, of which the latter is selected as your needs.

The following introduces the CAU power system.



4-2

4.2 Power Box of the CAU

The dimensions of the CAU power box are 438 mm (W) x 240 mm (D) x 44 mm (H).

The appearance of the CAU power box is shown in Figure 4-1.

GIE4805S

Figure 4-1 Front view of the CAU power box

4.3 Storage Battery Box of the CAU

The dimensions of the CAU storage battery box are 436 mm (W) x 315 mm (D) x 133 mm (H).

The appearance of the CAU storage battery box is shown in Figure 4-2.

Figure 4-2 Storage battery box of the CAU



4-3

Note:

Place the storage battery box stably, keep it in upright position (you may judge it by checking the direction of the symbols on the storage battery box panel). The environment should be desirably dry and cool, with the temperature required between 10–35oC. These are very important factors to affect the life cycle of the batteries inside.

4.4 Installation of the CAU

As the power system specially for the OptiX Metro 1050 product, the CAU can be installed in the following modes.

Installation in the ETSI (600 mm deep) cabinet or in the standard 19-inch cabinet

Installation in the 300 mm-deep ETSI cabinet

Wall mounting

For detailed installing steps, see the OptiX Metro 1050 Compact STM-1/STM-4 Multi-Service Optical Transmission System Installation Manual (V1.40).

Figure 4-3 shows the connection of the CAU and the OptiX Metro 1050.

-48V DCRUN

(a) OptiX Metro 1050

(b) Power box

(c) Storage battery box

CAU

PIU

NEG(-) RTN(+)ON

OFF

PWR

AC100~240

ALM Vout ALM Vout

ALMRUN

RS232

Figure 4-3 The connection of the CAU and the OptiX Metro 1050

OptiX Metro 1050 Hardware Description Manual A Power Consumption


A-1

A Power Consumption

This chapter summarizes the power consumption of the equipment and respective boards for convenient query of the user.

A.1 Power Consumption of the OptiX Metro 1050

Full configuration: 4 x EMS3+4 x ETF4+ 2 x PM1D+2 x XCS4+FSCC+FEOW+ STIA

Typical configuration: EMS3+ETF4+2 x PM1D+2 x XCS4+FSCC+FEOW Equipment type

OptiX Metro 1050 I OptiX Metro 1050 II

Power consumption

Full configuration: 114. W (Configure FPIU)

Typical configuration: 55.5 W (Configure SPIU)

OptiX Metro 1050 Hardware Description Manual A Power Consumption


A-2

A.2 Power Consumption of the Boards

Board name Power consumption (W)

Board name Power consumption (W)

FSCC 2.5 C12S Normal state:0.5

Switching state:4.92

FEOW 5 C34S 0.8

XCS 6.5 TSB3 0.5

XCS1(include OSB1)

7.8 STIA 1.74

XCS4(include OSB4)

8.4 STIB 1.74

PL1S 3.0 STIC 1.74

PL1D 4.0 STID 1.74

PF1S 4.2 SL1 4

PF1D 5.6 SD1 4.5

PM1S 4.2 EMS3 19

PM1D 5.6 ETF4 1

PL3 4.18 SPIU 8

SB2D 4.35 FPIU 15

SLE 5.0 SDE 5.0

EU1S 1.4 EU2S 2.4

N64 5.0 EFT 5.9

FAN 9

OptiX Metro 1050 Hardware Description Manual B Board Indicators


B-1

B Board Indicators

This chapter collects the description of indicators for the OptiX Metro 1050 boards, convenient for your reference.

B.1 SL1/SD1/SB2D


Off No alarm occurs to the SL1 board. LOS (red)

On Alarm occurs to the SL1 board.

Off No alarm occurs to the first pair of optical interface of the SD1/SB2D board.

LOS1 (red)

On Alarm occurs to the first pair of optical interface of the SD1/SB2D board.

Off No alarm occurs to the second pair of optical interface of the SD1/SB2D board.

LOS2 (red)

On Alarm occurs to the second pair of optical interface of the SD1/SB2D board.



B-2

B.2 PL1D/PL1S/PM1D/PM1S PF1D/PF1S



STATE

(green) Off The board is not configured with service, or the board is

under protection.

B.3 PL3



STATE

(green) Off The board is not configured with service, or the board is

under protection.

B.4 SLE/SDE



STATE (green)




B-3

B.5 EMS3


Flashing five times every second

Loading the NE software

Flashing three times every second

Deleting the NE software

Flashing once every second Wait to load the NE software for the original one is lost

RUN (green)


Normal

Off No alarm occurs to NE


Minor alarm occurs to NE

Flashing twice every other second

Major alarm occurs to NE

ALM (red)

Flashing three times every other second

Critical alarm occurs to NE



On The data is in transmission ACT


On The link is normal Green indicator at Ethernet interface: connection status Off The link is interrupted or not

connected

Flashing or On The data is in transmission Yellow indicator at Ethernet interface: data status Off No data is transmitted



B-4

B.6 EFT/ETF4




On The data is in transmission ACTIVE


B.7 XCS/XCS1/XCS4


Off No alarm occurs to the board LOS

(red) On R_LOS alarm occurs to the board.

Flashing 5 times every second.

NE software is being loaded.

Flashing 3 times every second.

NE software is being deleted.

Flashing once every second. NE software is lost, awaiting for loading

RUN

(green)

Flash once every two seconds.

Normal operation state

Off The board is in the standby state. ACT

(green) On The board is in the working state.

B.8 FEOW


On Normal link connection Connection status indicator (green, right) Off Link interrupted or not connected

Flashing or On Data being transmitted Data status indicator (orange, left) Off No data transceiving



B-5

B.9 FSCC

Indicator Status Description 5 times every other second NE software is being loaded

3 times every other second NE software is being deleted

Once every other second NE software is lost, waiting for loading

RUN (running indicator)

Once every other two second Normal operation state

Off No alarm

Once every other second Minor alarm

2 times every other second Major alarm

ALM (alarm indicator)

3 times every other second Critical alarm

On Data is being transmitted. Yellow

Off No data is transmitted.


Green On Link connection is normal.


Green Off Link is broken or not connected.

B.10 PIU


On Board is normal. OUT

(green) Off Input voltage is abnormal or PIU board fails.

B.11 FAN



Off FAN 1 is normal

On FAN 2 stops running FAN2 ALM(red)

Off FAN 2 is normal

OptiX Metro 1050 Hardware Description Manual C Abbreviations and Acronyms


C-1

C Abbreviations and Acronyms

Abbreviations and acronyms Full name

A

ADM Add/Drop Multiplexer

ALS Automatic Laser Shutdown

B

BIOS Basic Input/Output System

BITS Building Integrated Timing Supply System

C

CRC Cyclic Redundancy Check

CMI Coded Mark Inversion

D

DCC Data Communication Channel

DCE Data Connection Equipment

DTE Data Terminal Equipment

E

ECC Embedded Control Channel

EDFA Erbium-Doped Fiber Amplifier

EMC Electromagnetic Compatibility

EMI Electro Magnetic Interference

E/O Electrical/optical conversion

EPL Ethernet Private Line

EPLAN/EPLn Ethernet Private LAN



C-2


ETSI European Telecommunication Standards Institute

EVPL Ethernet Virtual Private Line

EVPLAN/ENPLn Ethernet Virtual Private LAN

F

FE Fast Ethernet

FPGA Field Programmable Gate Array

G

GE Gigabit Ethernet

GFP Generic Framing Procedure

H

HDB3 High Density Bipolar of order 3 code

HDLC High Digital Link Control

I

IEEE Institute for Electrical and Electronic Engineers

IP Internet Protocol

ITU-T International Telecommunication Union-Telecommunication Sector

L

L2 Layer 2

LAN Local Area Network

LAPS Link Access Procedure-SDH

LCAS Link Capacity Adjustment Scheme

LSP Label Switch Path

M

MAC Media Access Control

MADM Multi Add/Drop Multiplexer

MAN Metropolitan Area Network

MCF Message Communication Function

MSTP Multi Service Transmission Platform

N



C-3


NE Network Element

NM Network Management

NRZ Non Return to Zero

NRZI Non Return to Zero Inverted

O

OAM Operation, Maintenance and Management

O/E Optical /Electrical Conversion

OSN Optical Switch Node

P

P Provider

PDH Plesiochronous Digital Hierarchy

PE Provider Edge

R

RSTP Rapid Spanning Tree Protocol

S

SCC System Control & Communication

SDH Synchronous Digital Hierarchy

SFP Small Form-factor Pluggable

SNCP Sub-Network Connection Protection

STM-N Synchronous Transport Module Level-N

T

TDM Time Division Multiplex

TM Termination Multiplexer

TPS Tributary Protection Switching

V

VC Virtual Container

VLAN Virtual LAN

VLL Virtual Leased Line

VPLS Virtual Private LAN Service



C-4


VPN Virtual Private Network

VP Virtual Path

W

WAN Wide Area Network

OptiX Metro 1050 Hardware Description Manual Index


i-1

Index

Numerics 120 ohm clock cable

pin assignment, 3-12 structure, 3-12 technical specification, 3-13

120 ohm E1 cable pin assignment, 3-5 structure, 3-5 technical specification, 3-7

75 ohm clock cable structure, 3-11

75 ohm E1 cable pin assignment, 3-3 structure, 3-2 technical specification, 3-4

75 ohm E3 cable structure, 3-8 technical specification, 3-8

A ALS, 2-2

B board description, 2-1 board indicators, B-1 boards power consumption, A-2 byte

C2, 2-4 D, 2-2 DCC, 2-2 E1/E2, 2-2 J0, 2-4 orderwire, 2-2

C C12. see also PL1S C12S. see also PL1S C34S. see also PL3

cable, 1-12 CAR, 2-41 CAU

appearance, 4-2 connection, 4-3 dimension, 4-2 installation, 4-3 storage battery, 4-2 wall mounting, 4-3

clock external, 2-54 internal, 2-54 slave, 2-54

COA DIP switch, 2-85 front panel, 2-84 function, 2-83 indicator, 2-85 installing, 2-86 monitor, 2-85 principle, 2-83 technical specification, 2-87

connector DB28, 2-53 DB34, 3-17 DB78, 2-29, 3-2 DB9, 2-81 RJ-11, 2-68 RJ-45, 2-68

D DCC, 2-2

E EFT. see also EMS3 EMS3

flow control, 2-47 forwarding filter table, 2-47 front panel, 2-43 function, 2-40 indicator, 2-45



i-2

interface, 2-47 parameter configuration, 2-47 port enable, 2-47 principle, 2-41 TAG mark, 2-47 technical parameter, 2-48, 2-54 working mode, 2-47

EPL, 2-41 EPLAN, 2-41 equipment

appearance, 1-1 architecture, 1-1 composition, 1-1 dimension, 1-12 front panel, 1-3 logical slot, 1-3 power consumption, 1-12 rear panel, 1-5 slot assignment, 1-3 structure, 1-7 weight, 1-12 working voltage, 1-12

equipment configuration full, 1-12 typical, 1-12

ETF4. see also EMS3 EU1S. see also SLE EUPB. see also SLE EVPL, 2-41 EVPLAN, 2-41

F FEOW

front panel, 2-67 function, 2-66 indicator, 2-67 interface, 2-68 parameter configuration, 2-70 principle, 2-66 technical specification, 2-71

FFAN front panel, 2-77 function, 2-76 indicator, 2-78 interface, 2-78 parameter configuration, 2-78 principle, 2-76 technical specification, 2-78

fiber structure, 3-16 technical specification, 3-16

FPIU. see also SPIU FSCC

DIP switch, 2-58 front panel, 2-56 function, 2-55 indicator, 2-57 interface, 2-58 parameter configuration, 2-59 principle, 2-55 technical specification, 2-60

G G.957, 2-1 GFP, 2-41

H HDLC, 2-41

L LAPS, 2-41 laser status, 2-4 LCAS, 2-40

M module

logical control, 2-3 O/E conversion, 2-2 overhead processing, 2-2 synchronization and scrambling, 2-2

N N64

front panel, 2-52 function, 2-49 interface, 2-52 parameter configuration, 2-54 port, 2-54 principle, 2-49 working clock, 2-54

N64I. see also N64 network cable

crossover cable, 3-14 pin assignment, 3-14 straight through cable, 3-14 structure, 3-14 technical specification, 3-15

NMS, 1-3

O OSB1

function, 2-18 loopback, 2-20 parameter configuration, 2-19 principle, 2-18 technical specification, 2-20

OSB4 function, 2-21 loopback, 2-23 parameter configuration, 2-22 principle, 2-21 technical specification, 2-23

P PF1D. see also PL1S PF1S. see also PL1S



i-3

PGND cable structure, 3-11

PL1D. see also PL1S PL1S

front panel, 2-26 function, 2-25 indicator, 2-28 input service type, 2-32 interface, 2-28 parameter configuration, 2-32 payload loading indication, 2-32 principle, 2-25 technical specification, 2-33 tributary loopback, 2-32 tributary protection switching, 2-30

PL3 front panel, 2-36 function, 2-34 indicator, 2-37 input service type, 2-39 interface, 2-37 parameter configuration, 2-38 payload loading indication, 2-38 principle, 2-34 technical specification, 2-39 tributary loopback, 2-39 tributary protection switching, 2-37

PM1D. see also PL1S PM1S. see also PL1S port

external, 2-54 internal, 2-54

port protocol EIA-530, 2-54 RS-499, 2-54 V.24, 2-54 V.35, 2-54 X.21, 2-54

power cable pin assignment, 3-10 structure, 3-10 technical specification, 3-10

power system, 4-1

R RSTP, 2-41

S SB2D

front panel, 2-8 function, 2-6 indicator, 2-8 interface, 2-8 loopback, 2-9 parameter configuration, 2-9 principle, 2-6 technical parameter, 2-9

SD1. see also SL1 SL1

front panel, 2-3

function, 2-1 indicator, 2-4 interface, 2-4 loopback, 2-4 parameter configuration, 2-4 principle, 2-2 technical parameter, 2-5

SLE front panel, 2-13 function, 2-11 indicator, 2-14 interface, 2-14 loopback, 2-16 parameter configuration, 2-16 principle, 2-11 technical parameter, 2-17 TPS, 2-14 tributary protection switching, 2-14

SPIU front panel, 2-73 function, 2-72 indicator, 2-74 interface, 2-74 parameter configuration, 2-74 principle, 2-72 technical specification, 2-75

STIA front panel, 2-80 function, 2-79 interface, 2-81 principle, 2-79 technical specification, 2-82

STIB. see also STIA STIC. see also STIA STID. see also STIA STM-1 cable

structure, 3-9 technical specification, 3-9

T TSB3. see also PL3

V V.35 cable

pin assignment, 3-18 structure, 3-17 technical specification, 3-18

X XCS

front panel, 2-62 function, 2-61 indicator, 2-64 interface, 2-64 parameter configuration, 2-64 principle, 2-61 technical specification, 2-65

XCS1. see also XCS



i-4

XCS4. see also XCS

31250270-Metro 1050 Hardware Description Manual(V1.40)

Documents