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GUIDED BY:
The 22 nanometer (22 nm) is the next CMOS process step following the 32 nm
step on the International Technology
Roadmap for Semiconductors
(ITRS).
It was first introduced by semiconductor
companies in 2008 for use in memory
products
Transistors using a three-dimensional
structure will be put into high-volume manufacturing.
Intel will introduce a revolutionary 3-D transistor design
called Tri-Gate, the 22-nanometer (nm) node in an Intel chip
codenamed "ivybridge
INTRODUCTION
MOORE’S LAW
"THE NUMBER OF TRANSISTORS INCORPORATED IN A CHIP WILL APPROXIMATELY DOUBLE EVERY 24 MONTHS."
—GORDON MOORE
Moore's Law is a forecast for the pace of silicon technology development that states that roughly every 2 years transistor density will double, while increasing functionality and performance and decreasing costs.
Transistors continue to get smaller, cheaper and more energy efficient in accordance with Moore's Law - named for Intel co-founder Gordon Moore
Because of this, Intel has been able to innovate and integrate, adding more features and computing cores to each chip, increasing performance, and decreasing manufacturing cost per transistor.
TECHNOLOGY ROADMAP
Process
name
P1266 P1268 P1270 P1272 P1274
Lithography 45nm 32nm 22nm 14nm 10nm
1st
Production
2007 2009 2011 2013 201590 nm2003
180 nm1999
130 nm2001
65 nm2005
45 nm2007
22 nm2011
OnTrack
32 nm2009
TRI-GATE TRANSISTORS
WHY TRI-GATE TRANSISTORS
Scaling of planar
transistors requires the
scaling of gate oxides
and source/drain
junctions and
transistor gate length
Scaling of planar
transistors leads to the
worsening electrostatics
and short-channel
performance with reducing
gate-length dimension
Performance and power
dissipation needed to be
improved.
WHAT IS TRI-GATE?
Definition
Use of gate in FET
Power and cost
Global perspective
The Tri-Gate technology gets its name from the fact that
transistors using it have conducting channels that are
formed on all three sides—two on each side, one across the
top—of a tall and narrow silicon fin that rises vertically
from the silicon substrat
The Gate is the terminal that drives the transistor on and off, and acts like a capacitance where charge is stored making the channel conductive
• while meeting the overall power, cost and size requirements for a range of market segment needs. Replacing the "2D" gates with super-thin fins that rise up from the silicon base.
Ivy Bridge-based Intel Core family processors will be the first high-volume
chips to use 3-D Tri-Gate transistors. The performance, functionality and
software compatibility of Intel architecture
HISTORY OF TRIGATE
2006 2008 2009 2010 20112002
MAKING OF A CHIP
Sand / Ingot / Wafer Photolithography, Implantation, etching Gate Formation, Metal Deposition and Layers Wafer Sort , Packing and Testing
COMPARISON B/W 2D AND 3D
MODIFICATIONS IN PLANAR TRANSISTORS
•At the same switching speed,
Intel's 22nm 3D Tri-Gate
transistors can run at 75 - 80%
of the operating voltage of
Intel's 32nm transistors. This
results in lower active power
at the same frequency.
Transistor Operation
The “fully depleted” characteristics of Tri-Gate transistors provide a
steeper sub-threshold slope that reduces leakage current
22 nm Tri-Gate transistors can operate at lower voltage
with good performance, reducing active power by >50%
CHACTERISTICS
Reduction in power
dissipation
Increased pathway for
electrical signals
Drives 20% more current
than traditional planar
transistors
High switching speed
High performance with reduced
size
Better control over leakage
current due to 3D structure
MULTIPLE FINS CAN BE ADDED TO PRODUCE OVERALL HIGHER
PERFORMANCE
BENEFITS
Dramatic performance gain at low operating voltage , better than Bulk, PDSOI,FDSOI37% performance increase at low voltage 50% power reduction at constant performanceImproved switching characteristics Higher drive current for a given transistorOnly 2 – 3% cost adderMore compact hence enabling higher transistor density
CONCLUSION
•Intel is introducing revolutionary Tri-Gate transistors on its 22 nm logic technology •Tri-Gate transistors provide an unprecedented combination of improved performance and energy efficiency •22 nm processors using Tri-Gate transistors, code-named Ivy Bridge, are now demonstrated working in systems •Intel is on track for 22 nm production in 2H „11, maintaining a 2-year cadence for introducing new technology generations •This technological breakthrough is the result of Intel’s highly coordinated research-development-manufacturing pipeline •Tri-Gate transistors are an important innovation needed to continue Moore’s Law
REFERENCES
1 Technology Scaling and Roadmap for 22nm CMOS and beyond March 13, 2009 @Kyongpook National University by Hiroshi Iwai Tokyo Institute of Technology2 www.intel.com/pressroom.3 http://www.engadget.com/2009/09/22/intel-announces-22nm-chips-for-2011/4 http://www.intel.com/content/www/us/en/silicon-innovations/22nm-technology-how-transistors-are-made-video.html5 http://www.intel.in/content/www/in/en/silicon-innovations/intel-22nm-technology.html6.http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6242496&url=http%3A%%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D62424967.http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6176988&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D61769888.http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5475000&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5475000
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