Universal logic gates 1. INTRODUCTION 2. LOGIC GATES 3. UNIVERSAL LOGIC GATES 4. WORKING 5. APPLICA TIONS INTRODUCTION In this 20 th century, world cannot be imagined without the use ofelectronic devices and IC’s are the pillars for these devices and these devices are mainly constructed using different combinations oflogic gates .The concept of logic gates brought a great revolution in the field ofelectronic devices. A logic gate performs a logical operation on one or more logic inputs and produces a single logic output. The 1 st logic Gates was developed in 1837 by Charles Babbage and they are of mechanical for m. From then a large variety and different type of logic gates are constructed there are different types of logic gates li ke And, Or, Nand, nor, ex-or etc, these logic gates are also known as Boolean logic gates. The fundamental logic gate s are or & and Gates. But these are not the basis for making of different gates. So there came the concept ofuniversal logic gates and the universal logic gated are nand and nor gates, they are called so because using both these logic gates all the other logic Gates can be constructed. They are like the pillars for making all the Boolean logic gates. These are of digital in nature and their inputs and outputs will be accounted in 1’s and 0’s i.e, operating at high and low voltages. It looks very amazing that why AND & OR gates are not extensively used gates their complements are the most extensively used gates. This is because such circuits involve transistors where inversion occurs automatically.
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Now replace OR gate with input bubble with the NAND gate. Now we havecircuit which is fully implemented with just NAND gates.
NOR GATE
It is the second universal logic gate. Same as nand gate any entire logicsystem can be implemented using only NOR gate. It is basicallycomplement of OR logic gate and denoted by different ways. Logic norgate function is sometimes called the ‘pierce function’ and denoted by A B
.the other way to represent it is A+B.A NOR gate gives high output only when all the inputs given to it are lowotherwise the output remains high.
CONSTRUCTION AND WORKING NOR GATE:
NOR gate is constructed following different types of circuitry
(TTL,CMOS,NMOS etc).depending upon circuitry the limitations and other
The above expression can be implemented with three OR gates in firststage and one AND gate in second stage as shown in figure.
If bubble are introduced at the output of the OR gates and the inputs of AND gate, the above circuit becomes as shown in figure.
Now replace AND gate with input bubble with the NOR gate. Now we havecircuit which is fully implemented with just NOR gates.
Comparison between NAND & NOR gates
Although both gates are universal, they differ in their performance The NOR gate has a higher logical effort than the NAND (5/3 versus 4/3 fora 2-input gate), and thus is slower. I don't know what exactly you mean by"reliability" at high speed, but the NAND gate is faster.
The logical effort of a gate is basically the product of its input capacitanceand drive resistance, divided by the input capacitance and driveresistance of an inverter, which is used for reference.
The typical inverter has an input capacitance of 3 units, since the PMOS istypically twice the size of the NMOS. The inverter's drive resistance istaken to be 1, and thus the bottom of the fraction is always 3.
To achieve the same drive strength as the inverter, the 2-input NAND
must have an input capacitance of four units (as seen by each input), andthus its logical effort is taken to be 4/3. The 2-input NOR has an inputcapacitance of five units (as seen by each input) and thus its logical effortis taken to be 5/3.
More complex gates necessarily have more input capacitance than theinverter, and thus are slower, given identical output drive strengths.Logical effort captures this in a single number; gates with higher logicaleffort are slower.
Applications of universal gates
NOR & NAND gates are two pillars of logic and logic circuits are widelymade by them only. Logic circuits include devices such as multiplexers,registers, arithmetic logic units (ALUs) and computer memory all the wayup through complete micro processors which contain 100 million logic
gates.In computer memory the most debated application of these gates is flashmemory.
Flash memory, it is a type of non-volatile memory allocation. Flashmemory stores information in an array of memory cells made fromfloating-gate transistors. Flash is used as secondary storage devices suchas hard disks, memory cards, memory stick, micro SD, xD-Picture Card, Intelligent Stick.etc. The most commonly used flash memories are NOR flash & NAND flash.
Both have their own qualities and drawbacks.NOR flash
NOR flash memory wiring and structure on siliconIntel saw the massive potential of the invention and introduced the firstcommercial NOR type flash chip in 1988.In NOR gate flash, each cell has one end connected directly to ground,and the other end connected directly to a bit line. This arrangement iscalled "NOR flash" because it acts like a NOR gate when one of the wordlines is brought high, the corresponding storage transistor acts to pull theoutput bit line low.
Programming
Programming a NOR memory cell (setting it to logical 0), via hot-electron
A single-level NOR flash cell in its default state is logically equivalent to abinary "1" value, because current will flow through the channel underapplication of an appropriate voltage to the control gate. A NOR flash cellcan be programmed, or set to a binary "0" value, by the followingprocedure:
• an elevated on-voltage (typically >5 V) is applied to the CG
• the channel is now turned on, so electrons can flow from the sourceto the drain (assuming an NMOS transistor)
• the source-drain current is sufficiently high to cause some highenergy electrons to jump through the insulating layer onto the FG,via a process called hot-electron injection
Erasing
Erasing a NOR memory cell (setting it to logical 1), via quantum tunneling.
To erase a NOR flash cell (resetting it to the "1" state), a large voltageof the opposite polarity is applied between the CG and source, pulling theelectrons off the FG through quantum tunneling. Modern NOR flashmemory chips are divided into erase segments (often called blocks orsectors). The erase operation can only be performed on a block-wisebasis; all the cells in an erase segment must be erased together.
Programming of NOR cells, however, can generally be performed one byteor word at a time.
NAND flash architecture was introduced by Toshiba in 1989
NAND flash also uses floating-gate transistors, but they are connected in away that resembles a NAND gate several transistors are connected inseries, and only if all word lines are pulled high (above the transistors' V T)is the bit line pulled low. These groups are then connected via someadditional transistors to a NOR-style bit line array.
To read, most of the word lines are pulled up above the V T of aprogrammed bit, while one of them is pulled up to just over the V T of anerased bit. The series group will conduct (and pull the bit line low) if theselected bit has not been programmed.
Despite the additional transistors, the reduction in ground wires and bit
lines allows a denser layout and greater storage capacity per chip. Inaddition, NAND flash is typically permitted to contain a certain number of faults (NOR flash, as is used for a BIOS ROM, is expected to be fault-free).Manufacturers try to maximize the amount of non-faulty storage byshrinking the size of the transistor below the size where they can be madereliably, to the size where further reductions would increase the numberof faults faster than it would increase the total storage available.
NAND flash uses tunnel injection for writing and tunnel release for erasing.NAND flash memory forms the core of the removable USB storage devicesknown as USB flash drivers and most memory card formats available