200G/400G Transceivers - High Speed test challenges · Introduction test solutions 100G to 200G/400G transition Measurement challenges Solutions. Transceiver evolution 2000 2005 2010

200G/400G Transceivers - High Speed testchallenges

Kees Propstra

Outline

▪ Transceiver evolution

▪ Transceiver overview

▪ Introduction test solutions

▪ 100G to 200G/400G transition

▪ Measurement challenges

▪ Solutions

Transceiver evolution

2000 2010 20202005 2015

QSFP28

OSFP

QSFP-DD

QSFP+

SFP1G

10G

100G

400G

40G

SFP+

graph for illustrative purposes only

What is next?

Embedded optical module

FiberASIC

PCBA

FiberASIC w/ photonics

PCBA

ASIC Re-timerOptical

Module

PCBA

QSFP28 ModuleMid-Board Optics

ModuleCo-packaged ASIC & Photonics

Courtesy: Luxtera

Credit: Intel

Transceiver overview

Block diagram for 100G-SR4 PMD

Credit: IEEE 802.3bm-2015

Block diagram for 100G-CWDM4 PMD

Credit: CWDM4_MSA_Technical_Spec

Introduction test solutions

▪ BERT - Bit Error Rate Tester

▪ DSO – Digital Sampling Oscilloscope

▪ TDR – Time Domain Reflectometry

TDR

Tx

Rx

DU

T

DSOBERT

Signal migration from 100G to 200/400G

25G NRZ vs. 50/100G PAM4

25G NRZ

53GBaud PAM4

NRZ

▪ Mask margin is key figure of merit

PAM4

▪ 4 levels, 3 eyes, 12 transitions

▪ Simple mask margin probably not a good predictor of link performance

▪ Effect of fiber link

▪ Receiver equalization

Why PAM4?

Transmission channels arelossy

▪ 10 dB at 13 GHz typical

Modulator bandwidths arelimited

▪ 40 GHz available today

PAM4 Modulation

▪ Same data throughput at half the frequency

▪ Double data rate at the same frequency

▪ 2 bits/symbol, data rate = 2 x symbol rate

one symbol

Measurement Challenges - Optical

TDECQ - is the new TX metric

Transmitter Dispersion Eye Closure (Quaternary)

▪ TDECQ is the “new” mask margin test of PAM4, it is a predictor of a system performance of a PAM4 transmitter

▪ TDECQ Calculates the dB ratio of how much noise can be added to the transmitter signal while meeting the target symbol error ratio

▪ TDECQ measurements should mimic what’s expected for a real receiver

▪ There is good correlation between TDECQ and link performance

R is noise margin at a fixed symbol error rate

▪ Higher R is better

▪ Lower TDECQ is better

Worst case fiber environment Reference receiver

TDECQ Measurement Accuracy

It is critical that measurement accuracy is ensured and that multiple test vendors provide identicalresults

▪ Measurement equipment correction

▪ System Impulse Response Correction – compensate the measurement channel to meet the IEEE defined filter characteristic

▪ Scope Noise Compensation – TDECQ measurement has a measurement system noise compensation factor

▪ Correlation

▪ Multi-vendor test correlation

▪ IEEE provided standard waveform (mazzini_3cd_01a_0518)

▪ Correlation typical 0.2 dB

R is noise margin

s = O to E and oscilloscope noise

ML 1.91 dB

-25

-30

0

-5

-10

-15

-20

Tra

nsfe

r[d

B]

0 1E+10 2E+10 3E+10 4E+10 5E+10

Frequency [GHz]

scope BW

Ideal BT4

TEK 1.95 dB

SIRC

Measurement Challenges - Electrical

Typical Test Configuration

5 10 15 20 25 30 350 40

0

-2

-4

-6

-8

-10

-12

-14

dB

(S(1

,3))

Instrument

DUTConnector

Pristine signal Distorted signalChannel

▪ No measurements possible on the signal after the channel without de-embedding!

▪ Effect of the channel must be de-embedded. This can either be done using a VNA or a DSO

Freq, GHz

Compensating for Channel Losses

PPG

DUTConnector

DSO

ED

Method 1: DSO De-embedding▪ Using s-parameters generated in a VNA or a simulation tool▪ Using s-parameters measured by the DSO

Method 2: FFE taps generated by DSO and used to configure the PPG signal shaper so it compensates for channel losses (Tx equalization)

Method 3: Error-Detector of the BERT uses an equalizer (FFE, DFE, CTLE) to de-embed channel losses (Rx equalization)

Example of De-embedding using a Scope

DSODUT

Connector

DUT signal after Compensating for the trace losses

DSO measures and de-embeds the channel in frequencydomain

FFE Equalization at 53 GBd using a DSO/PPG

PPG

DUTConnector

DSO

ED

Distorted signal from channel FFE taps from DSO loaded In PPG

DSO calculates FFE taps

Solutions

Time Domain Analysis

Frequency Domain Analysis

dB

m

SolutionsML4035Cable test, impedance 4 CH 35 GHz

ML4039D/79DBERT 4/8CH28 GBd, 56 Gbps

ML4015DElectrical DSO 32/50 GHz

ML4039EBERT 4CH56 GBd, 112 Gbps

ML4015DOptical DSO 25/40 GHz SM/MM

ML1016D-CROptical Clock Recovery26/53 GBd PAM4

THANK YOU