MAX1820 WCDMA PA 3 BATT LX OUT SYNC REF GND RF TRANSMIT SECTION RF RECEIVE SECTION V OUT CONTROL DAC Li+ BATTERY 2.7V TO 4.2V 13MHz OR 19.8MHz SYSTEM CLOCK BASEBAND PROCESSOR FIXED- GAIN LINEAR PA V OUT 4.7µF 4.7µH DYNAMIC SUPPLY 0.4V TO 3.4V 1MHz PWM STEP-DOWN CONVERTER MAX1820 2 2.5G 3G 3 ADC ABC ADC 6 13 1kV 17 32V 19 21 FM 22 23
22
Embed
1MHz PWM STEP-DOWN CONVERTER - Maxim Integrated · max1820 wcdma pa 3 batt lx out sync ref gnd rf transmit section rf receive section vout control dac li+ battery 2.7v to 4.2v 13mhz
This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
Transcript
MAX1820 WCDMA PA
3
BATTLX
OUT
SYNC
REF
GND
RF TRANSMIT SECTION
RF RECEIVE SECTION
VOUT CONTROLDAC
Li+ BATTERY 2.7V TO 4.2V
13MHz OR19.8MHz
SYSTEM CLOCK
BASEBANDPROCESSOR
FIXED-GAINLINEARPA
VOUT
4.7µF
4.7µH
DYNAMICSUPPLY0.4V TO
3.4V
1MHz PWM STEP-DOWN CONVERTER
MAX1820
2
2.5G 3G 3
ADC ABC ADC 6
13
1kV 17
32V 1921
FM 2223
2.5G 3G
3G
2G
2G
PA
3G
DC-DC PA
1
2
/
2G
3
WCDMA
3.4V
300mA 600mA
30mA 0.4V 1V
2040mW
12mW
3
1. M A X 1 8 2 0WCDMA PA
BATTLX
OUT
SYNC
REF
GND
RF TRANSMIT SECTION
RF RECEIVE SECTION
VOUT CONTROLDAC
Li+ BATTERY 2.7V TO 4.2V
13MHz OR19.8MHz
SYSTEM CLOCK
BASEBANDPROCESSOR
FIXED-GAINLINEARPA
VOUT
4.7µF
4.7µH
DYNAMICSUPPLY0.4V TO
3.4V
1MHz PWM STEP-DOWN CONVERTER
MAX1820
2. MAX1820
1000
10-10 5 15 25-5 0 10 20
100
BATT
ERY
CURR
ENT
(mA)
BATTERY CURRENT WITHAND WITHOUT MAX1820
TRANSMIT POWER (dBm)
PA CONNECTEDTO BATTERY
PA CONNECTEDTO MAX1820
SAVED BATTERY CURRENT
4
MAX1820 WCDMA
MAX1820
•
MAX1820
4 500mW 2040mW
MAX1820 0.15Ω PFET
97%
12mW 500mW MAX1820 0.2Ω NFET
3.3mA PWM
90% 90%
1MHz
3
FET
• 3.4V
0.4V –
DAC MAX1820 REF
DAC 3.4V
REF OUT 1.76
• 3 0 µs
WCDMA
666µs 1dB
10 ms
5
50µs
DAC
MAX1820
30µs
MAX1820
4.7µF
4.7µF
ESR
5mVp-p
MAX1820
30µs
MAX1820
3. WCDMA
0.4V/30mA 12mW 3.4V/600mA 2040mW
0
0.4
1.0
3.0
3.4
30 300 600WCDMA PA SUPPLY CURRENT (mA)
WCD
MA
PA S
UPPL
Y VO
LTAG
E (V
)
VOICE
DATA
4. MAX1820
1MHz
40
60
50
80
70
90
100
10
30
20
50
40
60
70
0 1000500 1500 2000
CONVERTER EFFICIENCY AND LOSSvs. LOAD
LOAD—PA SUPPLY POWER (mW)
CONV
ERTE
R EF
FICI
ENCY
(%)
CONV
ERTE
R PO
WER
LOS
S (m
W)
LOSS
EFFICIENCY
• 9.5% 100% PWM
(Li+)
4.2V
2.7V
MAX1820
PWM 4.2V
0.4V
9.5%
100%
MAX1820
PFET 0.15Ω0.1Ω
600mA 150mV
3.4V
/
• 1MHz MAX1820
1MHz PWM
PWM
MAX1820
1MHz ±20%
MAX1820 13 18
13MHz 19.8MHz
WCDMA
3G
5
5. MAX1820 666µs 1dB
WCDMA
MAX1820
30µs
500mV/div
400µs/div
<30µs RISE-TIMEAND SETTLING
ADC ABCADC
12 – ADC
12
ADC
ADC
ADC
ADC
EN
0 . 1 % 10
12
12
4LSB INL 12 ADC
10
0.5LSB INL
0.0122% 13
INL
2N N
0.075% 11 ADC
0.025%
– DAC PWM
1kHz
0˚C +70˚C 0˚C
+50˚C
ADC
DNL
DNL
LSB 1a 1b 1c 1d
INL DNL DNL
ADC
DNL ±1LSB
1a 1b 1c 1d
DNL DNL -0.5LSB 1b
-1LSB 1c
10
DNL ±1LSB ADC
-1LSB
1d -1.5LSB DNL
DNL -1LSB +2LSB
ADC DNL
-1LSB
DNL
[N]
[N+1] 1LSB
DNL 1LSB DNL
1LSB DNL
6
(1)Total error E E E ... E )12
22
32
N2 ( = + + + +
13
DNL ≤±4LSB
16 ADC 14 5
DNL≤ ±1LSB 16 ADC 15
ADC
INL DNL INL
12
±2LSB INL 2/4096 0.05%
ADC
2/3 1LSB
±1LSB INL 0.0244%
ADC 32.5% 0.5LSB
0 . 0 1 2 % A D C 1 6 %
0.0125%/0.075% INL
DNL
µC
DSP
2
x y
3a
ADC
7
1a. DNL
DNL =-0.8LSB
DNL =+1LSB
DIGITALCODE
ANALOG INPUT (V)
110
101
100
011
010
001
1b. DNL
DNL ERROR = -0.5LSB
DIGITALCODE
11
10
01
ANALOG INPUT (V)
1c. DNL 10
DNL ERROR = -1LSB
DIGITALCODE
11
10
01
ANALOG INPUT (V)
1d. DNL 10
DNL ERROR = -1.5LSB
DIGITALCODE
11
10
01
ANALOGINPUT (V)
AIN*
AT AIN THE DIGITAL CODE CAN BE ONE OF THREE POSSIBLE VALUES.
*
0V
3b
A
ADC 4
ADC
ADC
1. 2.5V +8mV 12 ADC
13LSB 8mV/[2.5V/4096]
12
13
2.5V 4083/4096
= 2.492V ADC
ADC
ADC
16 8mV 210LSB
VREF = 2.5V
2. -8mV
+8mV
ADC
5
8
2.
-FS ANALOG INPUT (VANALOG INPUT (V)+FS+FS ANALOG INPUT (V)+FS
+FS-FS
IDEAL ADC
+FS + OFFSET-FS + OFFSET
DIGITALCODE
NOTE: FS = FULL SCALE
IDEAL ADC ANALOGINPUT RANGE
INPUT RANGE FOR ADCWITH NEGATIVE OFFSET
Shifted ADC Transfer FunctionShifted ADC Transfer FunctionDue to Negative OffsetDue to Negative OffsetSHIFTED ADC TRANSFER FUNCTIONDUE TO NEGATIVE OFFSET
3a 3b.
2
1
A
INITIAL ADC TRANSFERFUNCTION (x, y AXES)
ADC TRANSFER FUNCTIONON x', y' AXES WITH GAINERROR CALIBRATED
IDEAL ADC (x, y AXES)
x
yy'
x'
INITIAL MEASUREDBIPOLAR ZERO ERROR
rANALOGINPUT (V)
DIGITALCODE
INITIAL ADCTRANSFERFUNCTION
1
A
ANALOG INPUT (V)
DIGITALCODE
BIPOLAR OFFSETERROR AFTER INITIAL GAIN
ADJUSTMENT
2
3
4
OFFSET CALIBRATED
GAIN CALIBRATED,INTRODUCING A SMALLOFFSET ERROR
OFFSET RECALIBRATED
IDEAL ADCTRANSFERFUNCTION
INITIALMEASURED
BIPOLARZERO ERROR
(a) (b)
ADC
ADC
y = m1/m2 x m1
m2
5
ADC
1 6
12 3FFh
1
ADC
4050 4096 12
46
4096
ADC
6
1
ADC
4LSB 12
ADC
9
4.
NOTE: FS = FULL SCALE
IDEAL ADC ANALOG INPUT RANGE
INPUT RANGE FOR ADC WITHNEGATIVE OFFSET
INPUT RANGE FOR ADC WITHPOSITIVE OFFSET
DIGITALCODE
ANALOG INPUT (V)ANALOG INPUT (V)ANALOG INPUT (V)+FS+FS+FS
UNUSED ANALOG INPUT RANGEDUE TO POSITIVE OFFSET ERROR
Unused Analog Input RangeUnused Analog Input RangeDue to Negative Offset ErrorDue to Negative Offset ErrorUNUSED ANALOG INPUT RANGEDUE TO NEGATIVE OFFSET ERROR