Effects of field-dependent mobility on transfer efficiency in m.o.s. b.b.d. analogue delay lines J. W. Haslett, M.Sc, Ph.D., and M. L. Kejariwal, M.Sc. Indexing terms: Charge-coupled devices, Delay lines, Monolithic integrated circuits Abstract The effects of fiel d-dependent mob ility on transfer inefficiency due to intrinsic transfer limita tion s, dynamic-dram conductance and threshold-voltage modulation are calculated for an m.o.s. bucket-brigade delay line. The results show significant differences over previous theories at higher clock frequencies, where line performance is critical if quantisation errors are to be minimised in analogue applications. 1 Introduction In a conventional m.o.s. b.b.d ., charg e transfer no rmally takes place through the channel of a simpl e m.o.s triode, whose gate-dr ain capacitance has been artificially increased to form one of the storage buckets in the delay line. 1 ' 2 The drain diffusion also acts a s a source for the next triode in the line, and so on. At low and intermediate clock frequencies, finite dynamic-dr ain conductance and threshold- voltage modulation, due to source and drain-vol tage variat ions during charge transfer, constitute the most significant effects contributing to charge-transfer inefficiency. At higher clock frequencies, the transfer inefficiency increases due to the finite time required for charge to fl ow from one capacitor to the next in the line. This mechanism represents an inherent limitation to the high-frequency performance of the line , and is determined by the gain characteri stics of the transistors used. Unfortunately, in many applications the length of the time delay is fixed and it is desirable to minimise quantisation errors by taking many samples per cycle of the maximum input freque ncy of interest. This i mplies a h igh clock rate and a long line, which is a cond ition where intrinsic transfer inefficiency can become imp ortant. It is therefore of interest to examine the factors affe cti ng the intrinsic transfer process. The most simple model of charge transfer assumes a transistor with a square-law characteristic of the form 3 In = -(V BR ~ 0 ) where |3 is a factor that includes carrier mobility and devic e geo metry. If the source capacitance at the beginning of transfer is charged to Vs , then the charge to be transferred is simply described by -Q = c(v g8 -v T ) (2 ) where Cis the oxide overlap capacitance. Since the drain current must be equal to dQ/dt if no charge is lost to the gate circuit, then combin- ing eqns. 1 and 2 gives the charge remaining in the source after time t as (3 ) (4 ) Once this quan tity is known, the intrinsi c transfer-ineffici ency parameter e, - is readily calculated from 4 = dQ(jl €i dQ(o) where r represents the time available for transfer and is normally equal to one clock period. Applying eqn. 4 to eqn. 3 leads to the simple result €, - = 1 + 2C 2 (5 ) Eqn. 5 indicates that at low clock frequenci es e, - is small and dominated by other effects such as nonzero drain conductance, while at higher freq uenci es it degrad es rapidly toward unity, so tha t the intrinsi c transfer process dominates in this range. Paper 7802E, first received 12th July and in revised form 24th September 1976 Dr. Ha slett and Mr. Kejariwal are with the Department of Electrical Engineering, Faculty of Engineering, The University of Calgary, 2920 24th Avenue NW , Calgary, Alberta, Canada T2N 1N4 Some attempts have been made by Sangster s to reduce the effects of dynamic drain conductance by employing an m.o.s. tetrode con- figured switch to effect the charge transfer. In these devices, the remaining transfer inefficiency can be attri but ed largely to intrinsic effects similar to eqn. 5 even at intermediate frequenci es. The intrinsic tr ansfer inefficiency represen ts a hi gh-frequency limitation in both types of devices, and we have found that field- dependent mobility plays an important role in the overall high- frequen cy delay-line performance. It is the purpose of this paper to examine these effects. 2 M.O.S. triode structures 1.2 Intrinsic transfer inefficiency The intrinsic-transfer-inefficiency-param eter calculation i s easi ly modifi ed to include field-depen dent mobility using Trofimenkoff s 6 emperical relationship, given by Mm = (6) where j L t 0 is the l ow field mobility, e is the electric field, and e c is an empirical constant. This expression is most accurate for bulk mobility calculations, but can be made to give a reasonable fit to p-channel surface-mobility curves if ju 0 and E c are properly chosen. 10 The m.o.s transistors operate only in the saturated region of their ID-VDS characteristics during transf er and eqn. 6 leads directly to h{sat) = (V gs -V T )V DSfsat) -V l PS (.sat) where V DS (Mf) is given by (sat) = -LE r +LEA 1 + Was ~ L E , (7) (8) The char ge to be transferred is still gi ven by eqn. 2 and a combination of eqns. 2, 7 and 8 leads to an implicity solution for Q(T) of the form 1 + 2g(r) 7 CV T - 1 - 1 + 2(2(o)7 CV r 2y C + ln 1 + 2Q(T)7 CV T - 1 1 + 2Q (o)7 CVr, (9 ) where y — Vrl{Le c ). Applying eqn. 4 to eqn. 9 leads directly to € im ~ 2Q(r)y CV T - 1 2Q(o)y CVr, - 1 0 0 ) Eqn. 10 i s evaluat ed for a gi ven init ial charge to be transferred, Q(o), by interatively solving eqn. 9 for Q(r) and sub stituting both val ues in eqn. 10. Comparisons of e, - and e^ are shown i n Figs. 1 and 2 as functions of clock frequency and signal-bias voltage for two sets of PROC. IEE, Vol. 124, No. 2, FEBRUARY 1977 109
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7/27/2019 1977 - IEE - Effects of Field-Dependent Mobility on Transfer Efficiency in m.o.s. b.b.d. Analogue Delay Lines
The effects of field-dependent mob ility on transfer inefficiency due to intrinsic transfer limita tions, dynamic-dramconductance and threshold-voltage modulation are calculated for an m.o.s. bucket-brigade delay line. The resultsshow significant differences over previous theories at higher clock frequencies, where line performance is criticalif quantisation errors are to be minimised in analogue applications.
1 Introduction
In a conventional m.o.s. b.b.d ., charge transfer no rmally takesplace through the channel of a simple m.o.s triode, whose gate-draincapacitance has been artificially increased to form one of the storagebuckets in the delay line.
1'2
The drain diffusion also acts as a sourcefor the next triode in the line, and so on. At low and intermediateclock frequencies, finite dynamic-drain condu ctance and threshold-voltage mo dulation, due to source and drain-voltage variations duringcharge transfer, constitute the most significant effects contributing tocharge-transfer inefficiency. At higher clock frequencies, the transferinefficiency increases due to the finit e time required for charge toflow from one capacitor to the next in the line. This mechanismrepresents an inherent limitation to the high-frequency performanceof the line , and is determined by the gain characteristics of thetransistors used. Unfortunately, in many applications the length ofthe time delay is fixed and it is desirable to minimise q uantisationerrors by taking many samples per cycle of the maximum inputfrequency of interest. This implies a high clock rate and a long line,which is a cond ition where intrinsic transfer inefficiency can becomeimp ortant. It is therefore of interest to examine the factors affectingthe intrinsic transfer process.
The most simple model of charge transfer assumes a transistor witha square-law characteristic of the form
3
In = -(VBR ~ 0)
where |3 is a factor that includes carrier mobility and device geo metry.If the source capacitance at the beginning of transfer is charged toVs, then the charge to be transferred is simply described by
-Q = c(vg8-vT) (2 )
where Cis the oxide overlap capacitance. Since the drain current mustbe equal to dQ/dt if no charge is lost to the gate circuit, then combin-ing eqns. 1 and 2 gives the charge remaining in the source after time tas
(3 )
(4 )
Once this quan tity is known, the intrinsic transfer-inefficiencyparameter e,- is readily calculated from4
= dQ(jl€i
dQ(o)
where r represents the time available for transfer and is normally equalto one clock period. Applying eqn. 4 to eqn. 3 leads to the simpleresult
€,- = 1 +2C
2 (5 )
Eqn. 5 indicates that at low clock frequencies e,- is small and dominatedby other effects such as nonzero drain conductance, while at higherfrequencies it degrades rapidly toward unity, so tha t the intrinsic
transfer process dominates in this range.
Paper 7802E, first received 12th July and in revised form 24th Septem ber 1976
Dr. Ha slett and Mr. Kejariwal are with the Department of Electrical Engineering,Faculty of Engineering, The University of Calgary, 2920 24th Avenue NW ,Calgary, Alberta, Canada T2N 1N4
Some attempts have been made by Sangsters
to reduce the effectsof dynamic drain conductance by employing an m.o.s. tetrode con-figured switch to effect the charge transfer. In these devices, theremaining transfer inefficiency can be attri but ed largely to intrinsiceffects similar to eqn . 5 even at intermediate frequencies.
The intrinsic transfer inefficiency represen ts a high-frequencylimitation in both types of devices, and we have found that field-dependent mobility plays an important role in the overall high-frequency delay-line performance. It is the purpose of this paper to
examine these effects.
2 M.O.S. triode structures
1.2 Intrinsic transfer inefficiency
The intrinsic-transfer-inefficiency-parameter calculation iseasily modified to include field-depen dent mobility usingTrofimenkoff s
6emperical relationship, given by
Mm = (6)
where jLt0 is the low field mob ility, e is the electric field, and ec is anempirical con stant. This expression is most accurate for bulk mobilitycalculations, but can be made to give a reasonable fit t o p-channelsurface-mobility curves if ju0 and Ec are properly chosen.10
The m.o.s transistors operate only in the saturated region of theirID-VDS characteristics during transfer and eqn. 6 leads directly to
h{sat) =
(Vgs-VT)VDSfsat)
-V l PS (.sat)
where VDS ( M f ) is given by
(sat) = -LE r+LEA 1 +Was ~
LE,
(7)
(8)
The charge to be transferred is still given by eqn. 2 and a combination
of eqns. 2, 7 and 8 leads to an implicity solution for Q(T) of the form
1 +2g(r)7
CV T
- 1 - 1 +2(2(o)7
CV r
2yC+ ln
1 +2 Q ( T ) 7
CV T
- 1
1 +2Q (o)7
CVr,
(9)
where y — Vrl{Le c).Applying eqn. 4 to eqn. 9 leads directly to
€im ~
2Q(r)y
CV T
- 1
2Q(o)y
CVr, - 1
00)
Eq n. 10 is evaluated for a given initial charge to be transferred, Q(o),by interatively solving eqn. 9 for Q(r) and sub stituting both values ineqn. 10. Comparisons of e,- and e^ are shown in Figs. 1 and 2 asfunctions of clock frequency and signal-bias voltage for two sets of
PROC. IEE, Vol. 124, No. 2, FEBRUARY 1977 109
7/27/2019 1977 - IEE - Effects of Field-Dependent Mobility on Transfer Efficiency in m.o.s. b.b.d. Analogue Delay Lines
devices with identical characteristics except for channel length. As canbe seen, the inefficiency increases markedly at shorter channel lengthsowing to the effect of field-dependent mobility.
There has also been some discussion in the literature on the effectsof varying clock waveform.
3When a trapezoidal waveform is used,
the effects of field-depen dent mobility are readily included and itcan be shown that this leads to another implicit equation for Q(T)of the form
In
- I - * ?
In
where
and
u(p) K t
7
- - + K7
In
K t
y
2m C 1
my' "(r) =
;- ' • ^ C l t '
01 )
1 +2Q(r)7
CV T
andrwz is the slope of the clock waveform.Numerical solution of eqn. 11 leads to the value of eitm) the
transfer inefficiency parameter for a trapezoidal waveform includingeffects of field-depend ent mobility. This result is compared directlywith that of Berglund,
3in Figs. 3a and 3b , for the cases where
mobility is assumed con stant. As can be seen, the difference in thevalue of e obtained when accounting for field-dependent mobility isgreater than an order of magnitude in these cases.
If one is to be convinced that these differences are important, thenit is necessary to examine the effects of m obility on dynamic-drainconductance and on threshold-voltage modulation due to source anddrain voltages as well.
2.2 Dynamic-drain conductance
The expression for the saturated drain current in eqn. 1assumes that the current depends on gate-source voltage only. Inpractice, the drain potential also has a small effect on drain current,
producing a finite nonzero dynamic output conductance in the sat-uration region of operation. The presence of this conductance hasbeen shown to lead to incomplete charge transfer, and, in general, itcan be shown
3'4
that
Many authors have described models which account for the effectsof gate and drain-voltage variations, substrate impurity concentrationand oxide thickness on channel shortening in a saturated device.Frohman-Bentchkowsky and Grove
7have derived a relatively simple
model that accounts for many of these factors, and which can bewritten as
Ld
2e s
(YDS ~( 1 3 )
10
10
-3
£UU
a
uu
10- 5
10
10
- 6
10
- 8
10 10J 10
frequency. Hz10
ed = ^ (12)Sm
where the output conductance g^ and the gate transconductancegm are both evaluated in the saturation region at the end of thetransfer period.
Fig. 2
Comparison of intrinsic-inefficiency variations with clock frequencyincluding and excluding field-dependent mobility effects
eim
10- 5
-6£10
•oco
10
- 810
uJ1
?ec
0 2 4 6 8 10 12signal bias voltage (Vs-V,), V
Fig. 1Comparison of intrinsic-transfer-inefficiency variations with biasvoltage including and excluding field-dependent m obility effects.
e .
10"' 1 03
io2
10
.2J J
a;
J J
10
E
uJ -5
uj " fi10
6
\
\
/
/
/
/
/
/ / .
/ • • -
/
/
.-10'
3 5 7 9 11 13signal bias voltage(V S-V T ), V
a
105
106
107
frequency, Hz
Fig. 3
Intrinsic-transfer-inefficiency variations
L - 12 M«H
R(m)V= 1 S V , CQ X = 0 - 0 3 3 6 M F / c m
2,C = OS pF , Mo = 200 cm
2V ' S " ' , / = SO kH z
'eism
• ' €ismleisa With bias voltage using trapezoidal clock wav ef or m s/= 1 MHzb With clock frequency using trapezoidal clock waveforms Vc = 15V,
110 PROC. IEE, Vol. 124, No. 2, FEBRUARY 1977
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Using eqn. 19 it can be shown that the contribution to transferinefficiency due to threshold voltage is given by
(20)
where Vx has the same meaning as that described in eqn. 19.
The overall line performance can then be calculated to includethe effects of intrinsic transfer, dynamic drain conductance and
theshold-voltage modulation, both with and without field-dependentmobility. These calculated curves can be compared directly withmeasured results to indicate whether or not intrinsic transferefficiency is the limiting factor, and whether or not field-dependentmobility is important.
The measurements were performed using the impulse inputtechnique for c.c.d.s.
9which eliminates errors due to sampler and
source follower attenuation. Fig. 8 shows a comparison of measuredand theoretical results for a large value of capacitance, both includingand excluding field-dependent mobility in the calculations. The
observed results are considerably different from the theoretical curveif mobility is assumed constant, but quite satisfactory agreement is
obtained if mobility variations are included.Since nominal mobility and channel length can differ significantly
from device to device, it is important to consider the sensitivity of theexpressions for transfer inefficiency to these parameters, if com-parison with the experiment is to be meaningful.
2C2
BQOT\Since et < 1 always, — T
y I L J
5% h i L
> 1 and
/• *
2C2
1 +PQoA
2C2
(21)
2C= - 2 at worst, and
y J \ Jso a 5% change in Mo orL would result in a 10% change in et.
Similarily, expressions can be derived for the sensitivities of e^
to 7 and Q(T). The analytic expressions are somew hat complicated
and it is easier to substitute the appropriate values and vary them asfollows:Consider
7 = 0-4
26(0)7 = 2y(Vgs-V T) _
CVT VT
2£Cr)7 .CVT
Then eim = 0 1 1 2 3 .
If 7 is changed by 10% then e^ = 0-115, a change of about 2-5%.The sensitivity of e^ to changes in 7 is approximately 0-25.Similarily, errors in Q(T) as determined from eqn. 9 can easily be
estimated. In the example above, if Q(T) is changed by 10%; i.e.
7 = 04
26(0)7 = 4
CVT
an d
CVT
then eim = 0-132, and the sensitivity of e in
slightly less than 2.
to errors in Q(T) is
10" 10-frequency, Hz
Fig. 8
Comparison of measured and theoretical variations in transferinefficiency for a discrete 28-stage m.o.s. b.b.d., as a function of
clock frequency
>— observed e— calculated e m
calculated e
,i« = 2VVc - 15V
C = 1 nF
The sensitivities of individual-stage transfer inefficiency are
therefore low valued in all cases. Because of the averaging nature of
the line, and because the parameters of each stage vary in bothdirections from the average, the overall accuracy of the measurementswill be better than ± 10%. This type of error is not in any sense largeenough to explain the observed differences shown in Fig. 8, particularlysince relatively long channels are involved. Similar agreement has beenobtained using smaller and larger line capacitances. U nfortunately, it
was not possible for us to vary the channel length in these deviceswhile keeping all other device parameters c onstan t. The observed
differences areexpected to increase substantially when shorterchannels are used.
4 Conclusions
The effects of field-dependent mobility on transferinefficiency due to intrinsic transfer, dynamic drain conductance and
112 PROC. IEE, Vol. 124, No.,2\ FEBRUARY, 1977
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