This document is posted to help you gain knowledge. Please leave a comment to let me know what you think about it! Share it to your friends and learn new things together.
5DVI/HDMIケーブル用TMDSディジタルビデオイコライザABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage VCC ..............................................-0.5V to +4.0VVoltage at All I/O Pins.................................-0.5V to (VCC + 0.7V)Voltage between any CML I/O Complementary Pair ..........±3.3VContinuous Power Dissipation (TA = +70°C)
Operating Junction Temperature Range...........-55°C to +150°CStorage Temperature Range .............................-55°C to +150°CDie Attach Temperature...................................................+400°C
ELECTRICAL CHARACTERISTICS(VCC = +3.0V to +3.6V, TA = 0°C to +70°C. Typical Values are at VCC = +3.3V, external terminations = 50Ω ±1%, TMDS rate =250Mbps to 1.65Gbps, TA = +25°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PWRDWN = HIGH 165 230Power-Supply Current ICC
PWRDWN = LOW 10mA
Supply-Noise Tolerance DC to 500kHz 200 mVP-P
EQUALIZER PERFORMANCE
1dB skin-effect loss at 825MHz 0.2
24dB skin-effect loss at 825MHz 0.2Residual Output Jitter (CablesOnly) 0.25Gbps to 1.65Gbps(Notes 1, 2, and 3) 40dB skin-effect loss at 825MHz 0.2
UI
CID Tolerance 20 Bits
CONTROL AND STATUS
CLKLOS Assert LevelDifferential peak-to-peak at EQ input with165MHz clock
50 mVP-P
CML INPUTS (CABLE SIDE)
Differential Input Voltage Swing VID At cable input 800 1000 1400 mVP-P
ELECTRICAL CHARACTERISTICS (continued)(VCC = +3.0V to +3.6V, TA = 0°C to +70°C. Typical Values are at VCC = +3.3V, external terminations = 50Ω ±1%, TMDS rate =250Mbps to 1.65Gbps, TA = +25°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Common-Mode Output Voltage50Ω load, each side to VCC,OUTLEVEL = HIGH
VCC -0.25
V
Rise/Fall Time (Note 1) 20% to 80% 80 130 200 ps
LVTTL CONTROL AND STATUS INTERFACE
LVTTL Input High Voltage VIH 2.0 V
LVTTL Input Low Voltage VIL 0.8 V
LVTTL Input High Current VIH(MIN) < VIN < VCC -50 µA
Open-Collector Output High RLOAD ≥ 10kΩ to VCC 2.4 VOpen-Collector Output Low RLOAD ≥ 2kΩ to VCC 0.4 VOpen-Collector Output Sink 5 mA
Note 1: AC specifications are guaranteed by design and characterization.Note 2: Cable input swing is 800mV to 1400mV differential peak-to-peak. Residual output jitter is defined as peak-to-peak determin-
istic jitter + 14.2 times random jitter.Note 3: Test pattern is a 27 - 1 PRBS + 20 ones + 27 - 1 PRBS (inverted) + 20 zeros.
標準動作特性_______________________________________________________________________(Typical values are at VCC = +3.3V, TA = +25°C, data pattern = 27 - 1 PRBS + 20 ones + 27 - 1 PRBS (inverted) + 20 zeros, unlessotherwise noted.)
SUPPLY CURRENTvs. TEMPERATURE
MAX
3815
toc0
1
TEMPERATURE (°C)
SUPP
LY C
URRE
NT (m
A)
605030 402010
110
120
130
140
150
160
170
180
190
200
1000 70
OUTLEVEL = HIGH
OUTLEVEL = LOW
DIFFERENTIAL INPUT RETURN LOSSvs. FREQUENCY
MAX
3815
toc0
2
FREQUENCY (MHz)
GAIN
(dB)
2500200015001000500
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
-500 3000
EQUALIZER INPUT AFTER 205ft OF GORE 89CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815 toc03
5ns/div
128mV/div
350mV/div
DATA RATE = 1.65Gbps40dB CABLE SKIN-EFFECT LOSS AT 825MHz
DVI/HDMIケーブル用TMDSディジタルビデオイコライザ
Maxim Integrated 3
Kelly.Heaney
Sticky Note
None set by Kelly.Heaney
Kelly.Heaney
Sticky Note
MigrationNone set by Kelly.Heaney
Kelly.Heaney
Sticky Note
Unmarked set by Kelly.Heaney
MA
X3
81
5DVI/HDMIケーブル用TMDSディジタルビデオイコライザ標準動作特性(続き) _________________________________________________________________(Typical values are at VCC = +3.3V, TA = +25°C, data pattern = 27 - 1 PRBS + 20 ones + 27 - 1 PRBS (inverted) + 20 zeros, unlessotherwise noted.)
EQUALIZER INPUT EYE AFTER 205ft OF GORE 89CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815 toc04
152ps/div
350mV/div
DATA RATE = 1.65Gbps40dB CABLE SKIN-EFFECT LOSS AT 825MHz
EQUALIZER INPUT EYE AFTER 205ft OF GORE 89CABLE (TOP) EQUALIZER OUTPUT (BOTTOM)
MAX3815 toc05
1ns/div
300mV/div
DATA RATE = 250Mbps40dB CABLE SKIN-EFFECT LOSS AT 825MHz
EQUALIZER EYES AFTER 100ft MADISON DIGITAL FLAT-PANEL CABLE, 28 AWG (DATA RATE = 1.65Gbps)
MAX3815 toc06
200ps/div
350mV/div
EQUALIZER EYES AFTER 100ft MADISON DIGITAL FLAT-PANEL CABLE, 28 AWG (DATA RATE = 350Mbps)
MAX3815 toc07
1ns/div
350mV/div
EQUALIZER EYES AFTER 3ft CABLE(DATA RATE = 1.65Gbps)
MAX3815 toc08
200ps/div
350mV/div
JITTER vs. DATA RATE AFTER 205ft CABLEWITH 40dB SKIN-EFFECT LOSS AT 825MHz
MAX
3815
toc0
9
DATA RATE (Mbps)
JITTE
R (p
s P-P
)
14501250450 650 850 1050
20
40
60
80
100
120
0250 1650
GORE 89 CABLE
RESIDUAL JITTER =DJ + 14.2 x RJ
DETERMINISTIC JITTER
TOTAL JITTER vs. POWER-SUPPLYNOISE FREQUENCY (DATA RATE = 1.65Gbps)
MAX
3815
toc1
0
FREQUENCY (kHz)
TOTA
L JIT
TER
(ps P
-P)
10,000100010 100
110
120
130
140
150
160
170
180
1001 100,000
NOISE AMPLITUDE: 200mVP-PDATA THROUGH 100ft MADISON DIGITALFLAT-PANEL CABLE, 28AWG
0
0.2
0.1
0.4
0.3
0.5
0.6
0 10050 150 200
DETERMINISTIC JITTER vs. CABLE LENGTH(TENSOLITE TWIN-AX 28 AWG)
MAX
3815
toc1
1
CABLE LENGTH (ft)
DETE
RMIN
ISTI
C JIT
TER
(UI P
-P)
1.65Gbps
800Mbps
250MbpsNO EQ
WITHMAX3815 EQ
RESIDUAL JITTER vs. SIGNAL AMPLITUDEINPUT TO CABLE (DATA RATE = 1.65Gbps)
MAX
3815
toc1
2
DIFFERENTIAL AMPLITUDE (mVP-P)
RESI
DUAL
JITT
ER (p
s P-P
)
1.21.00.8
70
80
90
100
110
120
600.6 1.4
205ft OF GORE 89 CABLE WITH 40dB SKIN-EFFECT LOSS AT 825MHzRESIDUAL JITTER = DJ + 14.2 X RJ
4 Maxim Integrated
Kelly.Heaney
Sticky Note
None set by Kelly.Heaney
Kelly.Heaney
Sticky Note
MigrationNone set by Kelly.Heaney
Kelly.Heaney
Sticky Note
Unmarked set by Kelly.Heaney
MA
X3
81
5
-1.0
-0.7
-0.8
-0.9
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
0 4020 60 80 100 120
EQCONTROL VOLTAGE (RELATIVE TO VCC)vs. CABLE LENGTH (MANUAL EQ CONTROL)
MAX3815 toc13
CABLE LENGTH (ft)
EQCO
NTRO
L VO
LTAG
E (V
)
CABLE IS TENSOLITE TWIN-AX28 AWG WITH APPROXIMATELY0.34dB OF LOSS PER FOOT AT825MHz
RESIDUAL JITTERAT 1.65Gbps
EQCONTROL VOLTAGE
0
60
40
20
80
100
120
140
160
180
200
RESI
DUAL
JITT
ER (p
s P-P
)
EQUALIZER OUTPUT EYE AFTER 120ftOF CABLE (DATA RATE = 1.65Gbps)
MAX3815 toc14
CABLE IS TENSOLITETWIN-AX 28 AWG
200mV/div
100ps/div0
100
50
200
150
300
250
350
0 40 6020 80 100 120
LOSS-OF-CLOCK ASSERT THRESHOLDvs. CABLE LENGTH
MAX
3815
toc1
5
CABLE LENGTH (ft)
DIFF
EREN
TIAL
CLO
CK A
MPL
ITUD
E (m
V P-P
)
165MHz CLOCK FREQUENCY
25MHz CLOCK FREQUENCY
CABLE IS TENSOLITE TWIN-AX 28 AWG
標準動作特性(続き) _________________________________________________________________(Typical values are at VCC = +3.3V, TA = +25°C, data pattern = 27 - 1 PRBS + 20 ones + 27 - 1 PRBS (inverted) + 20 zeros, unlessotherwise noted.)
38, 41, 43, 44VCC Supply Voltage. All pins must be connected to VCC.
2 RX0_IN- Negative Data Input, CML
3 RX0_IN+ Positive Data Input, CML
6 RX1_IN- Negative Data Input, CML
7 RX1_IN+ Positive Data Input, CML
10 RX2_IN- Negative Data Input, CML
11 RX2_IN+ Positive Data Input, CML
14 RXC_IN+ Positive Clock Input, CML
15 RXC_IN- Negative Clock Input, CML
17 EQCONTROL
Equalizer Control. This pin allows the user to control the equalization level of the MAX3815. Connectthe pin to GND for automatic operation. Set the voltage to VCC / 2 for minimum equalization, or setthe voltage between VCC - 1V to VCC for manual equalization. See the Typical OperatingCharacteristics for more information.
18 CLKLOSLoss-of-Clock Signal Output, LVTTL Open Collector. This pin asserts low upon loss of the input TMDSclock from the cable.
19 PWRDWNPower-Down Input, LVTTL. This input allows the IC to be powered down to conserve power. Connecthigh for normal operation. Pull low for power-down mode.
入力バッファと出力ドライバは電流モードロジック(CML)を用いて実装されます(図3と図4を参照)。出力ドライバはオープンコレクタであり、OUTON端子を使ってオフにすることができ、また、OUTLEVEL端子を使って半振幅信号(500mVP-P差動)を出力するように設定することができます。CMLとのインタフェースの詳細に関してはマキシムのアプリケーションノート「HFAN-01.0:Introduction to LVDS, PECL, and CML」を参照してください。
39 OUTLEVELOutput-Level Control Input, LVTTL. This input sets the output amplitude to the standard DVI level(1000mVP-P) when high, and sets the output amplitude to 1/2 the DVI level (500mVP-P) when low.
40 OUTONOutput-Enable Control Input, LVTTL. This input enables the CML outputs when forced low and sets adifferential logic zero when forced high.
45–48 N.C. No Connection
EP Exposed PadGround. The exposed pad must be soldered to the circuit-board ground for properthermal and electrical operation.