1

A

Report

On

“INDUSTRIAL ECONOMICS & MANAGEMENT”

SubmittedIn partial fulfillment for the award of the degree of

BACHELOR OF TECHNOLOGY

In

Electronics & Communication Engineering

(2011-2012)

Submitted to: Submitted by:

Ms. Suman Lalit Joshi

B.Tech Final Year

ECE

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

SRI GANGANAGAR ENGINEERING COLLEGE, SRI GANGANAGAR

ACKNOWLEDGEMENT

It was highly educative and interactive to have knowledge regarding the latest technologies which are established just now or going to establish. A person technically lacks without having practical as well as theoretical knowledge, it was a good chance for learning new things to update our self.

I am highly thankful to the respected Mr. RITURAJ SIR who has motivated me to do the right things. I also take the opportunity to thanks Mr. RAJESH SIR who has put this type of knowledgeable session so that we can have some overview regarding the latest technologies and we will be ready for the future.

CONTENTS

1. PROJECT DESCRIPTION

2. Microcontroller AT89C513. MCS-51 Family Instruction Set4. ATMEL Series of microcontroller5. Hardware Description7. Working Principle8. Circuit Diagram9. Program10. List of Components11. Data Sheets

PROJECT DESCRIPTION

The project Current detector cum controller is very much useful for controlling the load in any industry. In this project we are measuring the current consumed by all the loads connected in a house. If the load current exceed the set value of current the load will be disconnected immediately. The heart of the project is microcontroller AT89S51 and current sensing transformer. The current sensing transformer is used to sense the current consumed by load. The current sensed by the current sensor is converted into voltage and feed to the ADC0804 for analog to digital conversion. The digital equivalent of the current is read by microcontroller AT89S51 from the ADC0804. The digital value of current is processed my microcontroller and displayed on LCD. We have provided a 16x2 LCD display for displaying the value of load current and set current. For changing the value of set current there are two keys called UP/DOWN keys. The UP/DOWN Keys can be used to increase or decrease the value of set current. One key is provided to reset the load supply after an over current trip. Five different loads are connected for testing purpose. The load supply can be can be switched ON/OFF through a relay controlled by microcontroller. We have used 5V regulated supply for microcontroller AT89S51, ADC0804, LCD and 12V unregulated supply for relay circuit.

MICROCONTROLLER AT89C51

Architecture of 8051 family:-

The figure – 1 above shows the basic architecture of 8051 family of microcontroller.

Features• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-Level Program Memory Lock• 128 x 8-Bit Internal RAM• 32 Programmable I/O Lines• Two 16-Bit Timer/Counters• Six Interrupt Sources• Programmable Serial Channel• Low Power Idle and Power Down Modes

Description

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory (PEROM). The

device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard MCS-51™ instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications. The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, five vector two-level interrupt architecture, a full duplex serial port, and on-chip oscillator and clock circuitry.In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

Pin Description

VCCSupply voltage.

GNDGround.

Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In

this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification.External pull-ups are required during program verifi Port 1Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI); Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Port 3Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89C51 as listed below:

RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC

instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSENProgram Store Enable is the read strobe to external program memory.

Port Pin Alternate FunctionsP3.0 RXD (serial input port)P3.1 TXD (serial output port)P3.2 INT0 (external interrupt 0)P3.3 INT1 (external interrupt 1)P3.4 T0 (timer 0 external input)P3.5 T1 (timer 1 external input)P3.6 WR (external data memory write strobe)P3.7 RD (external data memory read strobe)

When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.

XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

Idle ModeIn idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled

Interrupt or by hardware reset. It should be noted that when idle is terminated by a hardHardware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

Status of External Pins during Idle and Power down ModesMode Program Memory ALE PSEN PORT0 PORT1 PORT2 PORT3Idle Internal 1 DataIdle External 1 Float Data Address DataPower down Internal 0 DataPower down External 0 Float Data

Power down ModeIn the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Program Memory Lock BitsOn the chip are three lock bits which can be left un-programmed (U) or can be programmed (P) to obtain the additional features listed in the table below:When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement withThe current logic level at that pin in order for the device to function properly.

Lock Bit Protection ModesProgram Lock Bits Protection TypeLB1 LB2 LB31 U No program lock features.2 P U MOVC instructions executed from external program memory are disabled from fetching codeBytes from internal memory, EA is sampled and latched on reset, and further programming of theFlash is disabled.3 P U Same as mode 2, also verify is disabled.4 P same as mode 3, also external execution is disabled.

Programming the FlashThe AT89C51 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The low voltage programming mode provides a convenient way to program the AT89C51 inside the user’s system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers. The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table. The AT89C51 code memory array is programmed byte-by byteIn either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.

Programming Algorithm: Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figures 3 and 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.

Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.

Chip Erase:The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.

Reading the Signature Bytes:

The signature bytes are read by the same procedure as a normal verification of locations 030H,031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows. (030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programming

Programming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion. All major programming vendors offer worldwide support for the Atmel microcontroller series. Please contact your local programming vendor for the appropriate software revision.

Flash Programming ModesNote: 1. Chip Erase requires a 10-ms PROG pulse.

SPECIAL FUNCTION REGISTER (SFR) ADDRESSES:ACC ACCUMULATOR 0E0HB B REGISTER 0F0HPSW PROGRAM STATUS WORD 0D0HSP STACK POINTER 81HDPTR DATA POINTER 2 BYTESDPL LOW BYTE OF DPTR 82HDPH HIGH BYTE OF DPTR 83HP0 PORT0 80HP1 PORT1 90HP2 PORT2 0A0HP3 PORT3 0B0HTMOD TIMER/COUNTER MODE CONTROL 89H

TCON TIMER COUNTER CONTROL 88HTH0 TIMER 0 HIGH BYTE 8CHTLO TIMER 0 LOW BYTE 8AHTH1 TIMER 1 HIGH BYTE 8DHTL1 TIMER 1 LOW BYTE 8BHSCON SERIAL CONTROL 98HSBUF SERIAL DATA BUFFER 99HPCON POWER CONTROL 87H

TMOD (TIMER MODE) REGISTER

Both timers are the 89c51 share the one register TMOD. 4 LSB bit for the timer 0 and 4 MSB for the timer 1.In each case lower 2 bits set the mode of the timerUpper two bits set the operations.GATE: Gating control when set. Timer/counter is enabled only while the INTX pin is high and the TRx control pin is set. When cleared, the timer is enabled whenever the TRx control bit is setC/T: Timer or counter selected cleared for timer operation (input from internal system clock)

M1 Mode bit 1M0 Mode bit 0

M1 M0 MODE OPERATING MODE0 0 0 13 BIT TIMER/MODE0 1 1 16 BIT TIMER MODE1 0 2 8 BIT AUTO RELOAD1 1 3 SPLIT TIMER MODE

PSW (PROGRAM STATUS WORD)

CY PSW.7 CARRY FLAGAC PSW.6 AUXILIARY CARRY F0 PSW.5 AVAILABLE FOR THE USER FRO GENERAL PURPOSERS1 PSW.4 REGISTER BANK SELECTOR BIT 1RS0 PSW.3 REGISTER BANK SELECTOR BIT 00V PSW.2 OVERFLOW FLAG-- PSW.1 USER DEFINABLE BITP PSW.0 PARITY FLAG SET/CLEARED BY HARDWARE

PCON REGISATER (NON BIT ADDRESSABLE)

If the SMOD = 0 (DEFAULT ON RESET)

TH1 = CRYSTAL FREQUENCY 256---- ____________________

384 X BAUD RATEIf the SMOD IS = 1

CRYSTAL FREQUENCYTH1 = 256--------------------------------------

192 X BAUD RATEThere are two ways to increase the baud rate of data transfer in the 8051

1. To use a higher frequency crystal2. To change a bit in the PCON register

PCON register is an 8 bit register. Of the 8 bits, some are unused, and some are used for the power control capability of the 8051. The bit which is used for the serial communication is D7, the SMOD bit. When the 8051 is powered up, D7

(SMOD BIT) OF PCON register is zero. We can set it to high by software and thereby double the baud rateBAUD RATE COMPARISION FOR SMOD = 0 AND SMOD =1TH1 (DECIMAL) HEX SMOD =0 SMOD =1

-3 FD 9600 19200-6 FA 4800 9600-12 F4 2400 4800-24 E8 1200 2400

XTAL = 11.0592 MHZ IE (INTERRUPT ENABLE REGISTOR)

EA IE.7 Disable all interrupts if EA = 0, no interrupts is acknowledged If EA is 1, each interrupt source is individually enabled or disabledBy sending or clearing its enable bit.

IE.6 NOT implementedET2 IE.5 enables or disables timer 2 overflag in 89c52 onlyES IE.4 Enables or disables all serial interruptET1 IE.3 Enables or Disables timer 1 overflow interruptEX1 IE.2 Enables or disables external interruptET0 IE.1 Enables or Disables timer 0 interrupt.EX0 IE.0 Enables or Disables external interrupt 0INTERRUPT PRIORITY REGISTER

If the bit is 0, the corresponding interrupt has a lower priority and if the bit is 1 the corresponding interrupt has a higher priority

IP.7 NOT IMPLEMENTED, RESERVED FOR FUTURE USE.IP.6 NOT IMPLEMENTED, RESERVED FOR FUTURE USE

PT2 IP.5 DEFINE THE TIMER 2 INTERRUPT PRIORITY LELVELPS IP.4 DEFINES THE SERIAL PORT INTERRUPT PRIORITY LEVELPT1 IP.3 DEFINES THE TIMER 1 INTERRUPT PRIORITY LEVELPX1 IP.2 DEFINES EXTERNAL INTERRUPT 1 PRIORITY LEVEL

PT0 IP.1 DEFINES THE TIMER 0 INTERRUPT PRIORITY LEVELPX0 IP.0 DEFINES THE EXTERNAL INTERRUPT 0 PRIORITY LEVEL

SCON: SERIAL PORT CONTROL REGISTER, BIT ADDRESSABLESCON

SM0 : SCON.7 Serial Port mode specifiedSM1 : SCON.6 Serial Port mode specifierSM2 : SCON.5 REN : SCON.4 Set/cleared by the software to Enable/disable receptionTB8 : SCON.3 the 9th bit that will be transmitted in modes 2 and 3, Set/cleared

By softwareRB8 : SCON.2 In modes 2 &3, is the 9th data bit that was received. In mode 1,

If SM2 = 0, RB8 is the stop bit that was received. In mode 0 RB8 is not used

T1 : SCON.1 Transmit interrupt flag. Set by hardware at the end of the 8th bit Time in mode 0, or at the beginning of the stop bit in the other Modes. Must be cleared by software

R1 SCON.0 Receive interrupt flag. Set by hardware at the end of the 8th bit Time in mode 0, or halfway through the stop bit time in the other Modes. Must be cleared by the software.

TCON TIMER COUNTER CONTROL REGISTERThis is a bit addressableTF1 TCON.7 Timer 1 overflows flag. Set by hardware when the Timer/Counter

1 Overflows. Cleared by hardware as processor

TR1 TCON.6 Timer 1 run control bit. Set/cleared by software to turn Timer Counter 1 On/off

TF0 TCON.5 Timer 0 overflows flag. Set by hardware when the timer/counter 0 Overflows. Cleared by hardware as processor

TR0 TCON.4 Timer 0 run control bit. Set/cleared by software to turn timer

Counter 0 on/off.IE1 TCON.3 External interrupt 1 edge flagITI TCON.2 Interrupt 1 type control bitIE0 TCON.1 External interrupt 0 edgeIT0 TCON.0 Interrupt 0 type control bit.

MCS-51 FAMILY INSTRUCTION SET

Notes on Data Addressing ModesRn - Working register R0-R7Direct - 128 internal RAM locations, any l/O port, control or status register@Ri - Indirect internal or external RAM location addressed by register R0 or R1#data - 8-bit constant included in instruction#data 16 - 16-bit constant included as bytes 2 and 3 of instructionBit - 128 software flags, any bit addressable l/O pin, control or status bitA - Accumulator

Notes on Program Addressing Modesaddr16 - Destination address for LCALL and LJMP may be anywhere within the 64-Kbyte program memory address space. addr11 - Destination address for ACALL and AJMP will be within the same 2-Kbyte page of program memory as the first byte of the following instruction. Rel - SJMP and all conditional jumps include an 8 bit offset byte. Range is + 127/– 128 bytes relative to the first byte of the following instruction.

ACALL addr11Function: Absolute callDescription: ACALL unconditionally calls a subroutine located at the indicated address. The instruction increments the PC twice to obtain the address of the following instruction, then pushes the 16-bit result onto the stack (low-order byte first) and increments the stack pointer twice. The destination address is obtained by successively concatenating the five high-order bits of the incremented PC, op code

bits 7-5, and the second byte of the instruction. The subroutine called must therefore start within the same 2K block of program memory as the first byte of the instruction following ACALL. No flags are affected. Example: Initially SP equals 07H. The label”SUBRTN” is at program memory location 0345H. After executing the instruction ACALL SUBRTN at location 0123H, SP will contain 09H, internal RAM location 08H and 09H will contain 25H and 01H, respectively, and the PC will contain 0345H.

Operation: ACALL(PC) ¬ (PC) + 2(SP) ¬ (SP) + 1((SP)) ¬ (PC7-0)(SP) ¬ (SP) + 1((SP)) ¬ (PC15-8)(PC10-0) ¬ Page addressBytes: 2Cycles: 2Encoding: a10 a9 a8 1 0 0 0 1 a7 a6 a5 a4 a3 a2 a1 a0

ADD A, <src-byte>Function: AddDescription: ADD adds the byte variable indicated to the accumulator, leaving the result in the accumulator. The carry and auxiliary carry flags are set, respectively, if there is aCarry out of bit 7 or bit 3, and cleared otherwise. When adding unsigned integers, the carry flag indicates an overflow occurred. OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry out of bit 7 but not out of bit 6; otherwise OV is cleared. When adding signed integers, OV indicates a negative number produced as the sum of two positive operands, or a positive sum from two negative operands. Four source operand addressing modes are allowed: register, direct, register indirect, or immediate.

Example: The accumulator holds 0C3H (11000011B) and register 0 holds 0AAH (10101010B). The instruction ADD A, R0 will leave 6DH (01101101B) in the accumulator with the AC flag cleared and both the carry flag and OV set to 1.

ADD A,RnOperation: ADD(A) ¬ (A) + (Rn)Bytes: 1Cycles: 1

ADD A, directOperation: ADD(A) ¬ (A) + (direct)Bytes: 2Cycles: 1Encoding: 0 0 1 0 1 r r rEncoding: 0 0 1 0 0 1 0 1 direct address ADD A, @RiOperation: ADD(A) ¬ (A) + ((Ri))Bytes: 1Cycles: 1

ADD A, #dataOperation: ADD(A) ¬ (A) + #dataBytes: 2Cycles: 1Encoding: 0 0 1 0 0 1 1 iEncoding: 0 0 1 0 0 1 0 0 immediate data

ADDC A, < src-byte>

Function: Add with carryDescription: ADDC simultaneously adds the byte variable indicated, the carry flag and the accumulator contents, leaving the result in the accumulator. The carry and auxiliaryCarry flags are set, respectively, if there is a carry out of bit 7 or bit 3, and cleared otherwise. When adding unsigned integers, the carry flag indicates an overflow occurred.OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry out of bit 7 but not out of bit 6; otherwise OV is cleared. When adding signed integers, OV indicates a negative number produced as the sum of two positive operands or a positive sum from two negative operands. Four source operand addressing modes are allowed: register, direct, register indirect, or immediate.Example: The accumulator holds 0C3H (11000011B) and register 0 holds 0AAH (10101010B) with the carry flag set. The instruction ADDC A, R0 will leave 6EH (01101110B) in the accumulator with AC cleared and both the carry flag and OV set to 1.

ADDC A, RnOperation: ADDC(A) ¬ (A) + (C) + (Rn)Bytes: 1Cycles: 1

ADDC A, directOperation: ADDC(A) ¬ (A) + (C) + (direct)Bytes: 2Cycles: 1Encoding: 0 0 1 1 1 r r rEncoding: 0 0 1 1 0 1 0 1 direct address

ADDC A, @RiOperation: ADDC

(A) ¬ (A) + (C) + ((Ri))Bytes: 1HARDWARE DESCRIPTION

(i)Block Diagram of the System:-

Step DownT/F

Full Wave Bridge

Rectifier

Voltage Regulator

ADC-0804

Signal Conditioner

Current Sensor

16x2 LCD Display

Microcontroller AT89S51

+12VDC/500mA230V

AC

RELAY DRIVER CKT

RELAY

LOAD 230VAC

KEY PADS

+5VDC/500mA

WORKING PRINCIPLE OF THE PROJECT(ii) CIRCUIT DIAGRAM:-

1

1

2

2

3

3

4

4

D D

C C

B B

A A

CS1

RD2

WR 3INTR

5

DB7 11DB6

12DB5

13DB4 14DB3

15DB2

16DB1 17DB0

18

VCC20

VIN+6VIN -

7

AGND 8

VREF/29

DGND10

CLK IN4

CLK R19

ADC0804LCN

U1

AT89S51

P1.01

P1.12

P1.23

P1.34

P1.45

P1.56

P1.67

P1.78

RST9

P3.010

P3.111

P3.212

P3.313

P3.414

P3.515

P3.616

P3.717

XTL118

XTL219

GND20

P2.021

P2.1 22P2.2

23P2.3

24P2.4 25P2.5

26P2.6

27P2.7 28

/PSEN29

ALE30

/EA 31P0.7

32P0.6

33P0.5 34P0.4

35P0.3

36P0.2 37P0.1

38P0.0

39Vcc 40

U2

VSS1

VCC2

VEE3

RS4

R/W5

E6

DB07

DB18

LED-16

LED+15

DB714

DB613

DB512

DB411

DB310

DB29

LCD1

2

4 3

1CT1

1N4148D7

1N4148D8

1N4148D9

1N4148D10

1K

VR2

1N4007D1

1N4007D3

1N4007D5

1N4007D6

1N4007D2

1N4007D4

LM7805

IN1

GND2

OUT3

REG1

1K

R1

10KR5

1KR2

1K

R3

1K

R4

1KR6

C1

R12

R23

R34

R45

R56

R67

R78

R89

10KR9

S8550Q1

12

34

5

Relay

LED1

S8050Q2

Y1

470uF/25VC2

1000uF/35VC1

10uF/16VC9

0.22uF/50VC3

0.1uF/50C5

0.1uF/50C6

0.1uF/50C4

SW2

SW4

SW3

SW1

12

230VAC+5

12

LOAD2

12

LOAD1

12

LOAD3

12

LOAD4

+5

+5

+5

+510KVR1

+5

22pFC8

22pFC7

+5

+5

12

LOAD5

12

1

2.2K

R8

2.2K

R7

+5

LED2

+12

+12

1

2

4

3

230/12VAC/0.5A

TF1

10uF/16V

C9

10KR4

+5

1

V.K. Microsystems204-A, Guru Ramdass BhawanRanjit Nagar Commercial ComplexNewDelhi - 110008INDIA1

He art Beats Monitor

VER-1.00

11/24/2007 11:17:23 AM

Size: Doc. No.:

Date:CONTACTS:

Revision:

Sheet ofTime:

A4

Title:

HBM-VER1.0

+91-11-20900017,25895579, +91-9868031531, [email protected], [email protected]

+12

WORKING OF CIRCUIT:-

POWER SUPPLY:- In the power supply section we use one step down transformer with two diode as a full wave rectifier. Output of the rectifier is further converted into smooth dc with the help of the filter capacitor. Output of the capacitor is further connected to the ic regulator to provide a stable voltage to the microcontroller. Microcontroller requires a regulated 5 volt dc power supply for smooth operation. Here we use ic 7805 as a positive regulator to provide a 5 volt dc power supply.Rectifier and regulator

In this lab you will construct and analyze a full wave rectifier and a shunt voltage regulator. All component types in the example circuit are available in Or CAD – Capture libraries for simulation.

I. Introduction1.1 The Full Wave Rectifier

The first building block in the dc power supply is the full wave rectifier. The purpose of the full wave rectifier (FWR) is to create a rectified ac output from a sinusoidal ac input signal. It does this by using the nonlinear conductivity characteristics of diodes to direct the path of the current.

Consider the current path in the diode bridge rectifier. In the positive half cycle of Vin, diodes D4 and D3 will conduct. During the negative half cycle, diodes D2 and D1 will conduct. As a result, the load will pass current in the same direction in each half cycle of the input.Design Concerns

Reverse current does not exceed the breakdown value Power dissipation limit P = Vd Id is not exceeded

Diode Voltages

Forward Biaso If we consider a simple, piece-wise linear model for the diode IV curve, the

diode forward current is zero until Vbias >= Vthreshold, where Vthreshold is 0.6 V to 0.8 V. The current increases abruptly as Vbias increases further. Due to this turn-on or threshold voltage associated with the diode in forward bias, we should expect a 0.6 to 0.8 V voltage drop across each forward biased diode in the rectifier bridge. In the case of the full wave rectifier diode bridge, there are two forward biased diodes in series with the load in each half cycle of the input signal.

o The maximum output voltage (across load) will be Vin - 2 Vthreshold, or ~ Vin - 1.4 V.

o Since some current does flow for voltage bias below Vthreshold and the current rise around is Vthreshold is more gradual than the piece-wise model, the actual diode performance will differ from the simple model.

Reverse Bias

o In reverse bias (and neglecting reverse voltage breakdown), the current through the diode is approximately the reverse saturation current, Io. The voltage across the load during reverse bias will be Vout = Io Rload.

o In specifying a diode for use in a circuit, you must take care that the limits for forward and reverse voltage and current are not exceeded.

1.2 Filtered Full Wave RectifierThe filtered full wave rectifier is created from the FWR by adding a capacitor

across the output.

Figure 2. Filtered full wave rectifier The result of the addition of a capacitor is a smoothing of the FWR output. The output is now a pulsating dc, with a peak to peak variation called ripple. The magnitude of the ripple depends on the input voltage magnitude and frequency, the filter capacitance, and the load resistance. 1.3 The Shunt Regulator A shunt regulator may be placed between the filtered full wave rectifier and the load resistance (impedance). Its purpose is to minimize the variation in the voltage across the load, as either the input voltage or the output resistance changes.

Figure 4. Filtered FWR and shunt regulator

This regulator is called a shunt because it provides an additional path for current to flow, so that some current can bypass the load. The shunt regulator consists of a zener diode and a resistor. The zener diode has a nearly constant voltage drop when used in reverse bias. The resistor is chosen to maintain the zener in its proper working region, where it can provide regulation and not exceed a maximum power limit.

A simple model for the zener diode is a dc supply (battery) with a value of

Vzo, where Vzo is the effective zener voltage, , Vz is the rated breakdown voltage, and Rz is the effective resistance of the zener, given by the inverse of the slope of the IV curve in the working region.

Figure 5. Filtered FWR and shunt regulator with the zener diode replaced with its circuit model

In the zeners working region, Rz is small (0.1 to 50 ohm ). For voltages less than the knee voltage, Rz is very high, and for purposes of hand calculations can be considered to be an open circuit.

You can show for the circuit above that

where IL is the current through the load. The 1st term in this equation is constant since it depends only on the diode zener voltage and two resistances. The 2nd and 3rd terms depend on the input voltage and load current, both of which may change with time. These terms must be minimized for quality regulation.

Input Sensitivity and Load Sensitivity Assume the input to the shunt regulator is Vdc +/- Vripple. For Vin = Vin(max) = Vdc + Vripple, additional current is available from the source. To keep Vo = IL RL constant, some of that current must be shunted through the zener diode. As long as Iz < Iz(max), as defined by the maximum power dissipation for the zener, the circuit will safely regulate. Choose R to prevent the zener from exceeding its maximum current limit.

For Vin = Vin(min) = Vdc - Vripple, current drops. To keep Vo = IL*RL

constant, the current through the zener diode must be reduced. To maintain regulation, Iz must not be reduced below the knee current. Choose R to maintain sufficient current through the zener:

The shunt regulator has several major problems which prevent its common use as the sole pre-regulation stage in dc power supplies:

o When the load is open circuit, all current is shunted through the zener diode. This requires an expensive, high power device.

o The line and load regulations values are high (~ 10 % or more). o The energy efficiency is low.

For an improved design, the shunt regulator is used in conjunction with a

series pass element with gain, usually a transistor, between the unregulated supply and the load.

II. Project Design2.1 SimulationPart 1:

To simulate the full wave rectifier circuit as shown in Figure 1, the following components should be used:

1. Input AC voltage (Vin): Vin is a 10 Vpeak and 60 Hz sinusoidal wave. Use VSIN with the setting: VOFF = 0, VAML = 10 and FREQ = 60

2. Full wave rectifier (FWR): The full wave rectifier is constructed in the form of bridge rectifier using four diodes (D1N4004).

3. Load resistor: 200 Ω and 500 Ω resistors are used to understand the effect of load resistor on the performance of the DC power supply.

Simulation results required in your lab report:1. Output voltage for Rload = 200 Ω2. Output voltage for Rload = 500 Ω

All the simulations in this project are in transient mode with run time = 35ms. On the simulation results, you should indicate the maximum output voltage (Vmax), the minimum output voltage (Vmin) and the ripple voltage Vr (Vmax – Vmin).

To simulate the filtered full wave rectifier circuit as shown in Figure 2, the filter capacitor is chosen from 100 uF, 470 uF and 1000 uF.

Simulation results required in your lab report:1. Output voltage for Rload = 200 Ω and C1 = 100 uF2. Output voltage for Rload = 200 Ω and C1 = 470 uF3. Output voltage for Rload = 200 Ω and C1 = 1000 uF4. Output voltage for Rload = 500 Ω and C1 = 100 uF5. Output voltage for Rload = 500 Ω and C1 = 470 uF6. Output voltage for Rload = 500 Ω and C1 = 1000 uF

Part 2:To design and simulate a filtered full wave rectifier with a shunt regulator, the

following design steps should be followed:

1. To design a shunt regulator, first pick up a 3.3 volts zener diode (a particle diode, part number 1N5226) and plug it into the curve tracer. Caution: zener diode should be reverse biased. The cathode of the zener diode (the end with a black ring) should be connected to the “A” of the diode test port. Menu Settings: type – diode; Vd – 5 volts; Id – 20 mA; Rload – .25 ohm; Pmax – 2 Watt). Choose any two points in the linear region and use CURSOR function

to display Id and Vd of the two points. Print out from the screen and it should look like that in Figure 6 except in the first quadrant.

2. Calculate the effective zener resistance Rz and effective zener voltage Vzo

from the equation or Rz = (Vz2 – Vz1)/(Iz2 – Iz1) and Vzo = Vz1 – Iz1*Rz.

3. Calculate the value of the series resistor R (R5 in Figure 4) for the shunt

regulator with the equation

Vin(min) is the minimum input voltage, Vin(min) = Vp – 2*0.7 – Vr, Vp is the peak input voltage or 10 volts in this lab, 0.7 volt is the voltage drop across one diode, Vr can be used as 2 volts for an estimation

Vzo and Rz are obtained in step 2 Iz(min) is the minimum current needed for the zener diode to operate

properly, for example, 5 mA is a good rating IL(max) is the maximum load current and determined by Vo/Rmin. The

output voltage of the shunt regulator is about the zener voltage used, Rmin is the minimum load resistance. In this lab, Vo ~ 3.3 volts and Rmin = 200 Ω

4. Get a practical resistor with a value close but smaller than the resistance R calculated above. Use this value for R in all the following calculation and simulation.

5. Calculate the capacitance required for the filter using C = Vp/(2*f*Vr*R).6. Create a FWR and shunt regulator circuit in OrCAD-Capture as shown in

Figure 4. R5 and C1 in Figure 4 should use the value of R and C obtained in step 4 and step 5, respectively. Dz1 is the 3.3 volts zener diode (D1N5226).

7. Simulate the circuit with Rload = 200 Ω. Obtain a capture of the output voltage.

8. Simulate the circuit with Rload = 500 Ω. Obtain a capture of the output voltage.

MeasurementsPart 1:

1. Build the hardware circuit of a full wave rectifier as shown in Figure 1. The input voltage Vin is a 10 volts peak, 60 Hz sinusoidal wave. Vin is stepped down from line voltage (60 Hz and 110 Vrms) using a 15:1 turns-ratio transformer. Use 1N4004 diodes to construct your bridge rectifier. Observe the output voltage across the load resistor on the scope for Rload = 200 Ω. Capture the output into a Word file. Repeat for Rload = 500 Ω and obtain a capture.

2. Add a capacitor C = 100 uF to form a filtered full wave rectifier. Be careful of the polarity of the capacitor when you connect the circuit. “Positive” of the capacitor goes to “positive” of the DC output of the bridge rectifier. Capture the output voltages for both Rload = 200 Ω and Rload = 500 Ω.

3. Repeat step 2 for C = 470 uF and C = 1000 uF and capture the output voltages for both Rload = 200 Ω and Rload = 500 Ω.

All the measurements on the scope in this project should have Vp-p, Vavg and frequency displayed.

Part 2:1. Modify your circuit as Figure 4. R5 and C1 should be the values obtained in

the simulation part. The zener diode is 1N5226 and Rload = 200 Ω. Capture the output voltage.

2. Repeat step 1 for Rload = 500 Ω and capture the output voltages.

Current Sensor/Transformer:-

Current transformers can perform circuit control, measure current for power measurement and control, and perform roles for safety protection and current limiting. They can also cause circuit events to occur when the monitored current reaches a specified level. Current monitoring is necessary at frequencies from the 50 Hz/60 Hz power line to the higher frequencies of switchmode transformers that range into the hundreds of kilohertz.

The object with current transformers is to think in terms of current transformation rather than voltage ratios. Current ratios are the inverse of voltage ratios. The thing

to remember about transformers is that Pout = (Pin — transformer power losses). With this in mind, let's assume we had an ideal loss-less transformer in which Pout = Pin. Since power is voltage times current, this product must be the same on the output as it is on the input. This implies that a 1:10 step-up transformer with the voltage stepped up by a factor of 10 results in an output current reduced by a factor of 10. This is what happens on a current transformer. If a transformer had a one-turn primary and a ten-turn secondary, each amp in the primary results in 0.1A in the secondary, or a 10:1 current ratio. It's exactly the inverse of the voltage ratio — preserving volt times current product.

A burden resistor connected across the secondary produces an output voltage proportional to the resistor value, based on the amount of current flowing through it. With our 1:10 turns ratio transformer that produces a 10:1 current ratio, a burden resistor can be selected to produce the voltage we want. If 1A on the primary produces 0.1A on the secondary, then by Ohm's law, 0.1 times the burden resistor will result in an output voltage per amp.

With this knowledge, the user can choose the burden resistor to produce their desired output voltage. The output current of 0.1A for a 1A primary on the 1:10 turns ratio transformer will produce 0.1 V/A across a 1Ω burden resistor, 1V per amp across a 10Ω burden

and 10V per amp across a 100Ω burden resistor.

Fig. 1 shows an ideal transformation ratio. In this analysis, the secondary dc resistance (RDCR) doesn't become part of the calculation. When considering the secondary current, only the actual current affects V. How well that current can be determined controls the accuracy of the prediction of V. The secondary dc resistance is best analyzed by reflecting it to the primary by RDCR/N2.

There are factors in the current transformer that affect efficiency. For complete accuracy, the output current must be the input current divided by the turns ratio. Unfortunately, not all the current is transferred. Some of the current isn't transformed to the secondary, but is instead shunted by the inductance of the transformer and the core loss resistance. Generally, it's the inductance of the transformer that contributes the majority of the current shunting that detracts from the output current. This is why it's important to use a high-permeability core to achieve the maximum inductance and minimize the inductance current. Accurate turns ratio must be maintained to produce the expected secondary current and the expected accuracy. Fig. 2 shows the current transformed is smaller than the input current by:

What about the effect the transformer will have on the current it's monitoring? This is where the term burden enters the picture. Any measuring device alters the circuit in which it measures. For instance, connecting a voltmeter to a circuit causes the voltage to change from what it was before the meter was attached. However minuscule this effect may or may not be, the voltage you read isn't the voltage that existed before attaching the meter. This is also true with a current transformer. The burden resistor on the secondary is reflected to the primary by (1/N2), which provides a

resistance in series with the current on the primary. This usually has minimal effect and is usually only important when you are concerned about the current that would exist when the transformer isn't in the circuit, such as when it's used as a temporary measuring device.

Notice the four loss components in the circuit of Fig. 2. The resistance of the primary loop (PRIDCR), the core loss resistance (RCORE), the secondary DCR (RDCR) is reduced by 1/N2, and the secondary burden resistor RBURDEN is also reduced by a factor of N2. These are losses that affect current source (I). The resistances have an indirect effect on the current transformer accuracy. It's their effect on the circuit that

they are monitoring that alters its current. The primary dc resistance (PRIdcr) and the secondary DCR/N2 (RDCR/N2) don't detract from the Iinput that is read or is affecting the accuracy of the actual current reading. Rather, they alter the current from what it would be if the current transformer weren't in the circuit. With the exception of the burden resistor, these loss resistors are the components that contribute to the loss in the transformer and heating.

This wasted energy is usually small compared with the power in the circuit it's monitoring. Usually, the design of the transformer and choice of the burden resistor will be within the maximum energy loss the end user can allow. As battery-operated devices come into wider use and power consumption contributes to the energy crisis — even this power may be of concern. Under these circumstances, it may require special design attention to power consumption.

Current transformers are an efficient way to measure current. Since the burden resistor is reflected to the primary by 1/N2, the resistance seen in the circuit being monitored can be very small. This allows a larger voltage to be created on the output with minimal effect on the circuit being measured. A simpler and lower-cost method to measure current is to use a sense resistor connected in series with the current. However, this method can only be used when power consumption is of secondary concern. With the more frequent use of battery-powered devices and the prevailing need to reduce power consumption, the extra expense of a current transformer can soon be recovered with use. Also, with high current or when a voltage of any magnitude is required, a sense resistor would be impractical.

LCD SECTION DETAILS:-LCD DETAIL .

Frequently, an 8051 program must interact with the outside world using input and output devices that communicate directly with a human being. One of the most common devices attached to an 8051 is an LCD display. Some of the most common LCDs connected to the 8051 are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively.

Fortunately, a very popular standard exists which allows us to communicate with the vast majority of LCDs regardless of their manufacturer. The standard is referred to as HD44780U, which refers to the controller chip which receives data from an external source (in this case, the 8051) and communicates directly with the LCD.

44780 BACKGROUND

The 44780 standard requires 3 control lines as well as either 4 or 8 I/O lines for the data bus. The user may select whether the LCD is to operate with a 4-bit data bus or an 8-bit data bus. If a 4-bit data bus is used, the LCD will require a total of 7 data lines (3 control lines plus the 4 lines for the data bus). If an 8-bit data bus is used, the LCD will require a total of 11 data lines (3 control lines plus the 8 lines for the data bus).

The EN line is called "Enable." This control line is used to tell the LCD that you are sending it data. To send data to the LCD, your program should first set this line high (1) and then set the other two control lines and/or put data on the data bus. When the other lines are completely ready, bring EN low (0) again. The 1-0 transition tells the 44780 to take the data currently found on the other control lines and on the data bus and to treat it as a command.

The RS line is the "Register Select" line. When RS is low (0), the data is to be treated as a command or special instruction (such as clear screen, position cursor, etc.). When RS is high (1), the data being sent is text data which should be displayed on the screen. For example, to display the letter "T" on the screen you would set RS high.

The RW line is the "Read/Write" control line. When RW is low (0), the information on the data bus is being written to the LCD. When RW is high (1), the program is effectively querying (or reading) the LCD. Only one instruction ("Get LCD status") is a read command. All others are write commands--so RW will almost always be low.

Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation selected by the user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1, DB2, DB3, DB4, DB5, DB6, and DB7.

AN EXAMPLE HARDWARE CONFIGURATION

As we've mentioned, the LCD requires either 8 or 11 I/O lines to communicate with. For the sake of this tutorial, we are going to use an 8-bit data bus--so we'll be using 11 of the 8051's I/O pins to interface with the LCD.

Let's draw a sample psuedo-schematic of how the LCD will be connected to the 8051.

As you can see, we've established a 1-to-1 relation between a pin on the 8051 and a line on the 44780 LCD. Thus as we write our assembly program to access the LCD, we are going to equate constants to the 8051 ports so that we can refer to the lines by their 44780 name as opposed to P0.1, P0.2, etc. Let's go ahead and write our initial equates:

DB0 EQU P1.0DB1 EQU P1.1DB2 EQU P1.2DB3 EQU P1.3DB4 EQU P1.4

DB5 EQU P1.5DB6 EQU P1.6DB7 EQU P1.7EN EQU P3.7RS EQU P3.6RW EQU P3.5DATA EQU P1

Having established the above equates, we may now refer to our I/O lines by their 44780 name. For example, to set the RW line high (1), we can execute the following insutrction:

SETB RW

HANDLING THE EN CONTROL LINE

As we mentioned above, the EN line is used to tell the LCD that you are ready for it to execute an instruction that you've prepared on the data bus and on the other control lines. Note that the EN line must be raised/lowered before/after each instruction sent to the LCD regardless of whether that instruction is read or write, text or instruction. In short, you must always manipulate EN when communicating with the LCD. EN is the LCD's way of knowing that you are talking to it. If you don't raise/lower EN, the LCD doesn't know you're talking to it on the other lines.

Thus, before we interact in any way with the LCD we will always bring the EN line high with the following instruction:

SETB ENAnd once we've finished setting up our instruction with the other control lines and data bus lines, we'll always bring this line back low:

CLR ENProgramming Tip: The LCD interprets and executes our command at the instant the EN line is brought low. If you never bring EN low, your instruction will never be executed.

CHECKING THE BUSY STATUS OF THE LCD

As previously mentioned, it takes a certain amount of time for each instruction to be executed by the LCD. The delay varies depending on the frequency of the crystal attached to the oscillator input of the 44780 as well as the instruction which is being executed.

While it is possible to write code that waits for a specific amount of time to allow the LCD to execute instructions, this method of "waiting" is not very flexible. If the crystal frequency is changed, the software will need to be modified. Additionally, if the LCD itself is changed for another LCD which, although 44780 compatible, requires more time to perform its operations, the program will not work until it is properly modified.

The "Get LCD Status" command will return to us two tidbits of information; the information that is useful to us right now is found in DB7. In summary, when we issue the "Get LCD Status" command the LCD will immediately raise DB7 if it's still busy executing a command or lower DB7 to indicate that the LCD is no longer occupied. Thus our program can query the LCD until DB7 goes low, indicating the LCD is no longer busy. At that point we are free to continue and send the next command.

Since we will use this code every time we send an instruction to the LCD, it is useful to make it a subroutine. Let's write the code:

Thus, our standard practice will be to send an instruction to the LCD and then call our WAIT_LCD routine to wait until the instruction is completely executed by the LCD. This will assure that our program gives the LCD the time it needs to execute instructions and also makes our program compatible with any LCD, regardless of how fast or slow it is.

Programming Tip: The above routine does the job of waiting for the LCD, but were it to be used in a real application a very definite improvement would need to be made: as written, if the LCD never becomes "not busy" the program will effectively "hang," waiting for DB7 to go low.

PIN WISE DETAIL OF LCD

1. Vss GROUND

2. Vcc +5VOLT SUPPLY

3 Vee POWER SUPPLY TO CONTROL CONTRAST

4. RS RS = 0 TO SELECT COMMAND REGISTER RS = 1 TO SELECT DATA REGISTER

5. R/W R/W = 0 FOR WRITER/W = 1 FOR READ

6 E ENABLE

7 DB0

8 DB1

9. DB2

10. DB3

11. DB4

12. DB5

13. DB6

14. DB7

LCD COMMAND CODES.

1. CLEAR DISPLAY SCREEN2. RETURN HOME4 DECREMENT CURSOR ( SHIFT CURSOR TO LEFT)5 SHIFT DISPLAY RIGHT.6. INCREMENT CURSOR ( SHIFT CURSOR TO RIGHT)7. SHIFT DISPLAY LEFT8. DISPLAY OFF, CURSOR OFF

A DISPLAY OFF CURSOR ONC DISPLAY ON CURSOR OFFE DISPLAY ON CURSOR BLINKINGF. DISPLAY ON CURSOR BLINKING.

10. SHIFT CURSOR POSITION TO LEFT14. SHIFT CURSOR POSITION TO RIGHT18. SHIFT THE ENTIRE DISPLAY TO THE LEFT1C SHIFT THE ENTIRE DISPLAY TO THE RIGHT80 FORCE CURSOR TO BEGINNING OF IST LINE C0 FORCE CURSOR TO BEGINNING OF 2ND LINE38 2 LINES AND 5 X 7 MATRIX

FLOW CHART:-

Start

Initialize the I/O Ports, LCD, Variables, ADC

and Interruption

Measure the Value of Current

Is MV <

SV?

IsMV > SV

?

Perform the Action of Pressed Key

No

Yes

No

Display Set Value & Measured Value of Current

on LCD

Switch On Load Supply

Is Any Key ?

Switch OFF Load Supply

Yes

Yes

No

SOFTWARE:-#include<8051.inc>#include<lcd.inc>#include<adc.inc>

org RESET_VECTORljmp mainorg EXT0_ISR_VECTOR ljmp extint0

main:mov p0,#255mov p1,#255mov p2,#255mov p3,#255lcall initlcdlcall initadc0804clr p2.4setb ie.0setb tcon.0setb ie.7mov setamp,#0mov setamp+1,#100mov newdata,#0jmp l28

u21342:bc l32mov r5,imov a,r5add a,r5mov r5,amov a,#databuffer

add a,r5mov r0,amov 4,@r0inc r0mov 5,@r0mov a,mesamp+1add a,r5mov mesamp+1,amov a,mesampaddc a,r4mov mesamp,ainc i

l34:mov a,#8cbne a,i,u21342

l32:mov r1,#3mov r4,mesampmov r5,mesamp+1

u21464:mov a,r4clr crrc amov r4,amov a,r5rrc amov r5,adbnz r1,u21464mov mesamp,r4mov mesamp+1,r5clr acbne a,mesamp,u21562mov a,#16

cbne a,mesamp+1,u21562u21560:

mov a,mesamp+1add a,#16mov mesamp+1,amov a,mesampaddc a,#0mov mesamp,a

l35:mov a,setampcbne a,mesamp,u21772mov a,setamp+1cbne a,mesamp+1,u21772

l36:mov a,mesampcbne a,setamp,u22042mov a,mesamp+1cbne a,setamp+1,u22042jmp l37

u21562:bnc l35jmp u21560

u21772:bc l36clr p2.4jmp l37

u22042:bc l37setb p2.4

l40:bb p2.2,l40

l37:lcall displaydata

mov newdata,#0l30:

bb p2.0,l42mov a,setamporl a,setamp+1bz l42mov a,setamp+1add a,#255mov setamp+1,amov a,setampaddc a,#255mov setamp,a

l45:bnb p2.0,l45

l42:bb p2.1,l28clr acbne a,setamp,u23562mov a,#255cbne a,setamp+1,u23562jmp l28

u23562:bc l28inc setamp+1mov a,setamp+1bnz l49inc setamp

l49:bnb p2.1,l49

l28:mov r5,newdatacbne r5,#1,l30mov r4,databuffer+2

mov r5,databuffer+3mov databuffer,r4mov databuffer+1,r5mov r4,databuffer+4mov r5,databuffer+5mov databuffer+2,r4mov databuffer+3,r5mov r4,databuffer+6mov r5,databuffer+7mov databuffer+4,r4mov databuffer+5,r5mov r4,databuffer+8mov r5,databuffer+9mov databuffer+6,r4mov databuffer+7,r5mov r4,databuffer+10mov r5,databuffer+11mov databuffer+8,r4mov databuffer+9,r5mov r4,databuffer+12mov r5,databuffer+13mov databuffer+10,r4mov databuffer+11,r5mov r4,databuffer+14mov r5,databuffer+15mov databuffer+12,r4mov databuffer+13,r5mov r5,adcdatamov r4,#0mov databuffer+14,r4mov databuffer+15,r5clr amov mesamp,a

mov mesamp+1,amov i,#0jmp l34

displaydata:mov r5,#128lcall wrlcdcmdmov mi,#0

l55:mov a,mimov dptr,#msgsamovc a,@a+dptrmov r5,alcall wrlcddatainc mimov a,mimov dptr,#msgsamovc a,@a+dptrmov r5,acbne r5,#36,l55mov r4,#0mov r5,#100mov r2,setampmov r3,setamp+1lcall lwdivmov r4,#0mov r5,#10lcall lwmodmov temp,r3mov a,tempadd a,#48mov r5,alcall wrlcddatamov temp,#46

mov r5,templcall wrlcddatamov r4,#0mov r5,#10mov r2,setampmov r3,setamp+1lcall lwdivmov r4,#0mov r5,#10lcall lwmodmov temp,r3mov a,tempadd a,#48mov r5,alcall wrlcddatamov r4,#0mov r5,#10mov r2,setampmov r3,setamp+1lcall lwmodmov temp,r3mov a,tempadd a,#48mov r5,alcall wrlcddatamov r5,#192lcall wrlcdcmdmov mi,#0

l58:mov a,mimov dptr,#msgmamovc a,@a+dptrmov r5,a

lcall wrlcddatainc mimov a,mimov dptr,#msgmamovc a,@a+dptrmov r5,acbne r5,#36,l58mov r4,#0mov r5,#100mov r2,mesampmov r3,mesamp+1lcall lwdivmov r4,#0mov r5,#10lcall lwmodmov temp,r3mov a,tempadd a,#48mov r5,alcall wrlcddatamov temp,#46mov r5,templcall wrlcddatamov r4,#0mov r5,#10mov r2,mesampmov r3,mesamp+1lcall lwdivmov r4,#0mov r5,#10lcall lwmodmov temp,r3mov a,temp

add a,#48mov r5,alcall wrlcddatamov r4,#0mov r5,#10mov r2,mesampmov r3,mesamp+1lcall lwmodmov temp,r3mov a,tempadd a,#48mov r5,alcall wrlcddataret

extint0:push pswpush accclr ie.0mov a,p1mov adcdata,apop accpop pswreti

seg cdatasetamp:

ds 2mesamp:

ds 2temp:

ds 1adcdata:

ds 1

databuffer:ds 16

i:ds 1

mi:ds 1

newdata:ds 1

msgsa:db "SET AMP. = $"

msgma:db "MES AMP. = $"end

Bill of Material:-

Designator Description Comment Value1 230VAC C1 Electro Cap (Radial) 1000uF/35VC2 Electro Cap (Radial) 470uF/25VC3 Ceramic Capacitor 0.22uF/50VC4 Ceramic Cap 0.1uF/50C5 Ceramic Cap 0.1uF/50C6 Ceramic Cap 0.1uF/50C7 Ceramic Cap 22pFC8 Ceramic Cap 22pFC9 Electro Cap (Radial) 10uF/16V

CT1

Transformer (Equivalent Circuit Model)

D1General Purpose Diode 1N4007

D2 General Purpose 1N4007

Diode

D3General Purpose Diode 1N4007

D4General Purpose Diode 1N4007

D5General Purpose Diode 1N4007

D6General Purpose Diode 1N4007

D7 Switching Diode 1N4148 D8 Switching Diode 1N4148 D9 Switching Diode 1N4148 D10 Switching Diode 1N4148 K1 SPDT Relay Relay LCD1 LCD_162A LED1 Typical GaAs LED LED2 Typical GaAs LED LOAD1 LOAD2 LOAD3 LOAD4 LOAD5

Q1

PNP General Purpose Amplifier 25V/1.5A S8550

Q2

NPN General Purpose Amplifier 25V/1.5A S8050

R1 Resistor 1KR2 Resistor 1KR3 Resistor 1KR4 Resistor 1K

R5 Resistor 10KR6 Resistor 1KR7 Resistor 2.2KR8 Resistor 2.2KR9 10KREG1 Voltage Regulator LM7805 SW1 Switch SW2 Switch SW3 Switch SW4 Switch

TF1Common Mode Choke 230/12VAC/0.5A

U18-Bit µP-Compatible A/D Converter ADC0804LCN

U2 AT89S51VR1 Potentiometer 10KVR2 Potentiometer 1KY1 Crystal Oscillator