148774941 LPC2148 ARM7 Microcontroller

www.unistring.com

www.stringtechnologies.net

LPC2148 ARM7 Microcontroller www.unistring.com

www.stringtechnologies.net

Features 32-bit ARM7TDMI-S microcontroller

40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory

In-System Programming/In-Application Programming (ISP/IAP)

8 kB of on-chip RAM accessible to USB by DMA

Two 10-bit ADCs provide a total of 14 analog inputs

10-bit DAC provides variable analog output

Two 32-bit timers/external event counters (with four capture and four compare channels each)

PWM unit (six outputs)

watchdog timer

Real-Time Clock (RTC) with independent power

Multiple serial interfaces including

-- two UARTs,

-- Two Fast I2C-bus (400 kbit/s),

-- SPI and SSP with buffering and variable data length capabilities

Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses

45 general purpose I/O pins

21 external interrupt pins available

On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz

Block

Diagram

On chip Flash Program Memory 512 kB Flash memory system

This memory may be used for both code and data storage.

Programming of the flash memory may be accomplished in several

ways(ISP/IAP).

On chip Static RAM On-chip static RAM may be used for code and/or data storage.

The SRAM may be accessed as 8-bit, 16-bit, and 32-bit.

An 8 kB SRAM block intended to be utilized mainly by the USB

Interrupt Controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt

request inputs and categorizes them as Fast Interrupt Request (FIQ),

vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by

programmable settings.

Analog to Digital Converter contain two analog to digital converters.

Total number of available ADC inputs is 14

10 bit successive approximation analog to digital

converter.

Measurement range of 0 V to VREF

Global Start command for both converters.

Digital to Analog Converter The DAC enables to generate a variable analog output.

The maximum DAC output voltage is the VREF voltage.

10-bit DAC.

Buffered output.

Power-down mode available.

USB 2.0 Device Controller The USB is a 4-wire serial bus that supports communication

between a host and a number (127 max) of peripherals

Enables 12 Mbit/s data exchange with a USB host controller

A DMA controller (available only in LPC2146/48) can transfer

data between an endpoint buffer and the USB RAM.

UARTs

contain two UARTs.

In addition to standard transmit and receive data lines, the

LPC2148 UART1 also provides a full modem control handshake

interface.

16 byte Receive and Transmit FIFOs.

Built-in fractional baud rate generator covering wide range of

baud rates without a need for external crystals of particular values.

I2C Interface Is a bidirectional

Is a multi-master bus, it can be controlled by more than one bus master connected to it.

It supports bit rates up to 400 kbit/s

Bidirectional data transfer between masters and

slaves. Serial clock synchronization allows devices with

different bit rates to communicate via one serial bus.

Serial clock synchronization can be used as a

handshake mechanism to suspend and resume serial

transfer.

SPI serial I/O control

Is a full duplex serial interface, designed to handle

multiple masters and slaves connected to a given bus.

Synchronous, Serial, Full Duplex Communication.

SSP serial I/O control

Supports full duplex transfers

Data frames of 4 bits to 16 bits of data flowing from the master to the slave and from the slave to the master.

Synchronous serial communication.

Master or slave operation.

8-frame FIFOs for both transmit and receive.

Four bits to 16 bits per frame

Timers A 32-bit timer/counter with a programmable 32-bit prescaler

External event counter

Four 32-bit capture channels per timer/counter that can take a

snapshot of the timer value when an input signal transitions.

A capture event may also optionally generate an interrupt.

Four 32-bit match registers that allow:

Continuous operation with optional interrupt generation on match. Stop timer on match with optional interrupt generation. Reset timer on match with optional interrupt generation.

Four external outputs per timer/counter corresponding to match

registers, with the following capabilities:

Set LOW on match. Set HIGH on match. Toggle on match. Do nothing on match.

Watchdog Timer Internally resets chip if not periodically reloaded.

Debug mode.

Enabled by software but requires a hardware reset or a watchdog

reset/interrupt to be disabled.

Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.

Flag to indicate watchdog reset.

Programmable 32-bit timer with internal pre-scaler.

Real Time Clock Measures the passage of time to maintain a calendar and clock.

Battery powered systems.

Provides Seconds, Minutes, Hours, Day of Month, Month, Year, Day of

Week, and Day of Year.

Crystal Oscillator On-chip integrated oscillator operates with external crystal in range of 1

MHz to 25 MHz

Pin

Diagram

PIN CONNECT BLOCK

All the I/O pins are connected to a number of internal functions via a multiplexer.

On reset all I/O are configured as GPIO.

Secondary functions are selected via PINSEL register.

GPIO

TXD

PWM1

Reserved

P0.0

PLL

10 to 25 MHz input clock frequency

Output frequency from 10 MHz up to the maximum CPU rate (currently 60MHz)

Programmable frequency multiplication

PLL bypassed on reset

PLL lock indicator can be used as an interrupt to connect the PLL once it is locked

PLL programming requires a special feed sequence (similar to the watchdog) for safety

PHASE LOCK LOOP (PLL)

Provides frequency for ARM7 CPU and on chip peripherals

Frequency divider/multiplier

PLL

VPB divider

Fosc 10MHz-25MHz

CCLK

PCLK 2.5MHz 60MHz

Pin 12

Pin 11

10-25 MHz

OSCILLATOR PLL 10 60 MHz

PLLC PLLE

Co

nn

ect

En

ab

le

PLLCON

FEED SEQUENCE

En

ab

le

Co

nn

ect

Multiplier/Divider Values PLLCFG

(CCLK)

PLOCK PLLSTAT

PLLFEED

PLL Details

General Purpose I/0

On reset all pins are configured as GPIO input pins.

Controlled using 4 registers

- IODIR

- IOSET

- IOCLR

- IOPIN

Applications include driving LEDs, sensing digital inputs.

IOPIN

SFRs

The current state of the port pins are read from this register

IOSET Writing ones sets pins high, writing zero has no effect

IOCLR Writing ones sets pins low and clears corresponding bits in IOSET

IODIR Port pin direction: 0 = INPUT, 1 = OUTPUT

PINSEL0/1 Selects alternate functions for pins

GPIO Details

GPIO

Pins available for GPIO: 46 on LPC2148/2119/2124/2129 (64-pin package)

76 on LPC2210/2290 (144-pin package but no on-chip Flash)

112 on LPC2292/2294 (144-pin package using on-chip Flash)

Shared with alternate functions of all peripherals

Direction control of individual bits

Separate set and clear registers

Pin value and output register can be read separately

Slew rate controlled outputs (10 ns)

PIN Select Register

The PINSEL register's controls the functions of the pins

Registers:

PINSEL0

PINSEL1

PINSEL2

PINSEL0

PINSEL1

PINSEL2

IODIR

GPIO Port Direction control register.

This register individually controls the

direction of each port pin.

Registers:

GPIO port 0 Direction register

GPIO port 1 Direction register

Fast GPIO port 0 Direction register

Fast GPIO port 1 Direction register

GPIO port 0 Direction register

GPIO port 1 Direction register

"the slow" GPIO

IOPIN (Used while performing digital functions) GPIO Port Pin value register.

The current state of the GPIO configured port pins can

always be read from this register, regardless of pin direction.

This register provides the value of port pins that are

configured to perform only digital functions

Registers

GPIO port 0 Pin value register

GPIO port 1 Pin value register

Fast GPIO port 0 Pin value register

Fast GPIO port 1 Pin value register

IOSET

GPIO Port Output Set register. This register controls the state of output pins. Writing ones produces highs at the corresponding port pins. Writing zero's has no effect.

Registers

GPIO port 0 output Set register

GPIO port 1 output Set register

Fast GPIO port 0 output Set register

Fast GPIO port 1 output Set register

IOCLR

GPIO Port Output Clear register.

This register controls the state of output pins.

Writing ones produces lows at the corresponding port pins

and clears the corresponding bits in the IOSET register.

Writing zero's has no effect.

Registers

GPIO port 0 output Clear register 0

GPIO port 1 output Clear register 1

Fast GPIO port 0 output Clear register 0

Fast GPIO port 1 output Clear register 1

: NOTES : IOPIN-->To read the current state of the GPIO

pin

IODIR-->Individually control the state of each pin (writing 0 makes particular pin acts as input, writing 1 makes particular pin as output)

IOSET-->To control the state of the output pins (writing 1 to particular pin makes it as output port high,

writing 0 has no effect)

IOCLR-->To control the state of the output pins (writing 1 to particular pin makes it as low,writing 0

has no effect)

NOTE: this is register used to clear the pins that are set using IOSET

Fast GPIO port 0 Direction register

Fast GPIO port 1 Direction register

"the fast" GPIO

Serial Communication Interfaces

UART0 / 1

I2C Interface

SPI Interface

10100101

10110110

01111000

1010010110110110

UART0 / UART1

Maximum possible speed of the UART

3.75 Mbits/sec

TxD0

RxD0

UART 0

Interface

CTS

RTS

UART 1

Interface

DTR

DCD

DTR

RI

TxD1

Modem Interface

signals

RxD1

UART0 / UART1

Register locations conform to 550 industry standard UART

Built-in Baud Rate Generator 16-bit baud rate generator clock divisor made from 2 8-bit divisor

registers: DLM (MSB), DLL (LSB)

Required baud rate: pclk/(16 * Divisor)

Error Detection Parity, Framing and Overrun Errors detected

Break Interrupt detection

UART0 / UART1 (cont.)

16 byte Receive and Transmit FIFOs Receive FIFO trigger points at 1, 4, 8, and 14 bytes

Break signal can be transmitted

Word Length Select: 5, 6, 7 or 8-bit characters

Stop Bit Select: 1 or 2 stop bits

Parity Select: Odd or Even parity

Standard modem interface signals included (UART1)

VPB Bus Interface

(Receiver Block)

(Transmitter Block)

Rx Shift Register

Tx Shift Register

Rx Buffer Register

Serial

Input

Pin

Tx Holding Register

INTERFACE

Interrupt Enable Register

(Baud Rate

Generator Block)

Divisor Latch LSB

Divisor Latch MSB

Interrupt ID Register

0

0

Serial

Output

Pin

Scratch Pad Register

Line Control Register

Line Status Register

FIFO Control Register

UART0 Block

Diagram

VPB Bus Interface

(Receiver Block)

(Transmitter Block)

Rx Shift Register

Tx Shift Register

Rx Buffer Register

Serial

Input

Pin

Tx Holding Register

Modem

Status Register

Modem

Control Register

INTERFACE

INTERFACE

Interrupt Enable Register

(Baud Rate

Generator Block)

UART 1 Modem

Control Pins

Clear To Send

Data Set Ready

Data Terminal Rdy

Data Carrier Detect

Ring Indicator

Ready To Send Divisor Latch LSB

Divisor Latch MSB

Interrupt ID Register

1

1

Serial

Output

Pin

Scratch Pad Register

Line Control Register

Line Status Register

FIFO Control Register

1

1

1

1

1

1

UART1 Block

Diagram

I2C Bus Interface

SDA

SCL

I2C

Interface

Maximum possible speed of the I2C

400Kbits/sec

I2C Bus Interface

Standard Fast-I2C compliant bus interface 7-bit addressing

Easy to configure as Master, Slave, or Master/Slave

Programmable clocks allow versatile rate control

Bi-directional data transfer between masters and slaves

Multi-master bus (no central master)

SCLK1

OUT

SCLK

IN

DATA1

OUT

DATA

IN

SCLK2

OUT

SCLK

IN

DATA2

OUT

DATA

IN

SDA

SCL

DEVICE 2 DEVICE 1

I2C devices are wire ANDed together.

+VDD

Rp Rp Pull-up Resistors

Serial clock line

Serial data line

I2C - Open Drain Configuration

SPI Interface

Compliant with Serial Peripheral Interface (SPI) specification

Combined SPI master and slave function

Maximum data bit rate of 1/8 of the peripheral clock rate

Programmable settings for data transmit/receive operations Clock polarity and clock phase

MSB / LSB first

SPI Register

Interface

SPI Shift

Register

SPI Clock

Generator

& Detector

SPI State Control

MOSI

MISO

SCLK SPI Interrupt

VPB Bus

SS

SPI Block Diagram

SPCR, SPSR

SPI Pin Descriptions

ADC

10 Bit ADC

Measurement range of 0 V to 3 V.

Capable of performing more than 400,000 10-bit samples per second.

Optional conversion on transition on input pin or Timer Match signal.

ADC Software Controlled Mode

Select Single Channel

ADCR (7:0)

7 5 6 4 3 0 1 2

10-bit ADC (11 Clocks/Conv)

ADDR (result)

ADC Inputs

LPC2114/24/19/29/94

LPC213X/2210/12/14

All conversions are 10-bit and take 11 Clocks 4.5 MHz Maximum Allows Conversions to be started by external edge

Building applications

Writing codes in C using LPC2148 register set

Compiling the code

Generating hex file

Powering the ARM through USB and serial cables

Set ARM in programming mode

Download/Burn HEX file onto flash memory

Set ARM in run mode to run the application

Software Development

Using vision Keil IDE

KEIL IDE Also called uVISION

Integrates project management ,editor, compiler and debugger in one seam-less front end.

Includes several compilers

- Keil CA ARM

- GNU GCC

- ARM ADS compiler

Debugging tools

- uVISION simulator

- ULINK interface via JTAG

Starting

Double click on the Keil uVISION4 icon

Creating New project

Selecting target device A Select new device for target will appear. Navigate

and select Philips/LPC2148 and then ok

Right click on target

Check on create HEX file

Select folder for path of the executable file

Give a name for the executable

Create a new file.Right click on the new file window and click on Insert #include to use all the register set

Save the file with .c extension Ex : prog.c Highlight the Source group 1 folder .Open the local menu with a right click and select Add files to Group Source group 1

Add the appropriate source (.c files)

Build/Execute the code by selecting the Project\build target menu .Build icons are also available on the toolbar.

The result which includes any compilation errors or hex file generation can be viewed on the Output window

Output window

To download the hex file into the microcontroller board we use a programmer called Flash magic tool.

Step 1-Communications Set COM Port :COM1 Baud Rate : 9600 Device : LPC2148 Interface :None(ISP) Oscillator Freq(MHz) :12 Step 2-Erase Select the box Erase all Flash + Code Rd Prot Step 3-Hex File Click on browse to load the serial.hex file from the folder serial_driver. Step 4-Options Select the box Verify after programming.

Power up the microcontroller board using USB cable, make serial cable connection between PC and microcontrollers UART0 db9 connector.

To make the board enter programming mode

Hold down SW2 (isp) and SW3 (reset), then release SW3 first and finally SW2.

Step 5-Start

Click the Start button

Step 6 Run

Press SW3(Reset)