University Syllabus PART – A UNIT 1: Diode Circuits: Diode Resistance, Diode equivalent circuits, Transition and diffusion capacitance, Reverse recovery time, Load line analysis, Rectifiers, Clippers and clampers. (Chapter 1.6 to 1.14, 2.1 to 2.9) 6 Hours UNIT 2: Transistor Biasing: Operating point, Fixed bias circuits, Emitter stabilized biased circuits, Voltage divider biased, DC bias with voltage feedback, Miscellaneous bias configurations, Design operations, Transistor switching networks, PNP transistors, Bias stabilization. (Chapter 4.1 to 4.12) 7 Hours UNIT 3: Transistor at Low Frequencies: BJT transistor modeling, Hybrid equivalent model, CE Fixed bias configuration, Voltage divider bias, Emitter follower, CB configuration, Collector feedback configuration, Hybrid equivalent model. (Chapter 5.1 to 5.3, 5.5 to 5.17) 7 Hours UNIT 4: Transistor Frequency Response: General frequency considerations, low frequency response, Miller effect capacitance, High frequency response, multistage frequency effects. (Chapter 9.1 to 9.5, 9.6, 9.8, 9.9) 6 Hours PART – B UNIT 5: (a) General Amplifiers: Cascade connections, Cascode connections, Darlington connections. (Chapter 5.19 to 5.27) 3 Hours (b) Feedback Amplifier: Feedback concept, Feedback connections type, Practical feedback circuits. (Chapter 14.1 to 14.4) 3 Hours UNIT 6: Sub Code 10ES32 IA Marks 25 Hrs/ Week 04 Exam Hours 03 Total Hrs. 52 Exam Marks 100
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146444258 Ece III Analog Electronic Ckts 10es32 Notes
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recovery time, Load line analysis, Rectifiers, Clippers and clampers.
Recommended readings:
TEXT BOOK: 1. ―Electronic Devices and Circuit Theory‖, Robert L. Boylestad and Louis Nashelsky, PHI/Pearson
Eduication. 9TH Edition.
REFERENCE BOOKS: 1. ‗Integrated Electronics‘, Jacob Millman & Christos C. Halkias, Tata - McGraw Hill, 1991 Edition
2. ―Electronic Devices and Circuits‖, David A. Bell, PHI, 4th Edition, 2004
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 6
1.1 DIODE RESITANCE
As the operating point of a diode moves from one region to another, the resistance of the diode will also
change due to the nonlinear shape of the diode characteristic curve.
The type of applied voltage or signal will define the resistance level of interest.
Three different levels will be introduced.
DC or Static Resistance
The application of a dc voltage to a circuit containing a semiconductor diode will result in an
operating point on the characteristic curve that will not change with time.
The resistance of the diode at the operating point is simply the quotient of the corresponding levels of
VD and ID.
The dc resistance levels at the knee and below will be greater than the resistance levels obtained for the
vertical rise section of the characteristics.
The resistance levels in the reverse bias region will be high.
In general, the lower the current through a diode the higher the dc resistance level
AC Resistance
It is used to find the diode resistance when the small signal ac input voltage is applied across the
diode.
VD
ID
DC resistance Rd= VD / ID
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 7
For small signal ac voltage, ID & VD changes around Q point which is fixed by large signal DC
voltage
The ac resistances is determined by
Drawing a tangent line at Q point
Then find the change in voltage and the current.
The ratio of this change in the voltage and the current is called ac resistance.
Average Resistance
It is used to find the diode resistance when the large signal ac input voltage is applied across the
diode.
For large signal, there is no Q point and limits of operation is large due large swing in current and
voltage.
Average resistance is ratio of change voltage to the change in current between two extreme points.
The average resistances is determined by
Drawing a straight line between two extreme voltages on characteristic curve
Then finding the difference in voltages and respective currents between the two
points.
1.2 Equivalent Circuits of Diode
Order of simplification:
Diode Characteristic Curve – Non linear graph
Ac resistance rd= ∆ Vd / ∆ Id
Q ∆ Id
∆ Vd
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 8
Piecewise Linear Equivalent Circuit – approximate in to two lines, one horizontal and other with
slope 1/r
Simplified Equivalent Circuit – approximate in to two lines, one horizontal and other one vertical
Ideal Diode with zero voltage across diode during forward bias and zero current through diode during
reverse bias
1.3 Diode Capacitance
Ideal Equivalent circuit
Ideal diode
rave = 0, Vk =0
Simplified Equivalent Circuit
Ideal diode
rave = 0
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 9
Two types of Diode Capacitance :
Transition Capacitance
Diffusion capacitance.
Effect of capacitance:
It is stray capacitance and has very low value
Diode becomes frequency sensitive, mainly at very high frequency.
At high frequency, Xc becomes low enough to introduce a low reactance shorting path.
Transition capacitance (CT):
Predominant effect in reverse bias condition.
Also called as ―Depletion region Capacitance or space charge capacitance
Basic capacitance eqn = ε A/d where
ε = permittivity of dielectric between the two plates
A =Area and d = distance between the plates.
Depletion region behaves like dielectric between two charged plates.
Depletion width ‗d‖ increases with increase in reverse bias.
So CT decreases as reverse bias increases.
Application Ex Schottky diode, varactor (Varicap) diodes….
CT is present in forward bias also, but is effect is neglected by the presence of larger CD
Diffusion capacitance (CD):
Predominant effect in forward bias condition.
Also called as ―Storage Capacitance‖.
Depends on rate at which charge is injected in to the PN region. (outside the depletion).
So as current increases, CD increases.
However increase in current reduces resistance. This helps in high frequency operation as T =
RC
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 10
1.4 Reverse Recovery Time:-
Denoted by trr.
In forward bias, large number of free electrons in P region and holes in N region during conduction.
This results in minority carriers in each region
Sudden changing to reverse bias results into large reverse current due to large minority carriers. ( I
reverse = I forward)
Stays for initial storage time ts
After movement of minority carriers top other region Ir decreases to Is within time tt.
trr = ts +tt
Important in high speed switching applications
Normal value – few nanosec to 1us . Very low trr of picosecs are also available
-25 -20 -15 -10 -5 0 0.25 0.5
5
10
15
CT
Cpf
CT + CD ~ CD
CT
1uF
CD
1
D1
1N5402
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 11
DIODE SPECIFICATIONS
Data provided by manufactures.
Must be included data :-
VF at specified temp and IF
IF max at specified temp.
IR at specified voltage and temp.
PIV or BR or PRV at specified temp
PD max = VDID
Capacitance levels
Reverse recovery time .. trr
Operating temp Range
Additional Data depends on application :-
Frequency range
Noise Level.
Switching time.
Thermal resistance levels
Peak repetitive values.
ID
t
IF
t1
ts
tt
Diode is reverse biased
Ir
Is
Desired response.
trr = ts + tt
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 12
Diode Notation:- A & K Depends on application, manufactures, current/voltage rating
Testing can be done by using
DMM (Digital Multimeter)- with diode checking function
ohm meter
Curve Tracer
With diode checking :- Internal meter voltage is used
In one direction it shows 0.7 V as diode is forward biased
In other direction it is around 2.5V (depends on Vbattery)
With Ohm meter
One direction low resistance (RF)
Other direction it shows high resistance (RR)
With curve tracer
Characteristic curve of the diode is displayed.
Vertical axis is 1mA/div(Can be adjusted)
Horizontal axis is 100mV/div (can be adjusted)
Expensive and looks more complex.
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 13
Load line Analysis:-
Load line - defined by the network
Characteristic curve – defined by device
V1 = VD+IDR
ID = V1/R at VD =0V
VD = V1/R at ID =0A
1. In any given circuit, check biasing of diode.
2. During forward bias (i.e diode is ON) replace diode by short for ideal diodes or with 0.7V
3. During reverse bias (i.e diode is OFF) replace diode with open circuit.
4. Do the ckt analysis and find the output voltage.
In a circuit, diode can be in Series, Parallel or Series and Parallel
Answers :-
Load line Analysis:-
R11k
+ V110V
D1
1N5402
10mA
V1
Q
Load line
Characteristic
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 14
5.Determine the current I for each of the configurations of fig 2.150 using the approximate equivalent model
for the diode.
a) I = 0 mA; diode reverse-biased.
(b)V in loop of 20 = 20 V 0.7 V = 19.3 V (Kirchhoff‘s voltage law)
I = 19.3/20 = 0.965 A
(c)I = 10v/10 = 1 A; center branch open is open as one diode is forward biased and the other one is reverse
biased.
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 15
6) Determine Vo and Id for the networks of fig.2.151
a)Diode forward-biased,
Kirchhoff‘s voltage law (CW):
5 V + 0.7 V Vo = 0
So Vo = 4.3 V
IR = ID = 4.3V/2.2K = 1.955 mA
(b)Diode forward-biased,
ID = (8-0.7)/ (1.2k+4.7k) = 1.24 mA
Vo = ID* 4.7 k + VD
= (1.24 mA)(4.7 k ) + 0.7 V = 6.53 V
7) Determine the level of Vo for each network of fig.2.152
a)Vo = (Vdc-VD1-VD2) = (20 V – 1 V)
= (19 V) = 9.5 V
b) I = (10-(-2)-0.7)/ (1.2+4.7)k
= (11.3/5.9) = 1.915 mA
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 16
V = IR = (1.915 mA)(4.7 k ) = 9 V
Vo = V 2 V = 9 V 2 V = 7 V
8) Determine Vo and Id for the networks of fig.2.153.
a) Determine the Thevenin equivalent circuit for the 10mA source and 2.2 k resistor.
ETh = IR = (10 mA)(2.2 k ) = 22 V and RTh = 2.2k
So ID =22/(2.2+1.2) = 6.26 mA
Vo = ID(1.2 k ) = (6.26 mA)(1.2 k ) = 7.51 V
(b)Diode forward-biased,
ID = 20-(-5)-0.7 /6.8k= 3.57 mA
Kirchhoff‘s voltage law (CW):
Vo 0.7 V + 5 V = 0
Vo = 4.3 V
9) Determine Vo1 and Vo2 for the networks of fig.2.154.
(a)Vo1 = 12 V – 0.7 V = 11.3 V
Vo2 = 0.3 V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 17
(b) Vo1 = 10 V + 0.3 V + 0.7 V = 9 V
I = 9V/(1.2+3.3)k = 2 mA,
Vo2 = (2 mA)(3.3 k ) = 6.6 V
10) Determine Vo and Id for the netwoks of Fig.2.155.
(a) Both diodes forward-biased
(b) IR = (20-0.7)/4.7K = 4.106 mA
Assuming identical diodes:
ID = 4.106/2 = 2.05 mA,Vo = 20 V 0.7 V = 19.3 V
(b)Right diode forward-biased:
ID =15-(-5)-0.7 /2.2K =20/2.2 8.77 mA
Vo = 15 V 0.7 V = 14.3 V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 18
11) Determine Vo and I for the networks of Fig 2.156.
(a)Both diodes forward-biased
IR = (20-0.7)/4.7K = 4.106 mA
Assuming identical diodes:
ID = 4.106/2 = 2.05 mA
Vo = 20 V 0.7 V = 19.3 V
(b)Right diode forward-biased:
ID =15-(-5)-0.7 /2.2K
=20-.7/2.2 = 8.77 mA
Vo = 15 V 0.7 V = 14.3 V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 19
12) Determine Vo1 and Vo2 and I for the network of Fig.2.157.
Both diodes forward-biased:
Vsi = 0.7 V, Vge = 0.3 V
Vo1 = 20-0.7=19.3V Vo2 = 0.3V
Current through 1k resistor (I1)
= (20-0.7)I1 k 19.3/1k = 19.3 mA
Current through 0.7k resistor (I2)
13) Determine Vo and Id for the network of fig.2.158.
Both diodes are forward biased and parallel (in series with 2k ).
Thevinin‘s eqt circuit for this is 2k//2k with 0.7 V in series = 1kohm in series with 0.7V
So current through load resistor
= (10-0.7)/ (1+2)k = 3.1mA
ID = 3.1/ 2 = 1.55 m
Vo = 3.1mA* 2 K = 6.2V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 20
1.5 Clippers
A clipper is a circuit that is used to eliminate a portion of an input signal. There are two basic types of clippers: series
clippers and shunt/parallel clippers. As shown in Figure 4-1, the series clipper contains a diode that is in series with
the load. The shunt clipper contains a diode that is in parallel with the load.
FIGURE 4-1 Basic clippers.
The series clipper is a familiar circuit. The half-wave rectifier is nothing more than a series clipper. When the diode in
the series clipper is conducting, the load waveform follows the input waveform. When the diode is not conducting, the
output is approximately 0 V or fixed dc voltage which is connected in parallel. (Figure 4.2). The direction of the
diode determines the polarity of the output waveform. If the diode symbol (in the schematic diagram) points toward the
source, the circuit is a positive series clipper, meaning that it clips the positive alternation of the input. If the diode
symbol points toward the load, the circuit is a negative series clipper, meaning that it clips the negative alternation of
the input (Figure 4.11). With this di
Ideally, a series clipper has an output of when the diode is conducting (ignoring the voltage across the diode).
When the diode is not conducting, the input voltage is dropped across the diode, and .
Unlike a series clipper, a shunt clipper provides an output when the diode is not conducting. For example, refer to
Figure 4-1. When the diode is off (not conducting), the component acts as an open. When this is the case, and
form a voltage divider, and the output from the circuit is found using
When the diode in the circuit is on (conducting), it shorts out the load. In this case, the circuit ideally has an output of
. Again, this relationship ignores the voltage across the diode. In practice, the output from the circuit is
generally assumed to equal 0.7 V, depending upon whether the circuit is a positive shunt clipper or a negative shunt
clipper. The direction of the diode determines whether the circuit is a positive or negative shunt clipper. The series
current-limiting resistor ( ) is included to prevent the conducting diode from shorting out the source.
A biased clipper is a shunt clipper that uses a dc voltage source to bias the diode. A biased clipper is shown in Figure
4-2. (Several more are shown in Figures 4.9 and 4.10). The biasing voltage ( ) determines the voltage at which the
diode begins conducting. The diode in the biased clipper turns on when the load voltage reaches a value of .
In practice, the dc biasing voltage is usually set using a potentiometer and a dc supply voltage, as shown in Figure 4.10.
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 21
FIGURE 4-2 A biased clipper.
Clippers are used in a variety of systems, most commonly to perform one of two functions:
1. Altering the shape of a waveform
2. Protecting circuits from transients
The first application is apparent in the operation of half-wave rectifiers. As you know, these circuits are series clippers
that change an alternating voltage into a pulsating dc waveform. A transient is an abrupt current or voltage spike of
extremely short duration. Left unprotected, many circuits can be damaged by transients. Clippers can be used to protect
sensitive circuits from the effects of transients, as illustrated in Figure 4.12.
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
1
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = VR =0V
Vo= Vin - Vd
Output voltage
IVinI < I0.7IVFor all values of Vin
Reverse Biased
IVinI > I0.7IVForward biased
Negative Cycle
Positive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 22
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
4
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin0V+5V
-4.3V
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
5
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = VR =0V
Vo= Vin – Vdc+ Vd
= 0 for +ive cycle
=-(Vin + 1.3V) in –ive
cycle
Output voltage
Vin >2V -0.7Reverse Biased
For all values of Vin
Vin <2V -0.7Forward biased
Negative Cycle
Positive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 23
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
6
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = VR =0V
Vo= Vin- (Vdc+0.7)
Output voltage
I Vin I<
Vdc+0.7
For all values
of Vin
Reverse
Biased
I Vin I > Vdc+0.7V
Forward biased
Negative Cycle
Positive Cycle
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
7
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin-5V
- 2.3V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 24
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
8
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = Vdc =2V
Vo= Vin- 0.7V
Output voltage
Vin> Vdc-0.7Reverse
Biased
For all values of Vin
Vin< Vdc-0.7V
Forward biased
Negative Cycle
Positive Cycle
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
9
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin-5V
- 4.3V
2V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 25
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
11
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
0V
+5V
4.93V
Staff: - KRS Session (Aug 08 – Dec08)
TE Department PESIT, Bangalore
10
Syllabus: - Analog Electronic Circuit
Unit I /c: - Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = VR =0V
Vo= Vin - Vd
Output voltage
For all values of Vin
Vin < 0.7V Reverse Biased
Vin > 0.7V Forward biased
Negative Cycle
Positive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 26
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
12
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = Vin.
Vo= Vd =0.7V
Output voltage
For all
values of Vin
Vin <0 .7VReverse
Biased
Vin >0.7VForward biased
Negative Cycle
Positive Cycle
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
13
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
0.7V
-5V
-5V
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 27
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
15
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
- 0.7V
+5V
-5V
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
16
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode condition
Vo = Vin
Vo= Vdc + Vd== 2+0.7 =2.7V
Output voltage
For all values of Vin
Vin < Vdc +0.7VReverse Biased
Vin > Vdc +0.7VForward biased
Negative Cycle
Positive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 28
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
17
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
2.7V
+5V
4.93V
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
18
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode
Vo = Vin.
Vo= -Vdc+Vd ==
-2 + 0.7 = -1.3V
Output voltage
IVinI > I(Vdc-0.7V)IReverse Biased
IVinI < I(Vdc-0. 7V)IFor all
values of Vin
Forw ard
biased
Negative CyclePositive
Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 29
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
19
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
-1.3V
-5V
5V
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
20
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode
Vo = Vin.
Vo= Vdc- Vd == 2 -0.7
=1.3V
Output voltage
For all values of Vin
Vin > Vdc -0.7VReverse Biased
Vin < Vdc -0.7VForward biased
Negative CyclePositive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 30
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
21
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
+2.7V
-5V
-5V
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
22
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode
Vo = Vin.
Vo= -(Vdc+Vd)
== -2.7
Output voltage
IVinI< I(Vdc+0.7V) IFor all values of Vin
Reverse Biased
IVinI> I(Vdc+0.7V) IForward
biased
Negative CyclePositive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 31
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
23
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
-2.7V+5V
5V
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
24
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
OFF
ON,
Diode
Vo = Vin.
Vo= -(Vdc+Vd)
== -2.7
Output voltage
IVinI< I(Vdc+0.7V) IFor all values of Vin
Reverse Biased
IVinI> I(Vdc+0.7V) IForward
biased
Negative CyclePositive Cycle
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 32
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
25
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Vo
Vin
-2.7V
2.7V
Clampers (DC Restorers)
A clamper is a circuit that is designed to shift a waveform above or below a dc reference voltage without altering the
shape of the waveform. This results in a change in the dc average of the waveform. Both of these statements are
illustrated in Figure 4-3. (The clamper has changed the dc average of the input waveform from 0 V to +5 V without
altering its shape.)
FIGURE 4-3 A clamper with its input and (ideal) output waveforms.
There are two basic types of clampers:
A positive clamper shifts its input waveform in a positive direction, so that it lies above a dc reference voltage.
For example, the positive clamper in Figure 4-3 shifts the input waveform so that it lies above 0 V (the dc
reference voltage).
A negative clamper shifts its input waveform in a negative direction, so that it lies below a dc reference
voltage.
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 33
Both types of clampers, along with their input and output waveforms, are shown in Figure. The direction of the diode
determines whether the circuit is a positive or negative clamper.
Clamper operation is based on the concept of switching time constants. The capacitor charges through the diode and
discharges through the load. As a result, the circuit has two time constants:
For the charge cycle, and (where is the resistance of the diode)
For the discharge cycle, and (where is the resistance of the load)
Since is normally much greater than , the capacitor charges much more quickly than it discharges. As a result,
the input waveform is shifted as illustrated in Figure 4.16.
A biased clamper allows a waveform to be shifted above (or below) a dc reference other than 0 V. Several examples
of biased clampers are shown in Figure 4-4.
FIGURE Several biased clampers.
The circuit in Figure (a) uses a dc supply voltage (V) and a potentiometer to set the potential at the cathode of . By
varying the setting of , the dc reference voltage for the circuit can be varied between approximately 0 V and the
value of the dc supply voltage.
The zener clamper in Figure (b) uses a zener diode to set the dc reference voltage for the circuit. The dc reference
voltage for this circuit is approximately equal to . Note that zener clampers are limited to two varieties:
Negative clampers with positive dc reference voltages
Positive clampers with negative dc reference voltages
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 34
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
26
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clampers
First positive cycle:-
Diode is reverse biased and Vo= 0V.
First negative cycle:-
Diode is forward biased and capacitor is charging with very low time constant. At
negative peak, Vc=Vm.-Vdc After peak diode becomes reverse biased as
Vc>Vin.
Vo = Vin+Vc
Subsequent positive and negative cycles :- Time constant of Capacitor
discharge is very high.(=C*100k). In each negative cycle, Vc charges to max. value.
In both cycles Vo= Vin + Vc
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 35
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
27
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Positive clamper with waveform in negative side. Swing level decreases with increase in voltage. Swing level is max at
Vdc =0V. Swing level can be varied from 0V to Vm
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 36
Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
28
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clampers
First positive cycle:-
Diode is reverse biased and Vo= 0V.
First negative cycle:-
Diode is forward biased and capacitor is charging with very low time constant. At
negative peak, Vc=Vm.+Vdc After peak diode becomes reverse biased as
Vc>Vin.
Vo = Vin+Vc
Subsequent positive and negative cycles :- Time constant of Capacitor
discharge is very high.(=C*100k). In each negative cycle, Vc charges to max. value.
In both cycles Vo= Vin + Vc (Vin is +ivefor positve cycle and –ive for –ve cycle)
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Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
29
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Positive clamper with waveform in positive side. Swing level increases with increase in voltage. Swing level is min at Vdc
=0V. Swing level can be varied from Vm to Vm+Vdc.
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Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
30
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clampers
First positive cycle:-
Diode is forward biased and capacitor is charging with very low time constant. At positive peak, Vc=Vm.-Vdc After peak,
diode becomes reverse biased as Vc>Vin.
Vo = Vin-Vc
Subsequent negative and positive cycles :- Time constant of Capacitor discharge is very high.(=C*100k). In each
positive cycle, Vc charges to max. value. In both cycles Vo= Vin – Vc. (Vin is +ive
for postive cycle and –ive for –ve cycle)
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Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
31
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Negative clamper with waveform in positive side. Swing level decreases with increase in voltage. Swing level is max
Vdc =0V. Swing level can be varied from 0 to Vm
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Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
32
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clampers
First positive cycle:-
Diode is forward biased and capacitor is charging with very low time constant. At positive peak, Vc=Vm.-Vdc After peak,
diode becomes reverse biased as Vc>Vin.
Vo = Vin-Vc
Subsequent negative and positive cycles :- Time constant of Capacitor discharge is very high.(=C*100k). In each
positive cycle, Vc charges to max. value. In both cycles Vo= Vin – Vc. (Vin is +ive
for positive cycle and –ive for –ve cycle)
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Staff:- KRS
Session (Aug 08 – Dec08)
TE Department
PESIT, Bangalore
33
Syllabus:- Analog Electronic Circuit
Unit I /c:- Diode Applications - Clippers
Negative clamper with waveform in negative side only. Swing level increases with increase in voltage. Swing level
is min Vdc =0V. Swing level can be varied from -Vm to -Vm +VDC).
Troubleshooting Diode Circuits
Because diodes are so common in the electronics industry, it is important to be able to troubleshoot and repair
systems that employ diodes.
Diode defects include:
• Anode-to-cathode short.
• Anode-to-cathode open.
• Low front-to-back ratio.
• Out-of-tolerance parameters.
• Tests that can performed on diodes to check for their operation are:
– Voltage measurements.
– Ohmmeter tests.
– Diode testers.
Instruments that used to measure the healthiness of diode are
Digital multimeter in diode mode
Ohm-meter ( multimeter in resistance mode)
Curve tracer
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Question paper with Solutions
Q. 1 What is the origin of diffusion capacitance. Obtain an expression for the diffusion capacitance in terms of current in a p-n diode.
(Jan 2004(6), July 2004 (6), Jan 2007 (7), July 2007 (5) ) Jan 2009 (7)
Sol.: In forward biased condition, the width of the depletion region decreases and holes from p side get diffused in 'n' side while
electrons from 'n' side move into the p-side the applied voltage increases, concentration of injected charged particles increases.
This rate of change of the injected charge with applied voltage is defined as capacitance called diffusion capaacitance.
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Q 2) Draw a double diode clipper which limits at two independent levels and explain its working. (Jan 2004(6), July 2004 (8), July 2005 (6), Jan 2007(6))
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Q. 3 Define the terms P.I.V and regulation as applied to rectifiers.
(July 2004 (4), Jan 2008 (4) , Jan 2009
Sol.: i) Peak Inverse Voltage (PIV) :
When the diode is not conducting, the reverse voltage gets applied across the diode. The peak value of such
voltage decides the peak universe voltage i.e. PIV rating of a diode.
Regulation of the output voltage:
As the load current changes, load voltage changes. Practically load voltage should remain constant So
concept of regulation is to study the effect of change in load current on the load voltage.
Q 4) Draw the piece-wise linear volt-ampere characteristics of a p-n diode. Give the circuit model for the
ON state and OFF state. Jan./Feb. – 2005, July
2007 (10).
Another way to analyse the diode circuits is to approximate the V-I characteristics of a diode using only
straight lines i.e. linear relationships. In such approximation, the diode forward resistance is neglected and
the diode is assumed to conduct instantaneously when applied forward biased voltage Vo is equal to cut-in
voltage Vy' And then it is assumed that current increases instantaneously giving straight line nahlre of V-I
characteristics. While in reverse biased condition
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when Vo < 0, the diode does not conduct at all.
Hence when diode forward resistance is assumed zero, the circuit model of diode is as shown in the
Fig. 1 (a). In reverse biased, the diode is open circuit as shown in the Fig. 1 (b). As the diode conducts at Vo
=Vy' the V-I characteristics with straight lines is as shown in the Fig. 1 (c). As the method models the diode
with the pieces of straight lines, the name given to such approximation is piecewise-linear method. The
characteristics of diode shown in the Fig. 1 (c) are called the piecewise linear diode characteristics.
Open circuit
For the clipping circuit shown incharacteristic. Assume ideal diode.
150 volts.
the following figure, obtain its transfer
The input varies linearly from 0 to(7)
Q 5) Sketch and explain the circuit of a double ended clipper using ideal p-n diodes which limit the output
between ± 10 V. (6) (July 2005(6) July 2007(10),
July 2008 (10))
Vin = Vim sin w t
During positive half cycle, the diode D becomes forward biased and conducts, only when Vin is greater
than battery voltage Vl' So as long as Vin is less that V1 both the diodes are reverse biased and output
follows input. When D1 conducts, D2 is OFF and hence the output is constant at V1 volts. This is shown in
the Fig. 2
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In case of negative half cycle, as long as Viis greater than V2' the diodes D1 and D2 both remain reverse
biased and the output follows input. Once input goes below V 2 then the diode D2 conducts and output
remains constant equal to V2' This is shown in the Fig. 3 (a) and (b).
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Q 6) Draw the bridge rectifier with capacitor filter and explain.
(July 2005(10), june 2008)
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Q 7) Explain the working of a full wove voltage doubler circuit. Jan./Feb. - 2004.Jan-
2006,July2008
Q 8) Design a power supply usinfS a FWR with capacitance filter to given an output voltage of 10V at 10mA from a 220
Hz, 50 Hz supply. The ripple factor must be less than 0.01. (Jan 2004(10))
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Q 9) For the clipping circuit shown in characteristic. Assume ideal diode.150 volts.the following figure, obtain its transferThe input
varies linearly from 0 to 7
Jan 2005 (10) July 2007 (10) Jan 2009 (10)
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Q 10) Design a full wave' rectifier with a capacitor filter to meet the following specifications.
DC output voltage = 15 volts, Load resistance = 1 kD. RMS ripple voltage on capacitor = < 1% of DC output
voltage. Assume the AC supply voltage as 230 Volts, 50 Hz. (8)
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Jan 2005(10)
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Recommended Questions
1. What do you understand by ―diffusion Capacitance? (Jan /Feb 2004, 6 marks)
2. Draw a doubl diode clipper, which limits at two independent levels and explain its operation
(Jan /Feb 2004, 6 marks)
3. what is the origin of diffusion capacitance? (July/ Aub 2004 – 6 marks)
4. Draw a double diode clipper which limits two independent levels and explain its workin?
(July/ Aub 2004 – 8 marks)
5. Draw a simple clamping circuit and explain its working?
(July/ Aub 2004 – 6 marks)
6. Define the terms P.I.V and regulation as applied to rectifiers
(July/ Aub 2004 – 4marks)
7. Explain the validity of the piecewise linear approximation of the diode model
(July/ Aub 2004 – 4 marks)
8. Draw the piece-wise linear volt-ampere characteristics of a p-n diode. Give the circuit model for the
ON state and OFF state.
9. Sketch and explain the circuit of a double ended clipper using ideal p-n diodes which limit the output
between +/- 10V (July / Aug 2005 – 6 marks)
10. Draw the circuit diagram ofa bridge rectifier. Plot its input and output waveforms.
Thus, voltage divider bias configuration is quite stable when the ratio Rth / RE is as small
as possible.
Physical impact
In a fixed bias circuit, IC increases due to increase in IC0. [IC = βIB + (β+1) IC0] IB is fixed by VCC and RB. Thus level of IC would continue to rise with temperature – a very unstable situation.
In emitter bias circuit, as IC increases, IE increases, VE increases. Increase in VE
reduces IB. IB = [VCC – VBE – VE] / RB. A drop in IB reduces IC.Thus, this
configuration is such that there is a reaction to an increase in IC that will tend to
oppose the change in bias conditions.
In the DC bias with voltage feedback, as IC increases, voltage across RC increases, thus
reducing IB and causing IC to reduce.
The most stable configuration is the voltage – divider network. If the condition βRE
>>10R2, the voltage VB will remain fairly constant for changing levels of IC. VBE = VB – VE, as IC increases, VE increases, since VB is constant, VBE drops making IB to fall, which will try to offset the increases level of IC.
S(VBE)
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S(VBE) = ∆IC / ∆VBE
For an emitter bias circuit, S(VBE) = - β / [ RB + (β + 1)RE]
If RE =0 in the above equation, we get S(VBE) for a fixed bias circuit as,
S(VBE) = - β / RB.
For an emitter bias,
S(VBE) = - β / [ RB + (β + 1)RE] can be rewritten as,
S(VBE) = - (β/RE )/ [RB/RE + (β + 1)]
If (β + 1)>> RB/RE, then
S(VBE) = - (β/RE )/ (β + 1) = - 1/ RE
The larger the RE, lower the S(VBE) and more stable is the system.
Total effect of all the three parameters on IC can be written as,
∆IC = S(ICO) ∆ICO + S(VBE) ∆VBE + S(β)∆β General conclusion: The ratio RB / RE or Rth / RE should be as small as possible considering all aspects of
design.
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Question paper with Solutions
Q 1) Desigh a self bias transistor circuit for a stability of s< 5. The give date is as follows: Jan 2004(8)
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Q 2) For a self bias circuit, derive an expression for the stability factor s.
July 2004(8)
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Q 4.
Jan 2005 (10) JAN2009(10)
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Q 5) In the circuit of Fig. 9 given below, Vcc = 10V, Rc = 1.5 kn, ICQ = 2 mA, VCE = 5V, VBE = 0.7 V, 0 = 50 and stability factor
S ~ 5. Find R] and R2.
July 2005 (9),July2009(9)
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Q. 6
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July 2006 (10)
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Recommended Questions
1. What are the causes of instability in a transistor? Explain them in brief.(Jan/Feb 2006, 5 marks)
2. Discuss the causes for bias instability in a transistor(July / Aug 2005, 5 marks)
3. What is meant by biasing of a transistor? List the different types of transistor biasing circuits.
4. What to do you mean by operating point of a transistor? Draw the output characteristic of transistor
with various limits of operation and explain it.
5. Differentiate the ―active region‖, ―saturating region‖ and cut off region of a transistor with the
requirement of biasing.
6. Analyze the fixed bias circuit operation and derive the expression for operating point (Iceq, Vceq)
Vce max and Ic max
7. Analyse the Emitter bias circuit operation and derive the expression for operating point (Iceq,
Vceq) Vce max and Ic max
8. What are the different areas of operation in the BJT Characteristic curve? And explain them.
9. Analyse the voltage divider bias circuit operation and derive the expression for operating point
(Iceq, Vceq) Vce max and Ic max (using both approximate and exact method)
10. List out the various types of biasing circuits and compare their merits and demerits.
11. What do you understand of designing the transistor bias circuit? List the parameters to be
calculated and list the parameters required to design.
12. What is meant by transistor switching circuit? Explain with the required biasing.
13. What do you mean by stabilization?
14. Give the essential requirements of stabilization
15. Differentiate between saturation, linear region & cutoff region of transistor operation & show this
in the characteristic curve
16. Explain the fixed bias of transistor with circuit diagram and output equations
17. What is meant by biasing of a transistor? List the different types of transistor biasing circuits
18. a) Draw the transistor amplifier with the fixed bias circuit using the given component values
-ive sign indicates the 1800 phase shift between input & output voltage signal
Current gain Ai =Io/Ii
Ii =Vi/Zi
Io=Vo/RL
Ai= Io/Ii = (Vo/RL)/(Vi/Zi)= -AvZi/RL
3.4 Ac analysis for Voltage divider circuit
Example
It is similar to that of fixed bias circuit with RB is replaced by R1//R2
So
Zi = R1//R2 //βre here R1//R2 is comparitely smaller value than that of RB in fixed n\bias. So it may not be
possible to ignore R1//R2 in calculation of Zi. So Zi with voltage divider is lesser than that of fixed bias
Zo =Rc//ro≈Rc Same as that of fixed bias.
Av =-(Rc//ro)/re ≈Rc/re Same as that of fixed bias
Hybrid Equivalent Model
The hybrid parameters: hie, hre, hfe, hoe are developed and used to model the transistor.
These parameters can be found in a specification sheet for a transistor.
• hi = input resistance
• hr = reverse transfer voltage ratio (Vi/Vo)
• hf = forward transfer current ratio (Io/Ii)
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• ho = output conductance
General h-Parameters for any
Transistor Configuration
Vi =f1 (Ii, Vo) and Io =f2((Ii, Vo)
Vi = h11Ii+h12Vo
Io=h21Ii+h22Vo
Where
h11 = Vi/Ii with Vo=0 ie short circuit input resistance, unit Ω, & designated as hi
h12 = Vi/Vo with Ii=0 ie open circuit reverse transfer voltage ratio, unitless, & designated as hr
h21 = Io/Ii with Vo=0 ie short circuit forward transfer current ratio, unitless, & designated as hf
h22 = Vo/Io with Ii=0 ie open circuit output conductance, unit µSiemens & designated as ho
So hi,hr,hf & ho are called hybrid parameters
By placing second subscript as b for CB, c for CC and e for CE, we can get hybrid parameters for each
configuration.
Simplified General h-Parameter Model
The above model can be simplified based on these approximations:
hr =0 therefore hrVo = 0 and 1/ho = ∞
Common-Emitter h-Parameters
ac fe
hie =25mV/IBQ =hfeIBQ/IEQ
hfe =ßac
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Common-Base h-Parameters
hib =25mV/IEQ
hib=-αac = -1
3.5 Common-Emitter (CE) Fixed-Bias Configuration
The input (Vi) is applied to the base and the output (Vo) is from the collector.
The Common-Emitter is characterized as having high input impedance and low output
impedance with a high voltage and current gain.
Determine hfe, hie, and hoe:
hfe and hoe: look in the specification sheet for the transistor or test the transistor using
a curve tracer.
hie: calculate hie using DC analysis:
hie =25mV/IBQ =hfe25mV/IEQ
Input impedance Zi = RB//hie≈ hie if RB > 10hie
Output impedance Zo= Rc//(1/ho) ≈ Rc if 10Rc << 1/ho
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Voltage gain hie
hfeRc
hie
hohfeRcAv
)/1//(
if 1/ho>10Rc
Current gain Ai ≈hfe if RB>10hie & 1/ho>10Rc
Or Ai = -AvZi/Rc
Phase Relationship
The phase relationship between input and output is 180 degrees. The negative sign used in
the voltage gain formulas indicates the inversion.
CE – Voltage-Divider Bias Configuration
Input impedance Zi = R1//R2//hie
Output impedance Zo= Rc//(1/ho) ≈ Rc if 10Rc << 1/ho
Voltage gain hie
hfeRc
hie
hohfeRcAv
)/1//(
if 1/ho>10Rc
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Current gain Ai ≈hfe if RB>10hie & 1/ho>10Rc
Or Ai = -AvZi/Rc
Phase Relationship
A CE amplifier configuration will always have a phase relationship between input and
output is 180 degrees. This is independent of the DC bias.
CE Emitter-Bias Configuration
Unbypassed RE
Input impedance Zi = RB//hie+(1+hfeRE)
Output impedance Zo= Rc//(1/ho) ≈ Rc if 10Rc << 1/ho
Voltage gain
EE
EEie
oefe
Rhfe
hie
Rc
hfeRhie
hfeRcAv
Rhfehie
hfeRc
Rhfeh
hRchAv
)1()1(
)/1//(
if 1/ho>10Rc, 1+hfe ≈hfe
Current Gain Ai =
ieCoe
oefe
hRRRh
hRRh
IiIo)2//1(()1(
1)2//1(/ = -AvZi/Rc
For Emitter follower circuit
Zi = RB//(1+ß)(re+RE) = RB// ßRE if RE > 10re & 10RE<RB ( hfe RE in hybrid eq circuit)
Zo = re//RE =re ( hie/hfe in hybrid eq ckt)
Av = RE /(re+RE) = RE/RE =1
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3.6 For CB amplifier
Zi = RE//re =re ( hib in hybrid eq ckt)
Zo = Rc//ro=Rc
AV = Rc/re ( Rc/hib)
Effect of load resistance and source impedance:-
AvNL >AVL>AVs
Both load resistance & source impedance reduces the gain
If load resistance is very low compare to Zo, gain reduces drastically
If source impedance is very high compare to Zi gain reduces.
If we consider output equivalent circuit as voltage source with value AvNL , inseries with output
impedance Zo we can find the reduction factor as below
If AVNL is the no load gain, AVL is the gain with load RL, AVs is the gain with load and source resitance
rs
Then
RoR
R
rsZi
ZiAV
RoR
RAVAVs
rsZi
ZiAVAV
L
L
LN
L
LL
LNL
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Question paper with solution:
Q.1 a) Draw the hybrid model of a transistor and explain the significance of each element.
Jan2004( 6),jan2006(5),july2006(5),jan2007(6)
Sol. :
hIe It is the short circuit input impedance
h 21- forward current gain
h 12 - Reverse Voltage gain
h22 - Output admittance
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Q 2) State and prove Miller's theorem
(Jan2004[6],July2005(5),Jan2006,July2006,Jan2007)
Sol. : Statement: An impedance Z connected as a feedback element can be reflected towards the input port
and the output port This helps in the simplification of analysis.
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4) Using h-parameter model for a transistor in C.E. configuration, Derive expressions for AI' Zi Av and Yo
of the amplifier.
( Jan2006(12)july2006(9),july2007(8),jun2008)
Ans. : Let us consider the h-parameter equivalent circuit for the amplifier, as shown in
the Fig. .
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b) The transistor amplifier shown in Fig.IO uses a transistor whose h-parameters are hie = 1.1 kQ, hfe = 50,
h'e = 2.5x10-4 and l/hoe = 40 kQ. Calculate 1 Ai - -,0 Av, Avs , Ro and R
(July –Aug 2005);
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Recommended Question:
1. List the three models used in small signal ac analysis of transistor and compare them.
2. Explain conversion efficiency.
3. What are the significances of transistor equivalent circuit/model?
4. Define the h-parameters and draw the small signal value for CE configuration
5. List out the various steps to get the ac equivalent circuit of transistor used in small
signal ac analysis.
6. Explain the hybrid equivalent model of transistor for both common emitter
configuration.
7. What are h-parameters? Explain them.
8. What is current gain? Derive its equation.
9. Explain the two- port systems Derive the Thevinin‘s equivalent parameters
10. Derive the Approximate and complete hybrid equivalent parameters for
i)fixed bias config
ii) Voltage divider config.
iii)Unbypassed emitter bias config
11. Compare the re model parameters and hybrid model parameters.
12. Write two port system notations for an operation amplifier with & without load.
13. State and explain the dual of Millers theorem? (Jan 2006 – 5 marks)
14. What are the advantages of h-parameters? (Jan 2006 – 5 marks)
15. Using Millers theorem, draw the equivalent circuit between C and E. Applying KcL
to the network, show that the above value of k is obtained?
16. Draw the hybrid small signal model of a transistor and explain the significance of
each component of the model?
17. Using h- parameter model for a transistor in C.E. configuration, derive expressions
for Ar, Zp, Av and Yo of the amplifier
18. Explain how h-parameter can be obtained from the static characteristics of a
transistor
19. The transistor amplifier shown in Fig.IO uses a transistor whose h-parameters are
hie = 1.1 kQ, hfe = 50, h'e = 2.5x10-4 and l/hoe = 40 kQ. Calculate 1 Ai - -,0 Av,
Avs , Ro and R
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Unit: 4 Hrs: 6
Transistor Frequency Response: General frequency considerations, low frequency response, Miller
effect capacitance, High frequency response, multistage frequency effects.
Recommended readings:
TEXT BOOK:
1. ―Electronic Devices and Circuit Theory‖, Robert L. Boylestad and Louis Nashelsky, PHI/Pearson
Eduication. 9TH Edition.
REFERENCE BOOKS:
1. ‗Integrated Electronics‘, Jacob Millman & Christos C. Halkias, Tata - McGraw Hill, 1991 Edition
2. ―Electronic Devices and Circuits‖, David A. Bell, PHI, 4th Edition, 2004
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4.1 Frequency response:- is the study of amplifier performance over a wide range of frequencies. It is
observed that, at lower and higher frequencies, gain reduces gradually as shown below:
.
Why Av drop at lower & higher frequencies:- The decrease in gain at lower frequency is due to the effect
of network capacitors
Input coupling capacitor Ccs,
Output coupling capacitor Cco
Bypass capacitor CE
The reactance of the above capacitors is close zero at normal or higher frequencies, so considered as short
in ac analysis. However at lower frequencies, reactance is quite high compare to the resistances of the circuit
and hence can not be ignored. These reactances appear in the input, output and across emitter resistor reduces
the gain.
The reason for decrease in gain at higher frequencies is due to the interelectrode or parasitic or junction
capacitances between terminals of BJT. The value of these capacitors are very low compare to Ccs, Cco &
CE . They are in order of pF or nF. So at normal or lower frequencies, the reactance is very high and
considered as open. But at very high frequencies, the reactance decreases and appear parallel to input &
output capacitances and provides leakage path , hence voltage gain reduces.
The frequency at which gain is 1/√2 is corner frequency, break frequency or half power frequency. Lower
corner frequency is designated as f1 or fLand higher corner frequency is designated as f2 or fH. Difference
between f2 and f1 is called as bandwidth.
Semilog :- Normally we measure the amplifier gain and phase shift (on y-axis) with respect to wide range of
frequency (on x-axis). As the range of frequency is very large, log scale is used on x-axis as shown below.
Ex Range of 100 to 10
8 can be reduced to 0 to 8 if log value is considered.
• Verti
cal scale- linear scale with equal divisions
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• The distance from log101=0 to log102 is 30% of the span.
• Important to note the resulting numerical value and the spacing, since plots will typically only have
the tic marks.
• Plotting a function on a log scale can change the general appearance of the waveform as compared to
a plot on a linear scale.
• Straight line plot on a linear scale can develop a curve on a log scale.
• Nonlinear plot on a linear scale can take on the appearance of a straight line on a log plot.
Identifying the numerical values of the tic marks
on a log scale.
Decibels:-
Term decibel is used as the fact that power and audio levels are related on a logarithmic basis. P1, P2 –
power levels.
Bel- too large unit of measurement for practical purpose. The terminal rating of electronic
communication equipment is commonly in decibels. Decibels- is a measure of the difference in
magnitude between two power levels.
Advantages of the logarithmic relationship, it can be applied to cascade stages.
In normalized graph, Y axis value is Gain / Mid band gain, so, the mid band Y value will be 1 and 0dB
if gain is taken in dB value, as shown in the following graphs.
4.2 Low frequency Analysis :- using high pass RC circuit
RC combination that will define a low-cutoff frequency.
ndBdBdBdBdB
1
210dB
600Ω
210dBm
1
210dB
1
210
G........GGGG
(dB) V
V20logG
1mW
P10logG
bel 1 dB 10 as (dB) P
P10logG and (bel)
P
PlogG
321T
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At high frequencies,
At 0 Hz ,
So at high frequencies, Vo =Vi and at 0 Hz, Vo = 0V
A low frequency, the reactance of the capacitive becomes very large, so a significant portion of a signal
dropped across them. Then as the frequency approaches zero or at dc, the capacitive reactance approach
infinity or become an open circuit. As the frequency increases, the capacitive reactance decreases and
more of the input voltage appears across the output terminals.
At lower frequencies, as value of Xc can be ignored,
At frequency f1 Xc = R
Then
So at f1, Gain reduces by 0.707 of Av mid band.
At this frequency, f1 :-
By taking dB value
0ΩπfC2
1XC
ΩCπ(0)2
1
πfC2
1XC
XcR
RViVo
XcR
R
Vi
VoAv
22Av(mag)
CXR
RR
Xc1tanshift Phase
2
1
2Av(mag)@f
221
R
R
RR
R
RCf12
1Xc
RCfSo
2
11,
f
fshiftPhase
fffCRRXcXR
R
C
1tan
)/(1
1
)21(1
1
)(1
1ffAv(mag)at
1
2
1
22221
)/log(20ff vdB(mag)at,
/)/(1,f.....
])/(1log[10])/(1log[20)/(1
1log20fft AvdB(mag)a
11
111
2
1
2/12
12
1
1
ffAThen
fffffWhen
ffffff
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Then draw two straight lines namely asymptotes
1) For f >f1, AvdB = 0dB Phase shift = 00
2) f ≤ f1 , find Avdb for various frequencies for f1 and below and draw the line
Frequency
Ratio f1/f AvdB=-20log f1/f Phase shift, θ= tan-1
f1/f
f1 1 0 450
f1/2 2 -6dB 63.430
f1/4 4 -12dB 75.960
f1/10 10 -20dB 84.280
f1/100 100 -40 dB 89.420
After drawing the two lines , locate -3dB point for f1 and draw the actual frequency response graph through
this -3dB point. The frequency response graph is as shown below:
The above plot is called Bode plot of the magnitude vs frequency. It is defined as the linear plot of the
asymptotes and associated break points.
A change in a frequency by a factor of 2 is one octave and a change in frequency by a factor of 10 is called
one decade.
From the table, it is clear that, as the frequency decreases, phase shift increases at lower frequencies and
approaches to 900 and for f>f1, phase shift is 0
0
Typical Bode plot for f1 = 318.5 Hz.
Steps to follow in drawing Bode plot for Av mag
1. Determine the break frequency using RC
f2
11
2. Plot f1 point on the log scale. 3. Draw straight-line segment (slope) from f1 point to -20dB at linear scale. 4. In the same figure, draw straight-line for the condition of 0dB. For f > f1 5. When f= f1 , there is a 3dB drop from the mid-band level. Plot this point.
6. Find the 3dB point corresponding to f1 and sketch the curve
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Phase shift :- Even with the above RC circuit, phase shift
approaches to zero as f>>f1
450 when
f=f1
Approaches to 900 as f<<f1
Low frequency Response – BJT amplifier
At low frequencies Coupling capacitors (Cs, CC) and Bypass capacitors (CE) will have capacitive reactance
(XC) that affect the circuit impedances.
Coupling Capacitor - CS
→→
Cut of frequency, where,
Coupling Capacitor – CC
sis
Ls)CR(R2
1f
βre)||R||R(R 21i Rs
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where
Bypass Capacitor - CE
Cut off frequency , where and
To find Lower corner frequency of the amplifier, f1 :- Let fLE > fLo > fLs
The Bode plot indicates that each capacitor may have a different cutoff frequency fLE, fLs, fLo
oCo r||RR)CoR(R2
1f
Lo
Lo
EeL
CR2
1f
E π )rβ
R(||RR e
sEe
21ss R||R||RR
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It is the device that has the highest of the low cutoff frequency (fL) that dominates the overall frequency
response of the amplifier (fLE).
The Bode plot not only indicates the cutoff frequencies of the various capacitors it also indicates the amount
of attenuation (loss in gain) at these frequencies.
The amount of attenuation is sometimes referred to as roll-off.
The roll-off is described as dB loss-per-octave or dB loss-per-decade.
dB/Decade refers to the attenuation for every 10-fold change in frequency. For Low Frequency Response
attenuations it refers to the loss in gain from the lower cutoff frequency to a frequency 1/10th the lower
cutoff frequency.
-dB/Octave refers to the attenuation for every 2-fold change in frequency.
For Low Frequency Response attenuations it refers to the loss in gain from the lower cutoff frequency to a
frequency 1/2 the lower cutoff frequency.
Draw the frequency response Bode plot for fLE ie. Highest frequency (among , fLE, fLs, fLo , ) by drawing
0dB line > fLE and -6db line < fLE , upto next higher frequency fLo .After this frequency , change the slope of
this line to -12dB/octave as shown in the given fig.above
Then identify -3dB point at fLE and draw a frequency response curve through this point.
4.3 Miller Effect Capacitance
Any P-N junction can develop capacitance. This was mentioned in the chapter on diodes.
In a BJT amplifier this capacitance becomes noticeable between:
the Base-Collector junction at high frequencies in CE BJT amplifier configurations and the Gate-Drain
junction at high frequencies in CS FET amplifier configurations.
It is called the Miller Capacitance. It effects the input and output circuits.
Derivation of CMi
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)1(2
1
11
)1/(
11)1(11
)11
(
21
AvCfandCfC
whereX
XRiAvXRiX
Av
RiZi
X
Av
Rivi
X
ViAvVi
Ri
Vi
X
VoVi
Ri
Vi
Zi
Vi
IIIi
Mi
Mi
CM
iCMfCfC
fCfCfC
The above expression indicates that, input capacitance is increased by (1-Av) of feedback capacitance. This
effect is more concern in inverting amplifier where Av is negative and then
CMi = (1-(-Av))Cf = (1+Av)Cf a bigger value. In non-inverting amplifier, CMi is –ive as Av>>1 So there is
no increase in input capacitance.
Derivation of CMo
))/1(1(2
1
11
)/11/(
11))/1(1(11
))/1(11
()/(
21
AvCfandCfC
whereX
XRoAvXRoX
Av
RoZo
X
Av
RoVo
X
AvVoVo
Ro
Vo
X
ViVo
Ro
Vo
Zo
Vo
IIIo
Mo
Mo
CMo
oCMfCfC
fCfCfC
From the above derivation, it is clear that, output capacitance is increased by Cf only as 1/Av <<1 so, 1-
(1/Av) ~ 1 irrespective of whether it is inverting or non inverting amplifier.
In BJT, note that the amount of Miller Capacitance is dependent on interelectrode capacitance from input to
output (Cf) and the gain (Av).
Capacitances that will affect the high-frequency response:
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• Cbe, Cbc, Cce – internal capacitances
• Cwi, Cwo – wiring capacitances
•
Ac equivalent circuit for high frequency response is as shown below
4.4 High-frequency ac equivalent model for the network
Thevenin equivalent circuit for the input circuits.
Thevenin equivalent circuits for the output circuits.
Cut-off frequency for input circuits:
Cut-off frequency for output circuits:
fvMi )CA(1C f
v
Mo )CA
1(1C
bcvbeWiMibeWi CACCCCCCi )1(
MoceWo CCCCo
iThi
HiCR2
1f
π
oTho
HoCR2
1f
π
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• fL – produce by coupling & bypass capacitor at low frequency.
• fH – produce by interelectrode capacitance at high frequency
• Dominant frequencies are referred to as the lower critical frequency fL and the upper critical
frequency fH
• fH and fL are also called the half-power frequencies because power at fH and fL are half of mid band
power as shown below.
midbandmiduencycornerfreq
midmid
uencycornerfreq
midmidband
PoViAvPo
RViAvViAv
Po
RViAvRVoPo
)2
1()*()
2
1(
/)*()2
1()
2
*(
/)*(/
2
22
2
22
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Question paper with solution
1) Draw the small signal high frequency CE significance of each component in' the model.
model for a transistor and explain the Jan 2004 (7), Jan 2008 (12)
2) Drive an expression for transistor transconductance gill and input conductance g b'e'
Jan 2004 (10), July 2007 (10)
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4 Draw hybrid-IT. model for C.E. transistor and explain the significance of each component in the model.
Jan2004 (6) Jan 2005 (6), July 2008 (6)
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5) Obtain an expression in terms of 'h' parameters for a transistor as a two-port network. Using the above
developed equations obtain the hybrid model of CE, CC and CB configurations July 2007(7),
Jan2009(6)
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6) A transistor is connected as a common emitter amplifier driving a load of 10 k. It is supplied by a source
of 1 kQ internal resistance. The 'h' parameters are hIe = 1.1 k July2007 (10)
,
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Recommended Questions:
1. Derive the low frequency analysis of transistor using bode plot. 2. What are the components determine the low frequency response.
Derive the low frequency response for loaded BJT amplifier. 3. Define the Miller effect capacitance and Derive the equation for it 4. List the factors which determine/effect the high frequency response of BJT amplifier.
Explain each
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Unit: 5 Hrs: 6
(a) General Amplifiers: Cascade connections, Cascode connections, Darlington connections.
1. ―Electronic Devices and Circuit Theory‖, Robert L. Boylestad and Louis Nashelsky, PHI/Pearson
Eduication. 9TH Edition.
REFERENCE BOOKS:
1. ‗Integrated Electronics‘, Jacob Millman & Christos C. Halkias, Tata - McGraw Hill, 1991 Edition
2. ―Electronic Devices and Circuits‖, David A. Bell, PHI, 4th Edition, 2004
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7.1 Introduction:
Positive feedback drives a circuit into oscillation as in various types of oscillator circuits. A typical feedback connection is shown in Fig. 7.1. The input signal, Vs, is ap- plied to a mixer network, where it is combined with a feedback signal, Vf. The difference of these signals, Vi, is then the input voltage to the amplifier. A portion of the amplifier output, Vo, is connected to the feedback network ( ), which provides a reduced portion of the output as feedback signal to the input mixer network
If the feedback signal is of opposite polarity to the input signal, as shown in Fig. 18.1, negative
feedback results. While negative feedback results in reduced overall voltage gain, a number of improvements are obtained, among them being:
1. Higher input impedance. 2. Better stabilized voltage gain. 3. Improved frequency response. 4. Lower output impedance. 5. Reduced noise. 6. More linear operation. .
The use of positive feedback that results in a feedback amplifier having closed-
loop gain |Af | greater than 1 and satisfies the phase conditions will result in operation as an oscillator circuit. An oscillator circuit then provides a varying output signal. If the output signal varies sinusoidally, the circuit is referred to as a sinusoidal oscillator. If the output voltage rises quickly to one voltage level and later drops quickly to an- other voltage level, the circuit is generally referred to as a pulse or square-wave oscillator.
consider the feed- back circuit of Fig. 18.18. When the switch at the amplifier input is open, no oscil- lation occurs. Consider that we have a fictitious voltage at the amplifier input (Vi). This results in an output voltage Vo AVi after the amplifier stage and in a voltage Vf (AVi) after the feedback stage. Thus, we have a feedback voltage Vf AVi, where A is referred to as the loop gain. If the circuits of the base amplifier and feed- back network provide A of a correct magnitude and phase, Vf can be made equal to Vi. Then, when the switch is closed and fictitious voltage Vi is removed, the circuit will continue operating since the feedback voltage is sufficient to drive the amplifier and feedback circuits resulting in a proper input voltage to sustain the loop operation. The output waveform will still exist after the switch is closed if the condition
A β = 1 is met. This is known as the Barkhausen criterion for oscillation.
7.2 PHASE-SHIFT OSCILLATOR
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An example of an oscillator circuit that follows the basic development of a feedback circuit is the phase-shift oscillator. An idealized version of this circuit is shown in Fig. Recall that the requirements for oscillation are that the loop gain, A, is greater than unity and that the phase shift around the feedback network is 180° (pro- viding positive feedback). In the present idealization, we are considering the feedback network to be driven by a perfect source (zero source impedance) and the output of the feedback network to be connected into a perfect load (infinite load impedance). The idealized case will allow development of the theory behind the operation of the phase-shift oscillator. Practical circuit versions will then be considered.
If a transistor is used as the active element of the amplifier stage, the output of the feedback network is loaded appreciably by the relatively low input resistance (hie) of the transistor. Of course, an emitter-follower input stage followed by a common-emit- ter amplifier stage could be used. If a single transistor stage is desired, however, the use of voltage-shunt feedback (as shown in Fig. 18.21b) is more suitable. In this con- nection, the feedback signal is coupled through the feedback resistor R in series with the amplifier stage input resistance (Ri).
Analysis of the ac circuit provides the following equation for the resulting oscil- lator frequency:
fr = 1/2√π6RC
7.3 WIEN BRIDGE OSCILLATOR A practical oscillator circuit uses an op-amp and RC bridge circuit, with the oscilla- tor frequency set by the R and C components. Figure 18.23 shows a basic version of a Wien bridge oscillator circuit. Note the basic bridge connection. Resistors R1 and R2 and capacitors C1 and C2 form the frequency-adjustment elements, while resistors R3 and R4 form part of the feedback path. The op-amp output is connected as the bridge input at points a and c. The bridge circuit output at points b and d is the in- put to the op-amp.
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R and C are used for frequency adjustment and resistors R1 and R2 form part of the feedback path.
If R3 = R4 =R, C1 = C2 = C, the resulting frequency is f = 1/2πRC and R2 / R1 = 2
7.4 TUNED OSCILLATOR CIRCUIT
Tuned-Input, Tuned-Output Oscillator Circuits
A variety of circuits can be built using that shown in Fig. 18.25 by providing tuning in both the input and output sections of the circuit. Analysis of the circuit of Fig. reveals that the following types of oscillators are obtained when the reactance elements are as designated:
Oscillator Type
Reactance Element
X1
X2
X3
Colpitts oscillator
Hartley oscillator
Tuned input, tuned output
C
L
LC
C
L
LC
L
C
—
Colpitts Oscillator
A transistor Colpitts oscillator circuit can be made as shown in Fig.
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Hartley Oscillator
Below figure shows a transistor Hartley oscillator circuit
7.5 CRYSTAL OSCILLATOR
A crystal oscillator is basically a tuned-circuit oscillator using a piezoelectric crystal as a resonant tank circuit. The crystal (usually quartz) has a greater stability in hold- ing constant at whatever frequency the crystal is originally cut to operate. Crystal os- cillators are used whenever great stability is required, such as in communication trans- mitters and receivers.
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Characteristics of a Quartz Crystal
A quartz crystal (one of a number of crystal types) exhibits the property that when mechanical stress is applied across the faces of the crystal, a difference of potential develops across opposite faces of the crystal. This property of a crystal is called the piezoelectric effect. Similarly, a voltage applied across one set of faces of the crystal causes mechanical distortion in the crystal shape.
When alternating voltage is applied to a crystal, mechanical vibrations are set up—these vibrations
having a natural resonant frequency dependent on the crystal. Although the crystal has electromechanical resonance, we can represent the crystal action by an equivalent electrical resonant circuit as shown in Fig. 18.31. The induc- tor L and capacitor C represent electrical equivalents of crystal mass and compliance, while resistance R is an electrical equivalent of the crystal structure‘s internal fric- tion. The shunt capacitance CM represents the capacitance due to mechanical mount- ing of the crystal. Because the crystal losses, represented by R, are small, the equiv- alent crystal Q (quality factor) is high—typically 20,000. Values of Q up to almost 106 can be achieved by using crystals.
The crystal as represented by the equivalent electrical circuit of Fig. 18.31 can have two resonant frequencies. One resonant condition occurs when the reactances of the series RLC leg are equal (and opposite). For this condition, the series-resonant impedance is very low (equal to R). The other resonant condition occurs at a higher frequency when the reactance of the series-resonant leg equals the reactance of ca- pacitor CM. This is a parallel resonance or antiresonance condition of the crystal. At this frequency, the crystal offers a very high impedance to the external circuit. The impedance versus frequency of the crystal is shown in Fig. 18.32. In order to use the crystal properly, it must be connected in a circuit so that its low impedance in the se- ries-resonant operating mode or high impedance in the antiresonant operating mode is selected.
Electrical equivalent circuit of a crystal.
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Crystal impedance ersus frequency.
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Question paper with solutions:
1. Explain with the help of a circuit diagram, the working of an RC phase shift oscillator
. July 2008(8),jan2009(8)
The RC Phase Shift Oscillator:
At low frequencies (around 100 KHz or less), resistors are usually employed to determine the frequency
oscillation. Various circuits are used in the feedback circuit including ladder network.
Figure: Circuit diagram of RC phase shift Oscillator
It consists of a conventional single transistor amplifier and a RC phase shift circuit. The RC phase
shift circuit consists of three sections R1C1, R2C2, and R3C3.At some particular frequency f0 the phase
shift in each RC section is 600 so that the total phase shift produced by the RC network is 180
0. The
frequency of oscillation is given by
62
1
RCfo ---------------------------(6)
When the circuit is switched ON it produces oscillations of frequency determined by equation 1. The
output EO of the amplifier is feedback to RC feedback network. This network produces a phase shift
of 1800 and the transistor gives another 180
0 shift. Thereby total phase shift of the output signal when
fed back is 3600
Merits-
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1. They do not require any transformer or inductor thereby reduce the cost.
2. They are quite useful in the low frequency range where tank circuit oscillators cannot be
used.
3. They provide constant output and good frequency stability.
Demerits –
1. It is difficult to start oscillations.
2. The circuit requires a large number of components.
3. They cannot generate high frequencies and are unstable as variable frequency generators.
2 With the help of Barkhousen criterion, explain the working of a BJT crystal oscillator.
July 2008
Barkhausen criterion.
We know that the active component in a feedback amplifier produces a voltage gain (Av)) while the
feedback network introduces a loss or attenuation (αv). In order for an oscillator to work properly, the
following relationship must be met:
Av αv = 1 Av
This relationship is called the Barkhausen criterion. If this criterion is not met, one of the following occurs:
1. If Av αv < 1 , the oscillations die out after a few cycles.
2. If Av αv > 1 , the oscillator drives itself into saturation and cutoff clipping.
The Barkhausen criterion for oscillations can be summarized as follows :
In order to make a circuit to work as an oscillator it should satisfy the following Barkhausen criterion
1.The total phase shift around a loop should be 0 or 360°.
4) With the help of a neat circuit diagram, explain transistor colpitts oscillator. Write the
expression for the frequency of oscillation.
July 2008 (08)
The Colpitts Oscillator: The Colpitts oscillator is a discrete LC oscillator that uses the tank circuit described
above.A pair of tapped capacitors and an inductor is used to produce regenerative feedback. A Colpitts
oscillator is shown in Figure -5. The operating frequency is determined by the tank circuit. By the formula:
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The key to understanding this circuit is knowing how the feedback circuit produces its 180° phase shift and
the other 180° is produced from the inverting action of the CE amplifier. The feedback circuit produces a
180° voltage phase shift as follows:
1. The amplifier output voltage is developed across .
2. The feedback voltage is developed across .
3. As each capacitor causes a 90° phase shift, the voltage at the top of (the output voltage) must be
180° out of phase with the voltage at the bottom of (the feedback voltage).
The first two points are fairly easy to see. is between the collector and ground. This is where the output is
measured.
is between the transistor base and ground, or in other words, where the input is measured. Point three is
explained using the circuit in Figure -6.
FIGURE -6
Figure 6 is the equivalent representation of the tank circuit in the Colpitts oscillator. Let‘s assume that the
inductor is the voltage source and it induces a current in the circuit. With the polarity shown across the
inductor, the current causes potentials to be developed across the capacitors with the polarities shown in the
figure. Note that the capacitor voltages are 180° out of phase with each other. When the polarity of the
inductor voltage reverses, the current reverses, as does the resulting polarity of the voltage across each
capacitor (keeping the capacitor voltages 180° out of phase).
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The value of the feedback voltage is determined (in part) by the of the circuit. For the Colpitts oscillator,
is defined by the ratio of . By formula:
Av = XC2/X C1 or C 1/C 2
As with any oscillator, the product of A β must be slightly greater than 1. As mentioned earlier
and . Therefore:
Av = Vout/Vf = C2/C1
As with any tank circuit, this one will be affected by a load. To avoid loading effects (the circuit loses some
efficiency), the output from a Colpitts oscillator is usually transformer-coupled to the load, as . Capacitive
coupling is also acceptable so long as:
where is the total capacitance in the feedback network
5) With the help of new circuit diagram of Crystal oscillator, explain briefly
July 2008 (10)
Figure: Circuit diagram of Transistor crystal oscillator
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Figure shows the transistor crystal oscillator. The crystal will act as parallel –tuned circuit. At parallel
resonance, the impedance of the crystal is maximum. This means that there is a maximum voltage
drop across C2. This in turn will allow the maximum energy transfer through the feedback network.
The feedback is +ve. A phase shift of 1800 is produced by the transistor. A further phase shift of 180
0
is produced by the capacitor voltage divider. This oscillator will oscillate only at fp.
Where fp = parallel resonant frequency ie the frequency at which the vibrating crystal behaves as a
parallel resonant circuit.
m
m
T
T
p
CC
CCCwhere
LCf
2
1
Advantages
1. Higher order of frequency stability
2. The Q-factor of the crystal is very high.
Disadvantages
1. Can be used in low power circuits.
2. The frequency of oscillations cannot be changed appreciably.
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Recommended Questions:
1. Explain with the help of a circuit diagram, the working of an RC phase shift oscillator(08 Marks)
2. With the help of Barkhousen criterion, explain the working of a BJT crystal oscillator.(08 Marks)
3 Calculate the frequency of a Wien Bridge oscillator circuit when R = 12 k ohm and
C = 2400 pf. (04 Marks)
4. What is Barkhausen criterion? Explain how oscillations start in an oscillator. (07 Marks)
5. With the help of a neat circuit diagram, explain transistor colpitts oscillator. Write the expression for the
frequency of oscillation. (08 Marks)
6 A quartz crystal has L = 0.12 H, C = 0.04 pF CM = pF and R = 9.2 kQ. Find i) Series resonant
frequency, ii) Parallel resonant frequency.
7 Write the short notes on LC ,RC &Hartely oscillator
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Unit: 8 Hrs: 7
FET Amplifiers: FET small signal model, Biasing of FET, Common drain common gate configurations,
MOSFETs, FET amplifier networks.
Recommended readings:
TEXT BOOK:
1. ―Electronic Devices and Circuit Theory‖, Robert L. Boylestad and Louis Nashelsky, PHI/Pearson
Eduication. 9TH Edition.
REFERENCE BOOKS:
1. ‗Integrated Electronics‘, Jacob Millman & Christos C. Halkias, Tata - McGraw Hill, 1991 Edition
2. ―Electronic Devices and Circuits‖, David A. Bell, PHI, 4th Edition, 2004
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8.1 Field Effect Transistor (FET)
The FET is a three terminal device like the BJT, but operates by a different principle. The three terminals are
called the source, drain, and gate. The voltage applied to the gate controls the current flowing in the source-
drain channel. No current flows through the gate electrode, thus the gate is essentially insulated from the
source-drain channel. Because no current flows through the gate, the input impedance of the FET is
extremely large (in the range of 1010
–1015
Ω). The large input impedance of the FET makes them an
excellent choice for amplifier inputs.
The two common families of FETs, the junction FET (JFET) and the metal oxide semiconductor FET
(MOSFET) differ in the way the gate contact is made on the source-drain channel.
In the JFET the gate-channel contact is a reverse biased pn junction. The gate-channel junction of the JFET
must always be reverse biased otherwise it may behave as a diode. All JFETs are depletion mode devices—
they are on when the gate bias is zero (VGS = 0).
In the MOSFET the gate-channel contact is a metal electrode separated from the channel by a thin layer of
insulating oxide. MOSFETs have very good isolation between the gate and the channel, but the thin oxide is
easily damaged (punctured!) by static discharge through careless handling. MOSFETs are made in both
depletion mode (on with zero biased gate, VGS = 0) and in enhancement mode (off with zero biased gate).
In this class we will focus on JFETs.
Schematic symbols. Two versions of the symbols are in common use. The symbols in the top row depict
the source and drain as being symmetric. This is not generally true. Slight asymmetries are built into the
channel during manufacturing which optimize the performance of the FET. Thus it is necessary to
distinguish the source from the drain. In this class we will use the asymmetric symbols found on the bottom
row, which depict the gate nearly opposite the source. The designation n-channel means that the channel is n
doped and the gate is p doped. The p-channel is complement of n-channel.
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Common Nomenclature (n-channel FET example).
Regions of JFET operation:
Cut-off region: The transistor is off. There is no conduction between the drain and the source when the
gate-source voltage is greater than the cut-off voltage. (ID = 0 for VGS > VGS,off)
Active region (also called the Saturation region): The transistor is on. The drain current is controlled by
the gate-source voltage (VGS) and relatively insensitive to VDS. In this region the transistor can be an
amplifier.
In the active region:
Ohmic region: The transistor is on, but behaves as a voltage controlled resistor. When VDS is less than in
the active region, the drain current is roughly proportional to the source-drain voltage and is controlled by the
gate voltage.
In the ohmic region:
Common Specifications.
IDSS is the drain current in the active region for VGS = 0. (ID source shorted to gate)
VGS,off is the minimum VGS where ID = 0. VGS,off is negative for n-channel and positive for p-channel..
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gm is the transconductance, the change in ID with VGS and constant VDS.
Common Circuit Applications:
Voltage Controlled Switch. For the on state the gate voltage VGS = 0 and for the off state |VGS| > |VGS,off| (of
greater magnitude than VGS,off and with the same sign). The sign of the voltage depends on the type of FET,
negative for n-channel and positive for p-channel.
Current Source. The drain current is set by RS such that VGS = IDRS. Any value of current can be chosen
between zero and IDSS (see the ID vs VGS graph for the JFET).
Source Follower. The simple source follower is shown below. The improved version is shown at the right.
The lower JFET forms a current source. The result is that VGS is held constant, removing the defects of the
simple circuit.
Analog Electronic Circuits 10ES32
SJBIT/ECE Page 228
Voltage-Controlled Resistor. VGS must be between zero and
VGS,off.
JFET Diode. The JET pn gate junction can be used as a diode by connecting the source and the drain
terminals. This is done if very low reverse leakage currents are required. The leakage current is very low
because the reverse leakage current scales with the gate area. Small gate areas are designed into JFETs
because it decreases the gate-source and the gate-drain capacitances
.
Unlike BJTs, thermal runaway does not occur with FETs, as already discussed in our blog. However, the
wide differences in maximum and minimum transfer characteristics make ID levels unpredictable with
simple fixed-gate bias voltage. To obtain reasonable limits on quiescent drain currents ID and drain-source
voltage VDS, source resistor and potential divider bias techniques must be used. With few exceptions,