1 Thursday, July 06, 2006 “Experience is something you don't get until just after you need it.” - Olivier.

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Thursday, July 06, 2006

“Experience is something you don't get until just after you

need it.”

- Olivier

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ExamplePt = Probability of TLB miss = 0.1Pf =Probability of page fault when TLB miss

occurs = 0.0002Tt = time to access TLB = 0.1 µsec Tm = time to access memory = 1 µsecTd = time to transfer page to or from disk=10msPd = Probability that page is dirty when replaced

=0.5

What is the effective access time for a memory reference?

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Global vs. Local Allocation

Global replacement – process selects a replacement frame from the set of all frames; one process can take a frame from another.

Local replacement – each process selects from only its own set of allocated frames.

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Global vs. Local Allocation

Global replacement Process cannot control its own fault rate Set of pages allocated depends on paging

behavior of other processes Slow down due to external circumstances More commonly used technique

Local replacement Cannot make use of less used pages of other

processes

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We must have enough frames to hold all the different pages that a single instruction can reference.

Defined by instruction set architecture

Allocating only the minimum results in very high paging activity

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Thrashing occurs when a process is spending more time paging than executing.

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Thrashing

If a process does not have “enough” pages, the page-fault rate is very high. This leads to: low CPU utilization. operating system thinks that it needs to increase

the degree of multiprogramming. another process added to the system.

Thrashing a process is busy swapping pages in and out.

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Thrashing

Queue of paging device remains a problem in local replacement algorithm

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Thrashing

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•Why does paging work?

Locality model•Process migrates from one locality to another.•Localities may overlap.

•Why does thrashing occur? size of locality > total memory size

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Working-Set Model working-set window most recent page references

WSSi (working set of Process Pi) =total number of pages referenced in the most recent (varies in time) if too small will not encompass entire locality. if too large will encompass several localities. if = will encompass entire program.

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Working-Set ModelD = WSSi total demand frames

if D > m ThrashingPolicy if D > m, then suspend one of

the processes.

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Working-set model

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Keeping Track of the Working SetApproximate with interval timer + a reference bitExample: = 10,000

Timer interrupts after every 5000 time units. Keep in memory 2 bits for each page. Whenever a timer interrupts copy and sets the values

of all reference bits to 0. If one of the bits in memory = 1 page in working

set.

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Keeping Track of the Working Set

Improvement = 10 bits and interrupt every 1000 time units.

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Page-Fault Frequency Scheme

Establish “acceptable” page-fault rate. If actual rate too low, process loses frame. If actual rate too high, process gains frame.

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1. CPU utilization = 13%, Paging Disk Utilization = 97%

2. CPU utilization = 87%, Paging Disk Utilization = 3%

3. CPU utilization = 13%, Paging Disk Utilization = 3%

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What will improve the CPU utilization?

CPU utilization 20% Paging disk 97.7% Other I/O devices 5%1. Install a bigger paging disk?2. Increase degree of multiprogramming?3. Decrease degree of multiprogramming?4. Install more memory?5. Install faster hard disk?6. Increase page size?

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Other ConsiderationsProgram structureDemand paging is designed to be transparent

to userSometimes system performance can be

improved if user (or compiler) is aware of underlying demand paging

Careful selection of data structures increases locality and hence lower page fault rate and number of pages in the working set.

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Other ConsiderationsProgram structureStack has good localityHash table produces bad locality by

scattering referencesHowever, locality of reference is just one

measure of efficiency of use of data structure. Other heavily weighted factors include total number of memory references and total number of pages touched.

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Other ConsiderationsProgram structureCompiler and loader can have significant

effect on paging. Loader can avoid placing routine across

page boundaries, keeping each routine in a page

Routines that call each other can be packed into same page.

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Program structure (Assume: Less than 1024 pages are allocated the process). A = 1024 x 1024 integer array Each row is stored in one page Program 1 for (j = 0; j < A.length; j++)

for (i = 0; i < A.length; i++)A[i,j] = 0;

Program 2 for (i = 0; i < A.length; i++)for (j = 0; j < A.length; j++)

A[i,j] = 0;

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Program structure (Assume: Less than 1024 pages are allocated the process). A = 1024 x 1024 array Each row is stored in one page Program 1 for (j = 0; j < A.length; j++)

for (i = 0; i < A.length; i++)A[i,j] = 0;

1024 x 1024 page faults Program 2 for (i = 0; i < A.length; i++)

for (j = 0; j < A.length; j++)A[i,j] = 0;

1024 page faults

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Program structure A = 100 x 100 array

for (j = 0; j < 100; j++) for (i = 0; i < 100; i++) A[i,j] = 0;

Array is stored row major Page size is 400 bytes 4 frames are allocated to the process. One array element takes 1 byte of space Use LRU page replacement

What are the number of page faults?

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Other ConsiderationsI/O interlockLock bit associated with each frameAnother use: decide to prevent replacing a

newly brought in page until it is used at least once.

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Swap space

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User’s View of a Program

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Logical View of Segmentation

1

3

2

4

1

4

2

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user space physical memory space

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Segmentation Architecture Logical address consists of a two tuple:

<segment-number, offset>,Segment table – maps two-dimensional physical addresses; each table

entry has: base – contains the starting physical address where the segments

reside in memory. limit – specifies the length of the segment.

Segment-table base register (STBR) points to the segment table’s location in memory.

Segment-table length register (STLR) indicates number of segments used by a program;

segment number s is legal if s < STLR.

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Segmentation Hardware

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Example of Segmentation

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Given a system that uses segmentation, for the following process, give the physical address for the following logical addresses

<0,430> <4,112>

Segment Base Length

0 219 600

1 2300 14

2 90 100

3 1327 580

4 1952 96

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Protection and Sharing of Segments

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FragmentationCaching issues similar to paging

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Process in one segmentFixed segmentsVariable segments

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Combined schemes