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Surface Science 607 (2013) 97–105

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Surface Science

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Surface Science Prospectives

Surface science of free standing semiconductor nanowires

A. Mikkelsen ⁎, E. LundgrenDepartment of Physics, Lund University, P.O. Box 118, 22 100 Lund, Sweden

⁎ Corresponding author. Fax: +46 462224221.E-mail address: [email protected] (A. Mik

0039-6028/$ – see front matter © 2012 Elsevier B.V. Allhttp://dx.doi.org/10.1016/j.susc.2012.08.002

a b s t r a c t

Available online 17 August 2012

Keywords:NanowiresSemiconductorsSTMXPSPEEMLEEM

Due to the wide range of possible applications, there is a strong current interest in semiconductor nanowires,that began around the start of the millennia. As a result, a number of important new surface science chal-lenges of both fundamental and practical nature have emerged. Surfaces govern important processes fornanowire growth, physical properties and the ability of nanowires to interact with their surroundings. How-ever, experimental studies of nanowire surfaces are difficult as many important surface science tools are notwell suited to access these highly one dimensional objects. Still, recent studies has shown that, by designingexperiments in an appropriate fashion, it is possible to both uniquely contribute to the understanding of theseed particle driven growth of nanowires and to explore the surfaces of nanowires with crystal structures andmaterials combinations not found in the bulk. In this prospective, recent results obtained using surface sen-sitive electron microscopy/spectroscopy and scanning tunneling microscopy will be highlighted and futuredirections will be discussed.

© 2012 Elsevier B.V. All rights reserved.

1. Introduction

1D free-standing semiconductor nanostructures, in the form ofnanowires and nanotubes, have the potential to become central com-ponents in future electronics and photonics applications within infor-mation technology, renewable energy and life-sciences [1–5]. These1D nanostructures have been grown in virtually all types of materials,ranging from one component carbon and silicon to compound semi-conductors and complex oxides. This has led to a plethora of highlyoriginal structures with completely novel crystal structures, combina-tions of materials, and 3D architectures [1–7].

One serious challenge though is the control and characterizationof their surface structure, chemistry and morphology. 1D nanostruc-tures will have very large surface to bulk ratios, ultimately reaching100% for the single walled carbon nanotube. Even for a 100 nm di-ameter Si wire, the outermost atom layer will make out only ~4% ofthe total number of atoms. Compared to typical doping levels, this isa very significant amount of material. Accordingly surfaces and in-terfaces will play important roles in determining the wire physicalproperties and will certainly be crucial in fulfilling any promisesmade on using nanowires as sensors [8–10]. For semiconducting wires,especially important are effects such as surface band bending (whichcan completely dominate electrical properties), electron/hole traps atthe surface (which will strongly affect optical performance) and thesevere problem of proper (Ohmic) electrical contacts for nanowire de-vices [1,3,10]. The large surface areas also have positive implications, aswires can be used as extremely delicate sensors, and electric field

kelsen).

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control in transistors is possible to a much more extensive degree[5,11]. In addition, the contact area to other functional componentscan be high and varying the surface chemistry along the wire can beused in the design of electronic devices.

Unfortunately, while the study of surfaces is highly relevant for thenanowires, surface studies of these objects are still much less commonthan their 2D or even 0D counterparts. This is presumably because, forsurface science experimentalists, they present a worst-case scenario—most of our methods are best suited for semi-infinite 2D flat surfaces.One central problem is the different length scales involved: in one di-rection wires will be perhaps 20 nm across a facet, while they can beseveral 1000 nm long in the growth direction and finally we will behunting features where a precision of 0.01 nm is often desired. Scan-ning probe microscopy (SPM) techniques have serious problems withthe aspect ratio of the wires (definitely when a wire is standing up,but also lying down). Further, because wires have little attachment tothe substrates, they are often very mobile, and we tend to move themaround. For our surface averaging techniques such as X-ray photoemis-sion spectroscopy (XPS) and low energy electron diffraction (LEED),the as-grown wires, which are standing straight up, are really not veryaccessible. Nanowires dispersed on the surface often make out onlya small percentage of the surface area (especially for a homogenousnanowire ensemble), and then aligning them to achieve a clear diffrac-tion signal is difficult. Nonetheless, with some efforts in tuning ourusual methods, and some imagination in sample preparation very in-formative surface studies can be performed on these objects, as willbe seen below.

It is relevant to distinguish between the light element carbonnanotube and boron nitride nanowires, the heavier element silicon,germanium and group III–V nanowires and finally the wide range of

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oxide nanowires that can be grown (including vanadium and zincbased oxide nanowires). In the present discussion we will focuson examples from the group IV and group III–V materials, but muchof the discussion will be relevant for the other types as well. Thegroup IV and III–V semiconductor nanowires can be grown using allcommon methods for semiconductor growth including molecularbeam epitaxy (MBE), chemical beam epitaxy (CBE) and metal organicvapor phase epitaxy (MOVPE) [12–14]. Typically nanowires aregrown using an Au seed particle, as seen in Fig. 1b. This particle actsas catalyst for the growth in the sense that epitaxial growth proceedsrapidly below the particle compared to the surrounding substrate.As a result, the particle also linearly determines the diameter of thenanowires [15]. Additional growth modes exist, which need no het-erogeneous seed particle. Instead, a particle consisting of one of thegrowth constituents can be stabilized and lead to nanowire growth[16–18] (seen in Fig. 1b as well). For nanowire growth a crucialpoint is control of the growth substrate and possibly the seed particlechemistry. This particular surface problem has led to a number of sur-face studies using both scanning probe [18–20] photoemission [17,21]and surface X-ray diffraction [22,23] based methods.

Silicon and III–V compounds are thematerials most commonly usedtoday for electronics components, and will surely also play a significantrole in future nanowire electronics and optoelectronics [24]. The largesurface to bulk ratios makes group IV and III–V nanowires suitable forsensors and for the electric field control needed in future generationsof high performance field effect transistors (FETs). Specific applicationswithin optoelectronics such as LEDs, photovoltaics and lasers are alsofar progressed [2]. While these nanowires do not have as spectacularproperties as the carbon nanotubes, their use as possible componentsin a wide range of future electronics and photonics has still been verysuccessfully demonstrated. These successes are based on the uniqueability to, in a controlled fashion, grow heterostructures of a very widevariety of materials combinations, resulting in a broad tunability inphysical properties—even within the same nanowire. This is in contrasttomany other types of nanostructures where properties can be difficultto control or the variability is small. Since the contact area of a 1D struc-ture across an axial interface is small, significantly strained and nor-mally incompatible materials can also be epitaxially combined. Nownanowires have already been grown in virtually all III–V material bi-nary combinations and even many ternaries. A broad variety of bothaxial and radial heterostructures combining these materials has also

Fig. 1. (a) Summary of important issues related to surface science for a nanowire device. The(bandbending and recombination) and connectivity to the outside world (molecular recogni(often Au) or an ultra thin SiOx layer is adsorbed on the surface. As a result, after introductionby the seed. (c) Schematic of basic nanowire device with metal top contact and growth snanowires grown via Au seed particles.

been demonstrated [25]. Importantly, for many applications, III–Vnanowires can be grown epitaxially on silicon substrates opening upthe possibility to incorporate III–V high speed and optics componentsdirectly with silicon chip technology [18].

Having access to one of the largest toolboxes to produce and charac-terize compound nanowires, at Lund University in Sweden, we decidedto take on the challenge of studying their surfaces. Interestingly, wehave progressively become more “brave,” starting by 2D planarizingthe nanowires by embedding them, to now using methods such asscanning tunneling microscopy (STM) directly on micrometer highnanowires standing straight up on the sample. At the same time, weare progressing towards performing surface science in increasinglyrealistic growth environments and in more realistic device configura-tions. We are certainly not the only ones taking the latter route andfor example for atomic wires on clean surfaces there have recentlybeen some extremely interesting studies combing STM and electricalmeasurements [26,27].

In conclusion we identify three main challenges for nanowireswhere surface science plays a crucial role:

A. Controlling growth: control of the nanowire nucleation event andcontrol of surface diffusion during growth (both along the sub-strate and on the wire)

B. Controlling 1D surfaces: control of band bending effects at nanowiressurfaces, suppression of carrier recombination at surfaces and inhi-bition of adsorption of unwanted species at the surface

C. Controlling 1D interfaces and interactions: creation of (ohmic) elec-trical contacts to the wires, surface functionalization for sensors,and tailoring of mechanical properties

To illustrate the nature of the challenges and possible solutions,we will provide specific examples on how a number of central surfacescience methods such as STM, XPS and photo emission/low energyelectron microscopy (PEEM/LEEM) can contribute to each of thesethree areas. We will discuss how surface science methods have tobe reconfigured to allow studies of 1D nanostructures instead ofthe semi-infinite 2D surface, for which they were originally devel-oped. Finally, we will discuss how experimental techniques shouldbe further developed in the future and identify some important issuesfor 1D semiconductor nanostructures, where surface science will con-tribute in the coming years.

se are related both to the nanowire growth (surface diffusion and chemistry), functiontion and metal contact barriers). (b) Nanowire growth. First either a metal seed particleinto the growth chamber, nanowires will grow with diameters and position controlled

ubstrate as bottom contact. (d) Scanning electron microscopy (SEM) image of 50 nm

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1.1. A. Controlling growth

The first relevant question of nanowire study is the question of thegrowth (mechanism) of nanowires. This is a highly active area of re-search which to some extent has had an initial engineering spirit toit, as trial-and-error methods were used to grow and optimize manyof the first nanowire structures. This however, quickly led to a desireto better understand the growth processes and to describe the under-lying fundamental growth mechanisms—to perhaps develop furtherimproved structures. Here classic experiments of varying growthparameters and checking resulting structures with SEM and trans-mission electron microscopy (TEM) have been extremely instructive[12]. However they are limited, in that while they show that surfacechemistry can play an important role for both the initial nanowirenucleation [28], and latter growth of the wire—one has to infer sur-face structure and chemistry indirectly. This has not only led to newsurface studies being performed, but also a “revival” of several oldersurface studies originally conducted for very different reasons. In par-ticular, the role of metals on semiconductor surfaces at elevated tem-peratures has gained new meaning when growth using metal seedparticles is all of a sudden an interesting topic.

In an important silicon nanowire growth study, Hannon et al. fromIBM [29] used work on Au surface diffusion and structure formationon silicon from the 90s and in addition performed LEEM surface stud-ies of Au particles on Si. As was stated in the paper by Hannon et al.,semiconductor nanowire growth models have to a large extent ig-nored a number of phenomena related to nanowires surfaces. Thusit is often assumed that material from the seed particle does not dif-fuse out and the nanowire surfaces and the growth substrates havefacets and structures, which are not influenced by the metal in theseeds. Also any faceting or surface effects on the seed particles or atthe seed particle/nanowire interface have largely been ignored ortreated in the most simplified manner. In the study by Hannon etal., it was however shown that in the case of Au seeded growth ofsilicon nanowires these assumptions were generally problematic. Acombination of surface sensitive low energy electron microscopy(LEEM) and TEM was used. Both these instruments were equippedwith in-situ silane sources and heating facilities; thus the nanowiregrowth processes could be followed in situ. Concentrating on theLEEM studies, it was found that Au from the seed particles was active-ly diffusing across the surface, forming a (√3×√3) structure on thesurface. Interestingly this meant invoking some of the considerableliterature on metal diffusion on Si surfaces from the late 1990s [30].This already makes one realize that using any diffusion constants orsimilar for growth scenarios taken from the clean Si(111) surfaces isun-realistic as the surface will be covered by Au. In addition, the Audiffusion leads to Oswald ripening which can drive the nanowiregrowth into rather unstable regimes. Further studies have shownthat Au diffusion is not limited to Si, but also occur on for exampleGaAs(111)B surfaces, often used for nanowire growth [19].

LEEM and PEEM have also recently been used to study thehomocatalyst growth modes and dynamics observed on III–V and Si(111) surfaces [17,20]. In the work by B. Mandl et al. [17] a thin SiOx

layer (~1 nm) is deposited on the surface prior to growth and homoge-neous untapered nanowires can be grown without a seed particle. Thisis an extremely important development as Au can poison Si technology;thus a simple growth mode without Au will be important for realizingactual devices. While we have begun to understand the growth mech-anism behind the oxide assisted growth, it is still far from resolveddespite its relevance for a wide range of nanowire material systems.In addition, for in-situ studies of the fundamental nanostructure nucle-ation process, oxide based growth could be very attractive because thenanowire nucleation process can be studied from the initial startingcluster of atoms to full wire growth. Surface studies using LEEM,XPEEM and STM have shown that the role of the SiOx is to stabilizesmall clusters/droplets of indium, which can in turn act as homoseeds

for growth of InAs nanowires, as exemplified in Fig. 2c–e. Withoutthe presence of the SiOx, the indium will rapidly diffuse around onthe surface and only a few very large micrometer sized drops will beformed, not suitable as seeds for nanowire growth [17].

In other studies it has been investigated how changing the substratechemistry even on the monolayer scale can seriously affect nanowiregrowth (and in some cases improve it) [18,31]. One example is thequestion on how the growth of straightmonolithic nanowires could be-come possible on the InP(100) surface [21,31]. III–V Nanowires usuallygrow in the b111> directions which leads to nanowires in a undesir-able 35 degree angle with respect to the surface of the technologicallyimportant (100) substrates. In addition, NW growth along these sub-strates in the b110> directions occur, which leads to rather disorderedsurfaces as described in Fig. 3a and visualized in Fig. 3c. Upon adsorp-tion of lysine together with the Au seed particles it was howeverobserved that monolithic InP nanowires would grow perpendicularfrom the substrates in the b001> direction. To understand why thischangewas induced by the lysine a number of surface studieswere car-ried out. Using XPS it was realized that the amount of lysine adsorbedon the surface was around one molecular layer and upon heating tothe growth temperatures (400 °C), the lysine decomposed and the ni-trogen in this molecule formed InN, while the native indium oxidesdissolved and supplied the In. InN is a very stable compound forminga stable amorphous layer on the substrate as confirmed with STM(see insets in Fig. 3c and d). This layer would form all across the surfaceexcept underneath the Au particles. From additional post-growthmea-surements using cross-sectional STM [44–46] it was realized that inorder to emerge from the substrate in the b111>directions the nanowirenow forms an islandwith (111) facets on the substrate. A picture of thegrowth mechanism emerges where the InN layer only leave a smallgrowth region underneath the Au particle; thus the nanowire is forcedto initiate growth in the b001>direction and once it starts in this direc-tion the barrier towards changing to the b111> directions is too great.

1.2. B. Controlling 1D surfaces

A key challenge remains for all types of electronics beyond theSi/SiO2 technology: how to control the defect density and electronicproperties of surfaces and interfaces. This is even more relevant fornanostructures, as their large surface to volume ratio can make the sur-face completely dominate transport and optical properties. The seriousinterface challenges for everything beyond SiO2/Si are not new, and ef-forts have been ongoing for more than 30 years on how to understandand solve this issue [32]—so why are we more likely to succeed today?Three important factors can be identified. Firstly, our characterizationcapabilities have strongly improved and are still improving. This willallow us to identify particular detrimental defects and remove them,and our new in-situ techniques allow a direct evaluation of processesduring growth. Secondly, the nanoscale presents new opportunitiesto combine differentmaterials and to create previously unknown inter-faces. In nanowires, materials with very different lattice constants canbe combined, as strain can more easily be relaxed. Also interfaces be-tween crystalline materials are more acceptable as the detrimentalgrain boundaries can be avoided in very small crystals consisting ofonly one grain. Self-purification and self-assembly can also result invery perfect structures. Thirdly, growth methods such as atomic layerdeposition (ALD) have seen tremendous refinement in recent years,leading to much higher interface perfections.

As an example, the development of wrap-gate NW metal–oxide–semiconductor field-effect transistors (MOSFETs) offers an excellentsolution for gate length scaling [32–37]. However, the electrical per-formance of such wrap-gate NW MOSFETs crucially depends on theinterface quality between the epitaxially grown InAs NW and thehigh-k dielectric film, usually formed by ALD. To investigate theseissues XPS is a powerful method as evidenced by the numerous XPSstudies on high-k dielectrics deposited on III–V semiconductor

Fig. 3. (a) Three different growthmodes of nanowires on the clean InP(001) surfaces after removal of the native oxide. (b) The unique growthmode after lysine has formed InN everywhere,but at the Au seed particle [21]. (c) SEM image of nanowire growth with no lysine. Inset shows 50×50 nm STM image of the InP surface after annealing. (d) SEM image of nanowire growthwith lysine. Inset shows 50×50 nm STM image of the InP surface after annealing. d Reprinted with permission from [31]. Copyright [2011], American Institute of Physics.

Fig. 2. (a) LEEM image series during initial growth of Si nanowires on Si. Images show the Ostwald ripening of the Au growth seeds. In addition the LEEM reveals that the surfacestructure is (√3×√3) consistent with a 1/3 monolayer Au coverage on the surface. (b) SEM image of the nanowires as grown in the LEEM in (a) [29]. (c, d) 50×50 μm2 LEEM imagesof the clean and SiOx covered InAs(111)B surface respectively after flashing the sample up to 600 °C for less than a minute. Droplets have formed both on clean InAs and on SiOx

covered InAs. On the SiOx covered surface also small bright In islands have formed, which can be seen in the 3×3 μm2 inset in (d). The islands are around 100 nm or less. If thedroplets move, they leave traces behind (seen in (c), but not in (d)), which shows that droplets only move on the clean surface, but not on the SiOx covered surface (alow-energy electron microscopy (LEEM) movie recorded during annealing of the SiOx covered surface is provided in Ref. [17]). The In nature of both the large droplets and thesmall white dots can be directly confirmed by μ-XPS performed in the LEEM microscope. (e) In 4d XPS spectra recorded on the SiOx as a function of temperature. The peak markedI originates from In binding to As. As the temperature is raised a new peak appears at 19 eV (peak II), the peak disappears again upon cooling down as can be seen from the tem-perature series in the graph. The position of the peak indicates that this is In binding to the oxide and not metallic In which would appear on the other side of peak I in bindingenergy a-b Reprinted with permission from ([29]), c-e Adapted with permission from ([16]). Copyright (2010) American Chemical Society.

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substrates (see Refs. [38–42]). By using the high photon flux of a syn-chrotron facility, it is possible to obtain high quality XPS core-levelspectra of InAs NWs even with thin films of Al2O3 and HfO2 andwith a rather low density of wires on the substrate surface as seenin Fig 4b. This is important as a high wire density is not always possi-ble if high quality homogeneous samples are to be achieved. From theXPS spectra we can analyze the semiconductor–oxide interface andcompare the interface composition and oxide reduction at InAs NWswith corresponding results from planar InAs substrates. An overviewspectrum from InAs/HfO2 NWs deposited on a Si substrate is shown inFig. 4d. The wide range XPS spectrum is dominated by oxygen and sil-icon core-level peaks from the re-oxidized Si substrate, but also an In3d and a Hf 4f peak related to the NWs is seen even in the overviewspectra. As 3d spectra obtained from InAs NWs with Al2O3 and HfO2

are seen in Fig. 4e. Although the oxide peak appears high on thenanowires spectra compared to the flat substrates this is not neces-sarily indicative of a thicker native oxide as the curved geometry ofthe nanowires enhances the signal from the exterior oxide [43]. ForNWs wrapped with Al2O3 or HfO2 more In-oxides and significantlymore As-oxides than for corresponding planar samples were found,showing a less effective reduction of As-oxides upon high-k deposi-tion. Finally we note that X-ray based photoemission electron micros-copy (XPEEM) imaging with its multitude of imaging modes allowsthe simultaneous imaging of doping, surface chemistry, and morphol-ogy of the as-grown wires or wires in device configurations. Oneimage of such a device using XPEEM is seen in Fig. 4c. We have alsocompared XPS spectra taken from one wire using the PEEM withaverage XPS spectra showing very good matching. This is another im-portant combination as XPEEM will verify that our average XPS mea-surements are also relevant on the single wire or device level, whilethe average XPS can give much more precise chemical information.

Fig. 4. (a) Schematic illustration of the cross-section through a III–V nanowire. After exposueffects. Bulk studies and now also nanowire surface studies show that ALD deposition of highmeasurements, wires only cover a small part of the surface. (c) XPEEM secondary imagingmeasurements. (d) Overview XPS spectra from InAs nanowires on Si, the very small In andnanowires with native oxide and two different high-k oxides d-e Reprinted with permissio

Thehuge potential of semiconductor nanowires for future devices alsorelies on the ability to tailor complex vertical and lateral heterostructuresinside the nanowireswith perfection down to the atomic scale. To helpresolve these issues using STM, we developed samples suitable forso called cross-sectional STM (XSTM), where the III–V semiconductoris cleaved in vacuum and scanned from the side. For XSTM, the III–Vnanowires are embedded in a lattice matched ternary III–V alloyenabling the cleavage of the wire sample to expose an extremely flatsurface for STM measurements. This version of XSTM, makes it possi-ble to study the interior of nanowires (and other III–V nanostructures)with atomic scale resolution [44–46]. While such interface informa-tion is in principle also possible to obtain with TEM, the contrast canbe much clearer in XSTM and as we are really seeing individualatoms, dopants and impurities can be studied in great detail. As an ex-ample, we present the AlGaAs/GaAs heterostructures. Because boththe core of the nanowire and the embedding material are GaAs, thestrong contrast in STM of the AlGaAs is used to clearly identify thewires. In the STM image in Fig. 5 one can see a GaAs nanowiresurrounded by an AlGaAs shell. The wires make angles of 35.3 degreewith the substrate, consistent with one of the usual [1-11] or [-111]growth directions for this type of nanowires on GaAs(001) [44].Zooming in on the atomic scale of an AlGaAs segment as in Fig. 5dand e, we image the rows of As atoms inside the wire. The onset ofthe AlGaAs can also be clearly identified as the introduction of Alleads to a strong corrugation along the As rows of the AlGaAs whencompared to the smooth As rows of the GaAs. It can be observed di-rectly that the lower boundary between the GaAs and the AlGaAs seg-ment is monolayer (ML) sharp. The extremely sharp interface is alsoan indication of a layer-by-layer growth mode of the wire. Thiswould indicate a high mobility of the III–V species at the Au–III–V in-terface and considerable mass transport along this interface. While

re to air an ~1 nm III–V oxide will be formed, which can result in serious bandbending-k dielectrics can assist in removing these oxides. (b) Typical sample for XPS nanowireof nanowire device. μ-XPS from individual wires compares favorably with average XPSAs peaks from the wires can be seen, despite the low coverage. (e) As 3d spectra fromn from [43]. Copyright [2011], American Institute of Physics.

Fig. 5. (a) Schematicmodel of the growth of an embedded nanowire heterostructure on a GaAs(100) substrate, which proceeds in three steps after the initial Au nanoparticle deposition: GaAsnanowire growth, AlGaAs segment and shell formation, GaAs overgrowth. Thewires grow in the [1-11] and [111] directionswith 35.3 degree angles to the substrate. In the model only the[1-11] direction is shown corresponding to the wire imaged in (b) and (c). (b) 400×400 nm2 STM image of the base of the nanowire. (c) 400×0400 nm2 STM image of the AlGaAs segmentinside the nanowire. As both the nanowire core and embeddingmaterial are GaAs, the AlGaAs shell and segment are seen as the bright contrast in the image. (d) 10×5 nm2 STM image of thefirst GaAs/AlGaAs interface which is atomically sharp. (e) Al content in AlGaAs axial segment in nanowire determined by counting individual features of Al atoms in the lattice. Inset showsindividual Al defects in theGaAs lattice as depictedbyXSTM. (f)Model ofAl reservoir effect inAuparticle a-eAdaptedwith permission from([44]). Copyright (2007)AmericanChemical Society.

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the first interface of the AlGaAs segment is sharp, the second boundaryis very diffuse with a gradual decrease of the Al content over 50 nm,or ~150 GaAs monolayers as seen in Fig. 5c. The AlGaAs film growingepitaxially on the substrate simultaneously with the wire segmenthas atomically sharp interfaces at both the top and bottom. This dem-onstrates that the diffuse boundary must be related to the Al stored inthe Au particle. The decrease in Al concentration can then be quanti-fied, by counting the defects along the wire, as shown on the graphin Fig. 5e. The non-linear decrease in Al concentration can be modeled(for details see Ref. [44]) on the assumptions that after the Al source ofthe growth system is turned off, there is still Al in the Au particlewhichis gradually incorporated into the wire as the nanowire continues togrow layer-by-layer. Further the diffusion of Al in the Au is so rapidthat the Al concentration inside the Au particle is always homogenous.Turning to the AlGaAs shell, it can be seen in the STM image in Fig. 5band c that the shell is much thinner than the AlGaAs layers on thesubstrate and the AlGaAs segment in the wire. The nanowire shell isgenerally found to be 10 times thinner than the AlGaAs film at the(001) substrate and 30 times thinner than the AlGaAs segment insidethe wire. Interestingly using similar growth parameters, but switchingsubstrate to the GaAs(111)B, the AlGaAs shell is found to be 30 timesthicker. This dramatic difference could be explained by the greater af-finity for growth on the GaAs(001) substrates compared to GaAs(111)

substrates. While epitaxial growth is kinetically hindered on theGaAs(111)B it is more easily achieved on GaAs(001). It has previouslybeen shown that for III–V nanowires up to 80% of the material is sup-plied from the substrate [15]. As a result, the rapid AlGaAs growth onthe (001) substrate will lead to a greatly reduced supply of materialfor growth of thewire shell, compared to growth on a (111)B substrate.

1.3. C. Controlling 1D interfaces and interactions

Finally it is important to directly investigate the nanowire exteriorsurfaces as any “communication” between the nanowires and theoutside world will occur through its surfaces. Thus for any nanowirebased sensor device or nanowire devices with electrical readout onewill have to be concerned with the structure of the surfaces and inter-faces down to the atomic scale.

STM is a unique tool allowing for direct imaging of surface geom-etry and electronic structure at the atomic scale. However, STM imag-ing of the surfaces of electrically and optically active nanostructures,often fabricated in complex growth environments, is challenging asmany of these structures will immediately oxidize upon retrievalfrom the growth chamber. Subsequent attempts to remove the oxideswill often lead to disintegration of the nanostructures, unless extremecare is taken. In a few but significant cases such as carbon nanotubes,

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hydrogen passivated Si nanowires and BN nanowires, oxidation pre-sents no problem as these very stable structures do not oxidize easily,if at all [47–51]. As a result, they can immediately be imaged withatomic resolution in STM in ultra high vacuum (UHV) or even in air.Indeed, important results are currently being obtained using STMon these entities, proving that STM can contribute tremendouslyto the understanding of their structure and electronic properties.For the much more easily oxidizing compound semiconductor nano-structures such as the III–Vs, other avenues have been used, such asconnecting a growth system directly to the STM. For quantum dotsthis has been done in a number of cases when UHV growth methodssuch as MBE are used [52]. Recently this method has been taken upby other researchers, which have studied the surfaces of InSbAsnanowires in particular directly imaging the Sb in the InAs lattice[56]. In this case the wires where As capped prior to introductioninto the STM chamber and a clean surface could then be obtainedby a decapping procedure. Unfortunately such methods do not easilyallow for the highly desirable direct studies of nanostructures in real-istic device configurations using STM, an area where significant prog-ress has recently been demonstrated for carbon nanotubes [51]. Alsoit is incompatible with MOVPE growth, where As capping is notpossible.

Fig. 6a shows the case of a single wire with a diameter of 50 nmlying on an InAs substrate after cleaning with atomic hydrogen at360 °C [53]. Atomic hydrogen can readily be produced by a heatedtungsten capillary, and the gentle and efficient removal of the surface

Fig. 6. (a) 3D STM image of a 50 nm wide nanowire. (b) Schematic illustration of the STM o20,000 nm, while atomic corrugation is b1 nm. (c) Top: 10×5 nm STM image of a {1-201}nanowire facet and corresponding model. (e) Zincblende crystal segment in a wurtzite nanoand zincblende. (f) STM on the top of 2000 nm high nanowires demonstrating our capabiliwith permission from ([53]). Copyright (2008) American Chemical Society. e Adapted with

oxides by this method is well known for III–V substrates [54]. Turningto the atomic scale structure of the wires, we note that for wurtzitenanowires growing in the b0001> direction, the two most importantsidefacets are the {11-20} and the {10-10}, both shown in Fig. 6c. Avery interesting finding in some types of III–V nanowires is actuallythe occurrence of the wurtzite crystal phase for compounds where itis not the stable bulk structure. For example, InAs nanowires haveoften been found to be almost entirely wurtzite, although the bulkstable zincblende phase can be obtained by careful control of growthparameters [55]. Because of the occurrence of wurtzite InAs exclu-sively in the form of nanowires, surface studies of this phase havebeen elusive so far. A clear distinction between the two types of facetsshould be possible by considering the top As layer, where the {11-20}facet is represented by zig-zag rows along the wire growth direction,while the {10-10} facet is represented by rows of As atoms perpendic-ular to the growth direction. In Fig. 6c we show high resolution STMimages of the {11-20} and {10-10} wurtzite facets, respectively. Inboth cases, surface steps are also seen on the facets along the growthdirection. In Fig. 6d we can see a small zincblende segment in awurtzite wire, opposite to the bulk—here the wurtzite crystal struc-ture is the common one, while the zincblende represents the faults.Another important conclusion from the theoretical and experimentalresults [53] is that the unreconstructed and non-polar nature ofthese surfaces, similar to the zincblende {110} surface, will result insurface spectroscopy that reflects bulk states, with no obscuring sur-face states. This is corroborated by our theoretical calculations of the

n nanowire concept. Wires are typically 20–200 nm in diameter with lengths of 200–nanowire facet and corresponding model. Bottom: 10×5 nm STM image of a {1-101}wire. Atom positions of the top layer As atoms are indicated as red balls for the wurtziteties for scanning with a standard STM on such high aspect ratio structures a-c Adaptedpermission from ([57]). Copyright (2010) American Chemical Society.

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surface bandstructure which finds no surface states present in thebandgap. Thus we will be able to probe for example confined statesin nanowire heterostructures and band-bending at junctions. Our re-sults open the door for future STM studies of the different kinds ofIII–V semiconductor nanowire surfaces, allowing also for atomicallyresolved studies of complex heterostructure combinations and theirelectronic structure.

Until very recently, no STM studies have been reported on uprightstanding nanowires. This is no wonder as the STM is a tool tradition-ally restricted to 2D flat surfaces. The first considerable challenge, inusing STM to study free-standing nanowires, is to locate and imagethe wires in a stable manner at all, due to the extreme aspect ratioof the several micrometers long nanowires. Initially, the tip was posi-tioned with respect to the wires relevant for measurements by fol-lowing the procedure described in Ref. [57]. Fig. 6f shows a typical(1×1) μm2 overview scan of the freestanding nanowires in whichlength variations over 240 nm are very precisely measured. Pleaseobserve that the absolute length of these nanowires is ~2000 nm;however the top of the nanowires can be imaged via STM. We con-tinued to use this new found ability to study mechanical vibrationsof the wires. We can visualize how the nanowire oscillates by record-ing and analyzing images obtained with the sample bias modulatedwith a driving frequency. In addition contacting of the tip to thewire is possible: during tunneling on top of the wire an increase ofthe tunneling voltage causes the gold particle on top of the nanowireto adhere to the tip, a so-called jump-to-contact. The feedback loopof the STM will then retract the tip until the elastic stress of thenanowire exceeds the attractive adhesion force. Observing an elasticdeformation of 40 nm in z-direction and with knowledge of the mod-ulus of elasticity of the wire [58] we find that this corresponds to aforce of approximately 10 μN. Another interesting observation is thelinear dependence of voltage with the maximum extension of thewire, which translates into a linear relationship between the appliedvoltage and the adhesion force between the tip and wire. We alsodemonstrated a very powerful capability of the STM—the ultra-highresolution enabling studies on the Ångström scale of hundreds ofMHZ frequencies. To investigate this regime, 600 nm long nanowireswith a diameter of 110 nm, grown without gold aerosol particles [24],were used. For these stiff nanowires the tip is placed with Ångströmprecision close to tunneling contact in the lateral direction and thefeedback is turned off. While the wire vibrations are induced via a200 MHz signal, due to the non-linearity of the tunneling currentwith distance, we need only to measure the changes in the averagetunneling current induced by the average deflection of the nanowire.Already with a modest measurement precision of 1pA we have a res-olution of 0.01 Å; however currents can be measured with muchhigher precision and resonances in GHz regime can be introduced.

2. The future

Recently it was demonstrated how STM can image structure andelectron density on the atomic scale in carbon nanotube based de-vices while the devices are operating [51]. This novel development,featured on the cover of Nano Letters, opens the door to a playgroundfor nanoscale device physics. Measurements on device configurationswith the SPM tip as a moveable gate, have previously also provenextremely powerful albeit with significantly lower resolution [59].Using an STM allows direct correlation to surface structure, local de-fects and surface electronic properties observed at the atomic scaleon the surface of the nanostructure with the electronic propertiesmeasured/influenced through the wire leads. The ultimate goal is tocreate a novel toolbox of experimental procedures which allow thecreation of a wide variety of clean defect free nanowires and nanowireheterostructures in a device configuration with well defined deviceleads all inside the UHV STM chamber. Further we should be able to re-producibly land on the wire and perform atomically resolved imaging

and spectroscopy while at the same time applying a bias on the wireand having a backgate on the whole system. Here it is noteworthythat the nanowire device configuration is in fact very appealing as aplayground for physics because the contact regions are confined andcan be well defined. In addition to this, complex 0D and 1D nanowireheterostructures with atomic scale precision can be tailored in thewire. This kind of reproducible heterogeneity is available in few othernanostructure systems, and is crucial for these rather tricky STM mea-surements. Thus while the concept here is challenging and somewhatunconventional it can really take STM on nanostructures to a wholenew level opening up both possibilities to play with elemental devicephysics, and bringing the STM closer to the real device situation.

With the many different imaging modes of the PEEM/LEEM elec-tron microscopy techniques, nanowires and planar nanowire devicescan be studied to directly obtain a correlation between growth, struc-ture and function—and even allow probing in-situ or at extremelyshort timescales. As synchrotron sources continue to improve, thequality and usefulness of PEEM continue to rise, but the two most im-portant qualitative improvements will be in regards to lasers basedsources and due to aberration correction in the electron optics. Ad-vanced laser technologies in the femto‐ and even attosecond timerange are continuously being developed, and in combination withPEEM they hold great promise [62] either by multiphoton photoemis-sion or by direct photoemission in the XUV range [63,64]. Importantalso are the advent and practical realization of aberration correctionoptics [65] capable of significantly improving spatial resolution inLEEM down to ~1 nm. Along with much better spatial resolution foran aberration-corrected microscope the electron transmission hasalso significantly increased which is very important for many fluxdemanding XPEEM experiments.

For the growth and surface tailoring of nanowires the most impor-tant new experimental opportunities opening up are in-situ methodsallowing the studies of surface and interface chemistry directly dur-ing growth or under realistic conditions for sensors. Here we wouldlike to emphasize the recent developments of high pressure XPS(HP-XPS) and possibly HP-PEEM. HP-XPS is a synchrotron based de-velopment of XPS allowing pressures up to ~10 mbar at the samplesurface [60]. This is a highly interesting regime when dealing withnanowire growth, as the most industrial relevant technique MOVPEis based on growth in metal organic gasses in exactly this pressure re-gime. Also a technique such as ALD is based on reactions occurringat these pressures. In ALD metal organic molecules in combinationwith water vapor are used. Thus we believe that tailoring gas cellsfor HP-XPS for metal organic molecules and water vapor would behighly interesting for future explorations of the initial stages ofnanowire growth. Here we note that in fact this part of the process isvery important, as we have seen above, the initial onset of nanowiregrowth pretty much determines the rest of the process. Also studies ofsidefacet reactions, both for ALD termination with high-k dielectricsand for growth related diffusion studies would be interesting. An in-teresting further development would be to achieve substrates withnanowire aligned in the same direction and sorted with respect tosize. Such a scenario is certainly not impossible to imagine as resultsalong these lines have been presented using fluidics and electrostatics[61]. Finally we mention efforts to design micro-gas and micro/nanomembrane systems at large. Such concepts are being developed andhave to some extent been implemented for especially transmissionmethods such as transmission electron microscopy (TEM) and trans-mission X-ray microscopy [66]. Here windows of SiN with thicknessesdown to ~50 nm have been implemented and hold great promise es-pecially for focused highly energetic beams. However, for surface sen-sitive techniques such as XPS or XPEEM these systems cannot be usedas the penetration depth is only a few nanometers in the surface sensi-tive regime. Still newmaterials such as graphenewhich ismechanicallyand chemically stable, while still being only one atomic layer thick,holds the promise to solve this problem. Thus it has recently been

105A. Mikkelsen, E. Lundgren / Surface Science 607 (2013) 97–105

shown that windows a few micrometers thick can be covered withgraphene and graphene oxides in a stablemanner to allowXPS and po-tentially PEEMmeasurements with vacuum on one side of the cell andsubstantially higher pressures on the backside. As a result, particles andmolecules on the backside of this film can be studied under realisticconditions [67].

In conclusion, we have given a number of recent examples of boththe variety and relevance of surface science methods for studyingsemiconductor nanowires and how it is possible to use these methodsdespite of the somewhat unfavorable 1D nature of all the samples.What we have not touched upon in this prospective is the significanttheoretical challenges which also exist for these types of structuresand the progress in this area—a topic of its own. As a final note it isworth mentioning that as the semiconductor nanowires inevitablyget thinner and thinner, to fit into new generations of electronics andphotonics, the surface issue will only increase in importance. As an ex-ample we mention that for quite common doping levels of 1018 cm−3

common surface Fermi level pinning can lead to depletion region ofthe order of 5–10 nmwide. Thus any wire of dimensions much smallerthan 20 nm can very easily be completely dominated by its surface,rendering any interior doping irrelevant.

Acknowledgments

The work on nanowires from our laboratory has only been possibledue to the tremendous contributions froma large number of researchersat all levels from PhD student to Director in the Nanometer StructureConsortium at Lund University (nmC@LU) and at the national SwedishSynchrotron Facility MAX-lab. This work was supported by the SwedishResearch Council (VR), the Swedish Foundation for Strategic Research(SSF), the Crafoord Foundation, the Knut and AliceWallenberg Founda-tion, and the European Research Council (ERC) under the EuropeanUnion's Seventh Framework Programme, Grant Agreement No. 259141.

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