1 Processor Array Architectures for Deep Packet Classification Authors: Fayez Gebali and A.N.M. Ehtesham Rafiq Publisher: IEEE Transactions on Parallel and Distributed Systems Present: Kai-Tso Chang Date: October, 22, 2008
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1
Processor Array Architectures for Deep Packet Classification
Authors: Fayez Gebali and A.N.M. Ehtesham RafiqPublisher: IEEE Transactions on Parallel and Distributed SystemsPresent: Kai-Tso ChangDate: October, 22, 2008
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Define
T: text length : n t0 t1…tn-1
P: pattern length : m p0 p1 …pm-1
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The basic string matching algorithm
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Expressing the algorithm as an iterative expression
1. represents an m-input AND function
2. Match(a,b) is a function that is true when character a matches b
1=y0 input text: abcdx xxxxx
1=y1 input text: xabcd xxxxx
…
1=y6 input text: xxxxx xabcd
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Dependence graph (DG)
a
b
c
d
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Timing fuction
The column vector s =[s1,s2] is the scheduling vector and s is an integer
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Timing function
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Pipeline , broadcast
Pipeline a certain variable whose null vector is e, we must satisfy the following inequality
Broadcast a variable whose null vector is e, we must have
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Pipeline , broadcast
We have only one output variable Y whose null-vector is
Pipeline:
Broadcast:
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Timing function
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87
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b
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Pipeline , broadcast
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DG Node Projection
a
b
c
d
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DG Node Projection
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DG Node Projection
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Design 1.a
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Design 1.a
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00
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T
d
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aa
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clock 0clock 1clock 2clock 3
Input text: abcdx xxxxx
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Design 1.b
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Design 1.b
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Design 1.b
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Design 1.c
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Design 1.c
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Comparing designs 1.a and 1.b
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Design 2
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Design 2
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Design 2.a
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Design 2.a
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00
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clock 0
a
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clock 1clock 2clock 3clock 4clock 5clock 6clock 7clock 8
ab
a
abc
ab
bcd
a
bc
dx
c
ab
cd
xx
d
a
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dx
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x
a
cd
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xx
x
abc
dx
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x
1
1
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abdx
ac
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Design 2.b
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Comparing designs 1.a and 2.a
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Design 3
Broadcast:
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Design 3
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5 6 7 8 9 10
5 6 7 8 9 10
5 6 7 8 9 10
5 6 7 8 9 10a
b
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Design 3.a
0
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T
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a
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d d
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clock 0clock 1clock 2clock 3clock 4
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