1 Phase-Locked Loop
Dec 24, 2015
1
Phase-Locked Loop
2
Phase-Locked Loop in RF Receiver
BPF1 BPF2LNA
LO
Mixer BPF3 IF Amp
Demodulator
Antenna
RF front end
PDLoop Filter
1/N
Ref.VCO
Phase-Locked Loop
3
Functional Blocks in PLL
• Phase detector (PD): find difference between phases of two signals
• Loop filter: provide appropriate control voltage for the voltage-controlled oscillator (VCO)
• VCO: generate signals with phase determined by the control voltage
• Divide-by-N: LO phase changes N times faster than Ref phase
PDLoop Filter
1/N
RefVCO
Phase-Locked Loop
LO
4
Design Issues
• Tracking behavior
• Noise performance
• Jitter characteristics– Jitter tolerance– Jitter transfer– Jitter generation
• Power consumption
5
System Modeling
• vRef: input reference signal
• vLO: local oscillator (LO) output signal
• vd: detector output
• F(s): transfer function of loop filter
• vC: control voltage for VCO
PD F(s)
VCOvd vCvRef vLO
6
System Modeling
• Phase signals contain information
• Ref: phase of reference signal
• LO: phase of local oscillator (LO) signal
• e: phase difference between Ref and LO
PD F(s)
Ref VCO
LO
KdevRef vLO
7
Jump in Phase
)(50 LOREFLO
dt
d
8
Ramp in Phase
)(50 LOREFLO
dt
d
9
Ramp in Phase
t
LOREFLOREFLO d
dt
d
00 )(5)(5
10
Phase Detector
• Vd=Kde=Kd(REF – LO)
• Kd: gain of phase detector
Kd
REF +
LO
e vd
11
Loop Filter
• VC(s) = F(s) Vd(s)• Low-pass filter
– Extract phase error– Remove high frequency noises
• Passive filter for integrated PLL• Active filter for discrete component PLL
F(s)vd vC
12
Passive Lag Filter
CR
CR
s
ssF
22
11
21
2
)(1
1)(
• Lag filter: pole magnitude smaller than zero• Passive components: high linearity, gain < 1
21
1
21
2
vd vC
R1
R2
C
+
–
+
–
2
1
1
13
Active Lag Filter
21
222
111
1
2
/
1
1)(
CCK
CR
CR
s
sKsF
a
a
• Can adjust pole and zero locations• Can have gain• Op amp limitations
1
2
1
2
R
RKa
vd vC
R1 R2 C2
+
–
+
–
2
1
+
–
C1
1
1
2
1
C
CKa
14
Active Proportional-Integral (PI) Filter
CR
CR
s
ssF
22
11
1
21)(
• Large open loop gain at low frequency• Op amp limitations
– Linearity– Noise– Open loop gain
1
2
R
Rvd vC
R1 R2 C
+
–
+
–
2
1
+
–
15
Voltage-Controlled Oscillator
• KVCO: gain of VCO
CVCOLO vK 0
1/s+
0
KVCO
vC LO
16
Transfer Function of PLL
• Open-loop transfer function from e to LO
Kd
REF +
LO
e vd1/s+
0
+KVCO
vC LOF(s)
s
sFKKsA VCOd )()(
17
Transfer Function of PLL
• Closed-loop transfer function from REF to LO
Kd
REF +
LO
e vd1/s+
0
+KVCO
vC LOF(s)
)(
)(
)(1
)(
)(
)()(
sFKKs
sFKK
sA
sA
s
ssH
VCOd
VCOd
REF
LO
18
Transfer Function from REF to e
• Closed-loop transfer function
Kd
REF +
LO
e vd1/s+
0
+KVCO
vC LOF(s)
)()(1
)(
)()(
)()()()()()(
sFKKs
ssH
s
ssH
ssHssss
VCOdREF
ee
REFREFLOREFe
19
Other TF of Interest
• Noise in control voltage
Kd
REF +
LO
e vd1/s+
vCn
+ KVCO
vC LOF(s)
)()(
)(
)(/)]()()([
sFKKs
K
sV
s
ssKssFKsV
VCOd
VCO
Cn
LO
LOVCOLOdCn
20
Other TF of Interest
• Phase noise of VCO
Kd
REF +
LO
e vd1/s +
n
+KVCO
vC LOF(s)
)()(
)(
)(/)()()(
sFKKs
s
s
s
ssssFKKs
VCOdn
LO
LOLOVCOdn
21
Transfer Functions for Different Loop Filters
• Passive lag filter
• Active lag filter
• Active PI filter
1
21)(
s
ssF
)(1
1)(
21
2
s
ssF
2121
22
221
1
)1()(
VCOdVCOd
VCOd
KKs
KKs
sKK
sH
1
2
1
1)(
s
sKsF a
11
22
21
1
)1()(
aVCOdaVCOd
aVCOd
KKKs
KKKs
sKKK
sH
11
22
21
)1()(
VCOdVCOd
VCOd
KKs
KKs
sKK
sH
22
Normalizing Transfer Function• Normalized denominator
• Passive lag filter
• Active lag filter
• Active PI Filter
ratiodampingfrequencynaturalsssD nnn :;:,2)( 22
21
VCOd
n
KK )1
(2 2
VCOd
n
KK
1 aVCOd
n
KKK )
1(
2 2aVCOd
n
KKK
1 VCOd
n
KK 22
n
23
Normalized Transfer Function• Passive lag filter
• Active lag filter
• Active PI Filter
22
22
2
)2()(
nn
nVCOd
nn
ss
sKK
sH
22
22
2
)2()(
nn
naVCOd
nn
ss
sKKK
sH
22
2
2
2)(
nn
nn
ss
ssH
24
Normalized Transfer Function
• Passive lag filter
• Active lag filter
2
1
VCOdKK
22
2
2
2)(
nn
nn
ss
ssH
22
2
2)(
nne ss
ssH
2
1
aVCOd KKK
25
Frequency Response of H(s)
22
2
2
2)(
nn
nn
ss
ssH
26
Frequency Response of He(s)
22
2
2)(
nne ss
ssH
27
Step Response of PLL
• Phase step
• Phase Error
• Steady state error (final value theorem)
sstut REFREF /)()()(
.1,)]1sinh(1
)1[cosh(
;1),exp()1(
;1,)]1sin(1
)1[cos(
)(
2/)()(
2
2
2
2
2
2
22
tnn
nn
tnn
e
nnee
n
n
ett
tt
ett
t
ss
sssHs
02
lim)(lim)(22
2
00
nns
es
e ss
sss
28
Step Response
22
2
2)(
nne ss
ssH
29
Ramp Response of PLL
• Phase ramp
• Phase Error
• Steady state error (final value theorem)
2/)()()( ssttut REFREF
.1,)1sinh(1
1
;1),exp(
;1,)1sin(1
1
)(
2/)()(
2
2
2
2
222
tn
n
n
tn
n
e
nnee
n
n
et
tt
et
t
ssssHs
02
lim)(lim)(2200
nns
es
e ss
sss
30
Ramp Response
22
2
2)(
nne ss
ssH
31
General Steady State Error in Ramp Response
• High loop gain
• Low loop gain
)()(1)(
sFKKs
ssHsH
VCOde
)(
//)()( 2
sFKKs
sssHs
VCOdee
0)(
lim)(lim)()0(00
sFKKsssF
VCOds
es
e
)0()(lim)(lim)(
00 FKKsFKKsss
VCOdVCOds
es
e
32
Stability of PLL
• Criterion for stability– Closed-loop pole at left half plane– Sufficient phase margin
• Control of pole location– Open loop gain– Open loop zero
• Check root locus
ssFKK
ssFKK
sA
sAsH
VCOd
VCOd
/)(1
/)(
)(1
)()(
33
Root Locus Method
• Closed-loop TF
• Closed-loop poles make
– K=0, open-loop poles– K infinity, open-loop zeros or infinity
).(/)(/)(
)()(
)(
/)(1
/)()(
sdsnssFandKKK
where
snKsd
snK
ssFKK
ssFKKsH
VCOd
VCOd
VCOd
0)()( snKsd
34
Root Locus for Passive Lag Filter
)(1
11)(
21
2
s
s
ss
sF
35
Root Locus for Active Lag Filter
1
2
1
11)(
s
s
ss
sF
36
Root Locus for Active PI Filter
1
211)(
s
s
ss
sF
37
Root Locus for 1st-Order LP Filter
11
11)(
sss
sF
38
Effects of Parasitics
11 1.01
1
1
11)(
ssss
sF
39
Effects of Zero
1
2
1 1.01
21
1
11)(
s
s
sss
sF
40
Phase Noise and Jitter• Phase noise
– Fluctuation in phase– Frequency domain– Discussed in RF circuits
• Jitter– Error in clock edge (period)– Time domain– Significant in communications circuits
• Two concepts– Related to each other– Exact relationship not clear
41
Jitter Measurements
Agilent, “Understanding Jitter and Wander Measurements and Standards.”
42
Jitter Tolerance
• Ability of a PLL to operate with jitter – Applied to its reference– Various magnitudes– Different frequencies
• Usually specified using an input jitter mask– Jitter magnitude and corner frequencies– BER requirement– Various for standards
43
PLL in Clock and Data Recovery0 1 0 0 1 0 1 0 1
0 1 0 0 X 1 0 1 0
0 1 0 0 1 0 1 0
Ideal signal
Distorted signal
Ideal clock
Recovered clock
44
Jitter Tolerance Mask
45
Jitter Tolerance Measurement
46
Jitter Tolerance Measurement
47
Jitter Tolerance Measurement
• Error at corner frequency– Insufficient clock recovery bandwidth– Incorrect mask used
48
Jitter Tolerance Measurement
• Excessive jitter tolerance margin
Tolerance margin
49
Jitter Tolerance Measurement
• Occasional fail at specific frequencies– Need extra settling time after jitter amplitude change
• Repeating with additional settling time• Spot measurement
50
Jitter Tolerance Measurement
• Limited clock recovery bandwidth• Eye-width alignment noise
51
Jitter Tolerance Measurement
• Limited buffer store
52
Jitter Transfer• Jitter transfer or jitter attenuation • Output jitter vs. input jitter
– Input jitter with various amplitudes and frequencies– Output jitter measured with various bandwidths
• Intrinsic jitter• Typically specified using a bandwidth plot
– Amplitude– Roll off speed– Corner Frequency
53
Jitter Transfer Mask
54
Jitter Transfer Measurement
• Jitter tolerance mask used to set input jitter level• Sinusoidal jitter at magnitudes and frequencies• Narrow-band measurement
55
Jitter Transfer Measurement
• Different test masks• SONET mask: additional amplitude at lower band
56
Jitter Transfer Measurement
• Measurement set-up noise• -40 dB sufficient
57
Jitter Transfer Measurement
• Low-frequency phase noise• Power-line crosstalk• Short measurement time
58
Jitter Transfer Measurement
• Incorrect filter characteristic• Excessive peaking
59
Jitter Transfer Plot
E. Barari, “Jitter Analysis / Specification,” May 2002.
60
Measured Jitter Transfer Characteristic
E. Barari, “Jitter Analysis / Specification,” May 2002.
61
Measured Jitter Transfer Characteristic
E. Barari, “Jitter Analysis / Specification,” May 2002.
62
Measured Jitter Transfer Characteristic
E. Barari, “Jitter Analysis / Specification,” May 2002.
63
Measured Jitter Transfer Characteristic
E. Barari, “Jitter Analysis / Specification,” May 2002.
64
Jitter Generation
• Intrinsic jitter produced by the PLL– Thermal noise– Drift in VCO
• Measured at its output– Applying a clear reference signal to PLL – Measuring its output jitter.
• Usually specified as a peak-to-peak period jitter value
65
Jitter Generation Standard
66
Jitter Generation Measurement
• Direct measurement of p-p jitter
• Phase noise measurement
• Eye diagram and histogram
67
Jitter Generation Measurement
68
Measurement Considerations
• Calibration
• Measurement range
• Measurement time
• Power
• Frequency offset
69
TF from Noise in VCO Control Voltage
Kd+
vCn
+ KVCO/sLO
F(s)
22 2)()(
)()(
nn
VCO
VCOd
VCO
Cn
LOC ss
sK
sFKKs
K
sV
ssH
-1
• Can be viewed as low-pass filter
70
TF from Noise in VCO Control Voltage
22 2)(
nnC ss
ssH
71
TF from Phase Noise in VCO
22
2
2)()(
)()(
nnVCOdn
LO
ss
s
sFKKs
s
s
ssH
Kd+
n
+KVCO/sLO
F(s)-1
• High-pass filter• The same as He(s)
72
Phase Error in VCO
Kd
n
KVCO/sLO
F(s)
• vCn dominate at low frequencies• n dominate at high frequencies
vCn
REF +
LO
e
HC(s) H(s)