1 Modelling and Simulation of Ethernet Based Networked Mechanical Systems Department of Mechanical & Industrial Engineering Concordia University Control.

1

ModelModellling and Simulation of ing and Simulation of Ethernet Based Networked Ethernet Based Networked

Mechanical Systems Mechanical Systems

Department of Mechanical & Industrial Engineering Department of Mechanical & Industrial Engineering

Concordia UniversityConcordia University

Control and Information Systems (CIS) LaboratoryControl and Information Systems (CIS) Laboratory

Presented By : Vahid ShakerPresented By : Vahid Shaker

Supervisor : Dr. Brandon W. GordonSupervisor : Dr. Brandon W. Gordon

2

Out LineOut Line

MotivationMotivation Problem definitionProblem definition Basics of Ethernet technologyBasics of Ethernet technology Our approachOur approach S-Function simulationS-Function simulation Modelling of Ethernet componentsModelling of Ethernet components Testing and verificationTesting and verification Application to distributed simulationApplication to distributed simulation Conclusion and future workConclusion and future work

3

MotivationMotivation

Need to predict the behavior of Ethernet networks Need to predict the behavior of Ethernet networks combined with mechanical systems combined with mechanical systems

Main applications are design and analysis of Ethernet Main applications are design and analysis of Ethernet based distributed simulation and control systemsbased distributed simulation and control systems

A modular modelling and simulation approach is neededA modular modelling and simulation approach is needed

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Problem DefinitionProblem Definition

To pTo predict the overall time delay of transmitted redict the overall time delay of transmitted packetspackets

EEstimate the real-time performance of Ethernet / stimate the real-time performance of Ethernet / mechanical systems in different topologiesmechanical systems in different topologies

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Basics of Ethernet TechnologyBasics of Ethernet Technology

Ethernet uses a contention-based channel access Ethernet uses a contention-based channel access method called method called CSMA/CDCSMA/CD ( (Carrier Sense Multiple Carrier Sense Multiple Access with Collision DetectionAccess with Collision Detection))

Half and full duplex modesHalf and full duplex modes Ethernet frame structureEthernet frame structure

PreamblePreamble SFDSFD I /GI /G U/LU/L DADA SASA Length / TypeLength / Type Data / LLCData / LLC FCSFCS

5656 88 4848 4848 1616 46 to 150046 to 1500 3232

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Common Network TopologiesCommon Network Topologies

Bus StarBus Star

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Our ApproachOur Approach

Develop FSM (Finite State Machine) models of :Develop FSM (Finite State Machine) models of :

-- Network Interface card (NIC) Network Interface card (NIC)

-- Bus Bus

-- Hub Hub

-- Switch Switch Implement the models using C++ functionsImplement the models using C++ functions Individually test, run and debug each subsystem Individually test, run and debug each subsystem

modelmodel

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Our Approach (Cont.)Our Approach (Cont.)

Encapsulate the codes using SimulinkEncapsulate the codes using Simulink S-functionsS-functions Individually test, run and debug each Individually test, run and debug each S-functionS-function Interconnect the blocks in Simulink to arrange Interconnect the blocks in Simulink to arrange

the appropriate modelthe appropriate model Test and run the interconnected model to Test and run the interconnected model to

finalize the debugging procedure for each finalize the debugging procedure for each part (block)part (block)

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Previous ApproachesPrevious Approaches

Lian,F.L.Lian,F.L. ((University of MichiganUniversity of Michigan, , 20012001) ) [14 ][14 ] Nominated for best paper award Nominated for best paper award ““PerformancePerformance Evaluation of Control Networks :Ethernet, ControlNet, Evaluation of Control Networks :Ethernet, ControlNet,

and DeviceNetand DeviceNet ””

Wang, J.Wang, J. (Cornell University, (Cornell University, 19991999) [1]) [1] ““Efficient and Accurate Ethernet SimulationEfficient and Accurate Ethernet Simulation””

OPNET: can not easily combine with mechanical OPNET: can not easily combine with mechanical systemssystems

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How S - Function Simulation WorksHow S - Function Simulation Works

Initialization :

- Initializes the SimStruct; a simulation structure that contains information about the S-function

- Sets the number and dimensions of input and output ports

- Sets the block sample time(s)

Time Hit = (n * Period) + offset

- Allocates storage areas and the sizes of arrays

Simulation loop

Start of simulation

mdlinitializeSizes

mdlinitializeSampleTimes

mdlOutputs

mdlTerminate

mdlUpdate

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Modelling of Ethernet Hardware ComponentsModelling of Ethernet Hardware Components

Our modelling is based on :

EEvent-drivenvent-driven simulation simulation

TTransmission mediumransmission medium as a as a centralized active entitycentralized active entity which: which: -- K Keeps track of packets sent by each stationeeps track of packets sent by each station -- I Informs each station about the current state of thenforms each station about the current state of the medium medium -- D Detects and computes the exact time a collision occurs etects and computes the exact time a collision occurs and sends out jam signalsand sends out jam signals

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Modelling of Ethernet: NICModelling of Ethernet: NIC

NIC (Network Interface Card) NIC (Network Interface Card)

-- Performs those functions appropriate for the Performs those functions appropriate for the MACMAC

(Media Access Control) layer protocol(Media Access Control) layer protocol

-- Generates frame Generates frame

NICNIC

MediaMedia

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Half Duplex versus Full DuplexHalf Duplex versus Full Duplex

Half Duplex : Only Half Duplex : Only one device transmits at a timeone device transmits at a time

(eg. Bus and Star topologies)(eg. Bus and Star topologies)

Full Duplex: TFull Duplex: Transmit and receive simultaneously without ransmit and receive simultaneously without listening across a dedicated link that is collision freelistening across a dedicated link that is collision free

Full duplex Full duplex provides the benefit of increased bandwidth provides the benefit of increased bandwidth capacity and throughputcapacity and throughput

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Sent frame > 64 bit

CSMA/CD ( 1-PERSISTENT )CSMA/CD ( 1-PERSISTENT )

ready to send

Listen

Channel is idleWait for T=IFG(Inter Frame Gap)10 Mbps :9.6 μsec100 Mbps :960 nsec1000 Mbps :96 nsec

SendSlot time=512 bit

For multiple frames ,wait for a period equal to the IFG between each frame

Channelacquisition

Transmission complete

Collision counterclear

Collision

Sent frame > 512 bitSent frame < 512 bit

Collision Counter++

Continue to transmit32 bit

collision enforcementJam signal

Wait for a randomPeriod of time

Completed Preamble of frame

If collision counter<= 10 ,wait from 0 to 2^n-1 slot timeIf collision counter > 10,wait from 0 to 1024 (2^10 ) slot time

If collision counter = 16 ,give up

Back off

Deferral

Channel is busy

Sent frame < 64 bit

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Modelling of Ethernet: NIC (Cont.)Modelling of Ethernet: NIC (Cont.)

SA DA Length ID Voltage Time Data

In case of a Jam Signal:In case of a Jam Signal: DADA = = MAX_NODE_ETHERNET+1MAX_NODE_ETHERNET+1 ,, LengthLength = = 32 bits 32 bits ,, IDID = NULL , = NULL , V_JAMV_JAM = V_XMIT + 1.0/(MAX_NODE_ETHERNET+1) = V_XMIT + 1.0/(MAX_NODE_ETHERNET+1) , , where :where : V_XMITV_XMIT is the transmission voltage.is the transmission voltage.

Frame format in the proposed mechanical modelFrame format in the proposed mechanical model

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Modelling of Ethernet: NIC (Half-Duplex, Bus Topology)Modelling of Ethernet: NIC (Half-Duplex, Bus Topology)

Idle

Sending

Receiving+

Wait Back off EndWait for Jam End

Back off

Send Jam

Send Jam

Send Jam

Wait for Back off

Receiving

Wait for Back off EndAnd

Jam End

7

1 2

9

4

3

465+8

7

4

9

7

5+8

6

4 9

4

3

Event 1: Data available to send.Event 2: End of transmission (No data available to send).Event 3: End of Jam Signal.Event 4: Receiving Jam signal.Event 5: Receiving data on the input port.Event 6: End of receiving data (By sensing the idle signal on the input port).Event 7: End of Back off .

Event 8: No receiving bufferavailable, which causes theerror signal . Event 9: Receiving data fromanother source in twisted pair cables or detect a collision by sensing higher voltage (U (4) >= V_CD) in the coaxial cables.

NIC sNIC state diagram for the model of Bus topology with coaxial cabletate diagram for the model of Bus topology with coaxial cable in half duplex mode in half duplex mode

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Modelling of Ethernet: NIC (Half-Duplex, Star Topology)Modelling of Ethernet: NIC (Half-Duplex, Star Topology)

Idle

Sending

Receiving+


Back off

Send Jam

Send Jam

Send Jam

Wait for Back off

Receiving


Jam End

7

1 2

5

4

3

465+8

7

4

9*

7

5+8

6

4 9

4

3

NIC sNIC state diagram for the model of tate diagram for the model of StarStar topology with topology with twisted pairtwisted pair cable cable in half duplex mode in half duplex mode

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Modelling of Ethernet: NIC (Full-Duplex)Modelling of Ethernet: NIC (Full-Duplex)

Event 1: Data available to sendEvent 2: End of transmission (no data available to send)Event 3: Data available to send while we are receiving data on the input portEvent 4: End of transmission andreceiving dataEvent 5: Receiving data on the inputportEvent 6: End of receiving data (sensing the idle signal on the input port)Event 7 = Event 5 Event 8 = Event 6 Event 9 = Event 2 Event 10 = Event 1 (Note that in the code: event 7 stands for the no receiving buffer available and causes the error signal)

Sending

Receiving

Idle

1 2

5 6

3

4

Sending + Receiving

7 8

9 10

NIC sNIC state diagram for the tate diagram for the full duplex full duplex modemode

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Bus sBus state diagramtate diagram

Modelling of Ethernet Hardware: Bus Modelling of Ethernet Hardware: Bus

BusBus

10Base510Base5 ( (Coaxial CableCoaxial Cable) characteristics are the basis of ) characteristics are the basis of modelling the propagation delay in mediummodelling the propagation delay in medium

4i =1V

FIFO

FIFO

FIFO

FIFO

NIC2

BUS FABRIC

NIC1 NIC3 NIC4

Carrier

Collision

Idle

11

2233 44

55

66

Event 1: One NIC transmit dataEvent 2: No transmission Event 3: More than one NIC transmit dataEvent 4: Event 1Event 5: Event 2Event 6: Event 3

A

B

C

D

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Modelling of Ethernet Hardware: HubModelling of Ethernet Hardware: Hub

Hubs Hubs -- O Or r multi port repeatersmulti port repeaters propagate signal propagate signal

through the networks and are used as network through the networks and are used as network concentration points concentration points

-- A A semi smart hubsemi smart hub, which is not only a , which is not only a data data distributordistributor but also works as a but also works as a collision detectorcollision detector and and Jam generatorJam generator is modeled in this study is modeled in this study

HUB

AABB

CC

FF

GGFF

EE

DD

G to D

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Modelling of Ethernet Hardware: Hub (Cont.)Modelling of Ethernet Hardware: Hub (Cont.)

Hubs :Hubs :- Operate at physical layer of networkOperate at physical layer of network- Amplify and generates signals; extend any runts Amplify and generates signals; extend any runts

(undersized frames, less than 96 bits) and (undersized frames, less than 96 bits) and reconstruct the preamblereconstruct the preamble

- Provide multiple connections or split the mediaProvide multiple connections or split the media- Detect the collision and send jam signal to all portsDetect the collision and send jam signal to all ports- Monitor the number of collisions and partition the portMonitor the number of collisions and partition the port- Monitor the state of transceiver at each portMonitor the state of transceiver at each port DisadvantageDisadvantage : Can not filter network traffic : Can not filter network traffic

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Hub sHub state diagramtate diagram

Idle

Event 1: One NIC transmit dataEvent 2: No transmission Event 3: More than one NIC transmit dataEvent 4: Transmission jamEvent 5: End of Jam signal and one NIC start to transmit dataEvent 6: End of Jam signal

Carrier

Send Jam

Collision

Wait for Jam End

11

22

55

33

4466

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Simplified smart hub functionality diagram for regular operation Simplified smart hub functionality diagram for regular operation

A: BUFFER_SIZE_TRANS B: CABLE_DELAY C: START_P_DELAY_INPUT

D: BUFFER_SIZE_REC F: START_P_DELAY_OUTPUTE: CABLE_DELAY

HUB (Fabric)

F

D

ECB

A

Port 1 Port 1

Port 2

Port 3

Port 4

Port 2

Port 3

Port 4

Jam SignalTransmitter

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Simplified smart hub functionality diagram Simplified smart hub functionality diagram in collision operationin collision operation

HUB (Fabric)

Port 1 Port 1

Port 2

Port 3

Port 4

Port 2

Port 3

Port 4

Jam SignalTransmitter

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Modelling of Ethernet Hardware: SwitchModelling of Ethernet Hardware: Switch

SwitchSwitch -- Offers full duplex,dedicated bandwidth to segments or Offers full duplex,dedicated bandwidth to segments or desktops.Do not forward collision signals from one segment desktops.Do not forward collision signals from one segment to another so:to another so: - - Allows to build large,multi collision domain networkAllows to build large,multi collision domain network -- Packet-based switches use one of Packet-based switches use one of three methods for routingthree methods for routing traffic: traffic: 1. 1. Cut-throughCut-through

2. 2. Store-and-forwardStore-and-forward 3. 3. Fragment-free Fragment-free

Note thatNote that, , Many switches combine the two Many switches combine the two first first methodsmethods..

Switch

AABB

CC

FF

GGFF

EE

DD

G to D

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- There are three common types of There are three common types of buffer architecturebuffer architecture::

1. 1. Cross-bar switchCross-bar switch

2. Knockout switch2. Knockout switch

3. Shared media switch3. Shared media switch

- - Common Common buffer locations:buffer locations:

1. 1. Input Buffering Input Buffering ((DisadvantageDisadvantage:HOL):HOL)

2. 2. Output Buffering Output Buffering

3. 3. Central BufferingCentral Buffering

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2

3

4

3

4

1

1

2

4

1

2

3

Four-port switch with crossbar buffering architecture

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Assumptions:Assumptions:

-- Full duplexFull duplex switch with switch with store and forwardstore and forward

-- EEach port will be connected to only oneach port will be connected to only one station and all station and all the nodes send the the nodes send the same framesame frame sizesize

-- If If one node have data for the same destination one node have data for the same destination :: priority mechanismpriority mechanism to define which station should to define which station should ssendend first first Lower node index has the higher priorityLower node index has the higher priority

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Testing and VerificationTesting and Verification

Individually test, run and debug each subsystem modelIndividually test, run and debug each subsystem model

Individually test, run and debug each S-functionIndividually test, run and debug each S-function

Test and run the interconnected model to finalize the Test and run the interconnected model to finalize the debuggingdebugging procedure for each part (block)procedure for each part (block)

Latency measurementsLatency measurements

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Simulation configuration used to test the Simulation configuration used to test the NICNIC

- Feeder- Feeder : Traffic or packet generator : Traffic or packet generator

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Idle

Sending

Receiving+


Back off

Send Jam

Send Jam

Send Jam

Wait for Back off

Receiving


Jam End

7

1 2

9

4

3

465+8

7

4

9

7

5+8

6

4 9

4

3

Illustration of paths followed in the simulation test Illustration of paths followed in the simulation test

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Feeder input used to test the NIC Feeder input used to test the NIC NIC output voltage and states NIC output voltage and states

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Simulation configuration used to test the BUSSimulation configuration used to test the BUS

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feeder

feeder1

feeder2

0 200 400 600 800 1000 1200 1400 1600 1800 2000

Time(BT)

Comparison of feeder activity Comparison of feeder activity Output of Bus activity Output of Bus activity

Simulation test Simulation test forfor BUS BUS

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Simulation configuration used to test the Hub modelSimulation configuration used to test the Hub model

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Voltage of inputs and output ports for the HubVoltage of inputs and output ports for the Hub

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Simulation configuration used to test the Switch modelSimulation configuration used to test the Switch model

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Comparison of inputs to switch portsComparison of inputs to switch ports

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Comparison of outputs to switch ports Comparison of outputs to switch ports

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-- Model 1: Half Duplex NIC with Coaxial Cable as BusModel 1: Half Duplex NIC with Coaxial Cable as Bus::

Interconnection of four NICs in half duplex mode with 10Base5 Interconnection of four NICs in half duplex mode with 10Base5 (Coaxial cable) Bus(Coaxial cable) Bus

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Signal activity on the BUS Signal activity on the BUS

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- Model 2: Half Duplex NIC, Twisted Pair Cable and 4 Model 2: Half Duplex NIC, Twisted Pair Cable and 4 Ports HubPorts Hub ::

Interconnection of four NIC in half duplex mode Interconnection of four NIC in half duplex mode

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Illustration of voltages on the input / output ports of Hub model Illustration of voltages on the input / output ports of Hub model

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- Model 3: Full Duplex NIC, Twisted Pair Cable and 8 Model 3: Full Duplex NIC, Twisted Pair Cable and 8 Ports SwitchPorts Switch::

Interconnection of four NICs in half duplex mode with 10BaseT(Twisted pair) Interconnection of four NICs in half duplex mode with 10BaseT(Twisted pair) as media and eight-port switch as media and eight-port switch

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Voltages on the input / output ports of the Switch modelVoltages on the input / output ports of the Switch model

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Latency MeasurementsLatency Measurements : : SwitchSwitch

Time

Tdclock Tdclock Tdtx_NIC Tdrx_NIC

Tdround

T1

T2

Tdtx_p Tdrx_p

Tswitch

0 500 1000 15000

50

100

150

200

250

300

350

400

packet size (bytes)

tota

l tim

e d

ela

y (u

s)

maxminaverage

Latency definitions for the Latency definitions for the Switch test Switch test

3COM 3C16477 Baseline 3COM 3C16477 Baseline Gigabit Switch time delay Gigabit Switch time delay

test test

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Testing and Verification (Cont.)Testing and Verification (Cont.)

Validating the accuracy Validating the accuracy bby comparing the performance y comparing the performance measurements resultsmeasurements results

Note that:Note that: -- All the simulation tests have used a All the simulation tests have used a zero zero rreleasing policyeleasing policy -- Limited nLimited number of messagesumber of messages to lower the traffic loads on to lower the traffic loads on

the network medium and for the the network medium and for the stability reasonstability reason and to and to escape from the intensive escape from the intensive channel capturechannel capture issue issue

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Test 1:Test 1: Variation in number of nodes Variation in number of nodes

Average time delay versus number of Average time delay versus number of network nodes network nodes

Network utilization/efficiency versus Network utilization/efficiency versus number of network nodes number of network nodes

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Test 2: Variation in number of transmitted messages

Average time delay versus number of Average time delay versus number of messages per node to transmit messages per node to transmit

Network utilization / efficiency versus Network utilization / efficiency versus number of messages per node number of messages per node

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Test 3:Test 3: Variation in frame size: Variation in frame size:

Average time delay versus frame size Average time delay versus frame size comparison for 2 and 4 node in networkscomparison for 2 and 4 node in networks

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Application to Distributed SimulationApplication to Distributed Simulation

SimuSimullating networked mechanical models ating networked mechanical models ::

X1

b1

M1 M2

K1 K2 K3

b2 b3

X2

Mass spring systemMass spring system

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Application to Distributed SimulationApplication to Distributed Simulation

V2

X2

V1

X1

Y =

1

1

1

1

0

0

0 0

0 0

0 0

0

000

b2 / M1

.V2

.V1

V1

V2

- (K3+ K2 ) / M2 - (b2+ b3 ) / M2

=

K2 / M2

- (K1+ K2 ) / M1

0 1

- (b1+ b2 ) / M1

V2

X2

V1

X1

0 0

0 0

b3 / M2

K2 / M1

0 1

A1

A2

B1

B2

State space of dynamic equation of motionState space of dynamic equation of motion

Z2(k + 1) = A2d Z2 (k) + B2d Z1 (k)

Z1(k + 1) = A1d Z1 (k) + B1d Z2 (k)Where:

A1d = I + A1 t

A2d = I + A2 t

B1d = B1 t

B2d = B2 t

53

Simulation using one processorSimulation using one processor

Simulation configuration of mass-spring Simulation configuration of mass-spring system, simulation on one computer system, simulation on one computer

Simulation of mass-spring model Simulation of mass-spring model

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Distributed mass spring modelDistributed mass spring model

X2 V2

X1 V1

X2 V2

X1 V1

NODE 1

NIC

1 NODE 2

NIC

2

Switch

1 32 4 5 6 7 8

Schematic connection of nodes and switch Schematic connection of nodes and switch in the model in the model

55

Distributed mass spring model using full duplex Ethernet protocolDistributed mass spring model using full duplex Ethernet protocol

56

Comparison of the signals in one processor simulation model and Comparison of the signals in one processor simulation model and distributed simulation distributed simulation afterafter switch switch

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ConclusionsConclusions

MMain results and contributionsain results and contributions:: A new modular / scalable simulation package for

Ethernet for most hardware components Simulation of network time delays A new combined discrete network / continuous

mechanical system simulation framework Testing and verification

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Future WorkFuture Work

Implement Implement Gigabit Ethernet simulatGigabit Ethernet simulationion. .

Improve switch model :Improve switch model :half duplex mode, learning half duplex mode, learning ability and spam algorithmability and spam algorithm..

Application to design and analysis of real-time Application to design and analysis of real-time Ethernet based distributed simulation and controlEthernet based distributed simulation and control

Modelling of other Ethernet hardware such as bridges Modelling of other Ethernet hardware such as bridges and routersand routers

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Thanks

60

Ethernet Frame IEEE 802.3Ethernet Frame IEEE 802.3

32 16 48 8

S Length Preamble F DA SA or Data/LLC FCS D Type

S Length Preamble F DA SA or Data/LLC FCS D Type

56 48 46 to 1500

I/G U/L LLC Data Pad

Start Frame Delimiter (SFD):Start Frame Delimiter (SFD): B Bit sequence, indicates the actual start of it sequence, indicates the actual start of

the frame and enables the receiver to distinguish the first bit from the restthe frame and enables the receiver to distinguish the first bit from the rest

of the frame.of the frame.

I/G: I/G: IIndividual physical ndividual physical // GGroup addressroup address..

U/L:U/L: Universal / Local address. Universal / Local address.

LLC header:LLC header: Logical link control headerLogical link control header..

Frame check sequence (FCS):Frame check sequence (FCS): A 32bit Cyclic Redundancy Check (CRC) A 32bit Cyclic Redundancy Check (CRC)..

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Latency Measurement: Hub / SwitchLatency Measurement: Hub / Switch

Parallel Port Cable

Node1

NIC

Hub/Switch

Node2

NIC

62

Network efficiency delay versus frame size Network efficiency delay versus frame size comparison for 2 and 4 node networkscomparison for 2 and 4 node networks

Network utilization versus frame size Network utilization versus frame size comparison for 2 and 4 node networkscomparison for 2 and 4 node networks

Test 3:Test 3: Variation in frame size: Variation in frame size:

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Example of real-time distributed systemExample of real-time distributed system

CAE marine simulatorCAE marine simulator

1 Modelling and Simulation of Ethernet Based Networked Mechanical Systems Department of Mechanical & Industrial Engineering Concordia University Control.

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