1 Lecture 7 Lecture 7 Integer Arithmetic Integer Arithmetic Assembly Language for Intel-Based Computers, 4th edition Kip R. Irvine
Dec 17, 2015
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Lecture 7Lecture 7
Integer ArithmeticInteger Arithmetic
Assembly Language for
Intel-Based Computers,
4th edition
Kip R. Irvine
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Integer ArithmeticInteger Arithmetic
Shift and Rotate instructions Sample Applications Extended Addition and Subtraction Multiplication and Division ASCII and Packed Decimal Arithmetic
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Shifting and rotatingShifting and rotating
Shifting: The bits a shifted left or right. Some bits may be lost.Example: Shift 00001101 1 bit rightAdded 00000110 Lost
Rotating: The bits shift out of one end of the data are placed at the other end of the data so nothing is lost.Example: Rotate 10001101 2 bits to the left: 00110110
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SHL (Shifting bits to the left)SHL (Shifting bits to the left)
To shift 1 bit to the left we use: SHL dest(reg/mem),count(imm8/CL) the msb (most significant bit) is moved into CF
(so the previous content of CF is lost) each bit is shifted one position to the left the lsb (least significant bit) is filled with 0 dest can be either byte, word or dword
Ex: mov bl,82h ; BX = _____ shl bl,1 ; BX = _____, CF = __
(only BL and CF are changed)
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Shifting bits to the leftShifting bits to the left
10 10 0 0 0 0 0
BLCF
After SHL BL, 1
Before
1 0 0 0 0 0 1 0 0
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Shifting multiple times to the leftShifting multiple times to the left SHL affects SF, PF, ZF according to the
result CF contains the last bit shifted from the
destination OF = 1 iff the last shift changes the sign bit
mov bh,0B2h ;BH = 1011 0010b
shl bh, 1 ;BH = ______b, CF=__, OF=__
shl bh, 2 ;BH = ______b, CF=__, OF=__ Overflows are signaled only for the last bit
shifted
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Fast MultiplicationFast Multiplication
Each left shift multiplies by 2 the operand for both signed and unsigned interpretations. Ex: mov al,4 ;AL = 04h = 0000 0100b = 4
shl al,1 ;AL = 08h = ______________b = ____
shl al,2 ;AL = 20h = ______________b = ____
mov bl,-1 ;BL = FFh = ______________b = ____
shl bl,3 ;BL = F8h = ______________b = ____
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Fast MultiplicationFast Multiplication Cycles Instruction
8088 80486 PentiumSHL reg, 1 2 3 1SHL reg, immed - 2 1SHL reg, CL 8 + 4n 3 4MUL reg byte 70-77 13-18 11 word 118-133 13-26 11 doubleword N/A 13-42 10
Source: 8088, 80486: Reference Microsoft MASM, Microsoft Corporation, 1992
Source: Pentium: Pentium.txt, MASM 6.13 update, Microsoft Corporation, 1993
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Fast MultiplicationFast Multiplication Multiplication by shifting is very fast. Try to
factor your multiplier into powers of 2: AX * 36 = AX * (32 + 4) = AX*32 + AX*4 So add (AX shifted by 5) to (AX shifted by 2)
That is, we might replace a multiply by 36 instruction by copy AX to BXshift AX left 5 bits (32 * AX)shift BX left 2 bits (4 * AX)add BX to AX (36 * AX)
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Fast MultiplicationFast Multiplication Multiplication using shifts on 8088
mov BX, AXmov CL, 5shl AX, CLshl BX, 1shl BX, 1add AX, BX
8088 cycles 2 4* 8+4*5 = 28* total = 41 2 2 3
4 total = 113-133 117-137
* Replace by 5 shl AX, 1commands total = 19
mov CX, 36mul CX
Normal multiplication
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Fast MultiplicationFast Multiplication Multiplication using shifts on 486 Pentium
mov BX, AXshl AX, 5shl BX, 2add AX, BX
486 cycles Pentium 1 1 2 1 2 1 1 1Total 6 4
13-26 11imul AX, 36
Normal multiplication
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SHR (Shifting bits to the right)SHR (Shifting bits to the right)
To shift to the right use:SHR dest(reg/mem),count(imm8/CL)
the msb of dest is filled with 0 the lsb of dest is moved into CF
Each single-bit right shift divides the unsigned value by 2. Ex: mov bh,13 ;BH = ______b = 13 shr bh,2 ;BH = ______b = 3 (div by 4), CF = 0 (the remainder of the division is lost)
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Arithmetic Shift SARArithmetic Shift SAR
Is needed to divide the signed value by 2:SAR dest(reg/mem),count(imm8/CL)
the msb of dest is filled with its previous value (so the sign is preserved)
the lsb of dest is moved into CF
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Arithmetic ShiftArithmetic Shift
mov ah,-15 ;AH = 1111 0001b
sar ah,1 ;AH = ________________b = -8the result is rounded down (-8 instead of -7…)
In contrast, shr ah,1 gives ____________b = 78h
SAL is the same as SHLIt is just interpreted as being for signed arithmetic
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Rotate (without the CF)Rotate (without the CF)
ROL rotates the bits to the left (same syntax) CF gets a copy of the original msb
ROR rotates the bits to the right (same syntax) CF gets a copy of the original lsb
CF and OF reflect the action of the last rotate
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Examples of ROL and RORExamples of ROL and ROR
mov ah,40h ;ah = 0100 0000b rol ah,1 ;ah = 1000 0000b, CF = 0 rol ah,1 ;ah = 0000 0001b, CF = 1 rol ah,1 ;ah = ____________b,
CF = ___ mov ax,1234h ;ax = 0001 0010 0011 0100b
= 1234h ror ax,4 ;ax = 4123h ror ax,4 ;ax = 3412h ror ax,4 ;ax = 2341h
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Rotate with CFRotate with CF
RCL rotates to the left with participation of CF
RCR rotates to the right with participation of CF
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Ex: Reversing the content of ALEx: Reversing the content of AL
Ex: if AL = 1100 0001b, we want to reverse the order of the bits so AL = 1000 0011b mov cx,8 ;number of bits to rotate
start: shl al,1 ;CF = msb of AL rcr bl,1 ;push CF into msb of BL loop start ;repeat for 8 bits mov al,bl ;store result into AL
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SHLD/SHRD InstructionsSHLD/SHRD Instructions SHLD:
SHLD dest, Source, count(imm8/CL)Shift a dest. a given number of bits to the leftThe bit positions opened up by the shift are
filled by the msb of the source operand SHRD:
SHRD dest, Source, count(imm8/CL)Shift a dest. a given number of bits to the rightThe bit positions opened up by the shift are
filled by the lsb of the source operand
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SHLD/SHRD InstructionsSHLD/SHRD Instructions Formats:
SHLD/SHRD reg16, reg16, imm8/CL mem16, reg16, imm8/CL
reg32, reg32, imm8/CL mem32, reg32, imm8/CL
Examples: .data lval word 923Bh .code
mov ax,0AC36hmov bx, 786Ahshld lval, ax, 8shrd bx, ax, 4
923B AC36
AC36 786A
3BAC AC36
AC36 6786
lval AX
AX BX
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Application: Binary OutputApplication: Binary Output
To display the number in BX in binary: MOV AH,2 ;display MOV CX,16 ; 16 chars
START: ROL BX,1 ;CF gets msb JC ONE ;if CF =1 MOV DL,’0’ ;print '0' JMP DISP
ONE: MOV DL,’1’ ;print '1' DISP: INT 21h ;print
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Multiplying with shifts and addsMultiplying with shifts and adds
Some early CPUs lacked hardware multiply Solution: Shift and add routines Advantage: "Cheaper" Disadvantage: Slow Algorithm show here is simple, faster ones
are available. Neat feature: it calculates a double width product using single width operations except for rotating
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Multiplying with shifts and addsMultiplying with shifts and adds Algorithm:
Assumes BL contains multiplicand DL contains multiplier 1. Initialize Clear accumulator AX Put 8 in CX 2. Repeat 8 times (once per bit of multiplier) Shift DL right by 1 bit into CF If CF = 1, Add BL to AH with carry in CF Rotate AX (include CF) The result is in AX.
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Multiplying with shifts and addsMultiplying with shifts and adds
Multiply PROC XOR AX, AX MOV CX, 8Repeat1: SHR DL, 1 JNC Lskip ADD AH, BLLSkip: RCR AX, 1 LOOP Repeat1 RETMultiply ENDP
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Multiplying with shifts and addsMultiplying with shifts and adds
4 bit example 0110 * 1010
DL = 1010 0101 0010 shiftCF = ? 0 1BL = 0110 0110 0110 AX = 0000 0000 0110 0000 addCF = 0AX = 0000 0000 0011 0000 rotate CX = 4 3 2
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Multiplying with shifts and addsMultiplying with shifts and adds
4 bit example 0110 * 1010 continued
DL = 0001 0000 shift CF = 0 1 BL = 0110 0110 AX = 0111 1000 addCF = 0 AX = 0001 1000 0011 1100 rotateCX = 1 0
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Extended AdditionExtended Addition
Question: Early microcomputers were only 8 bit machines. How could you add 16 or 32 bit integers? On 16 bit machines how do you add 32 bit integers?
Intel solution: ADC dest, sourceUsage rules are the same as for ADD
dest = dest + source + carry flag Example AX = 1000h, BX = 20, CF = 1
ADC AX, BX ; AX =_______h
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Add dWord2 to dWord1Add dWord2 to dWord1
dWord1 dd ? dWord2 dd ? … (Using byte arithmetic) mov al, byte ptr dWord2 add byte ptr dWord1, al mov al, byte ptr dWord2+1 adc byte ptr dWord1+1, al mov al, byte ptr dWord2+2 adc byte ptr dWord1+2, al mov al, byte ptr dWord2+3 adc byte ptr dWord1+3, al
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Extended SubtractionExtended Subtraction SBB - subtract with borrow SBB destination, source
destination = destination - source - CF Usage: just like ADC
AX = 1000h, BX = 20, CF = 1 SBB AX, BX ; AX =______h;
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Extended SubtractionExtended Subtraction
Example: Calculate X = X - Y where X and Y are double words on a 8088 with only 16 bit registers
X dd 1023321Y dd 342232… mov ax, word ptr Y sub word ptr X, ax mov ax, word ptr Y+2 sbb word ptr X+2, ax
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Integer Multiplication: A ConsiderationInteger Multiplication: A Consideration Question: if we multiply a n bit number by another,
how long could the product be? Example n = 4
1111 x 1111 1111 1111 1111 1111 11100001
The product of two n bit numbers can be 2n bits long
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Integer Multiplication - the problemInteger Multiplication - the problem
The product of two n bit numbers can have up to 2n bits
In high level languages, the product of two n bit numbers can have at most n bits
Question: If you designed the hardware, would the product of two n bit numbers have n bits or 2n bits?
VAX - n normally8088 - 2n normally
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Integer Multiplication: A ConsiderationInteger Multiplication: A Consideration Contrary to addition, the multiplication
operation depends on the interpretation: Consider byte problem: FFh x 02h = ?? unsigned interp.: 255 x 2 = 510 = 01FEh signed interpret.: -1 x 2 = -2 = FFFEh
We thus have two different multiplication instructions: MUL source ;for unsigned multiplication IMUL source ;for signed multiplication
Where source must be either mem or reg
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Multiplication (cont.)Multiplication (cont.)
MUL sourceIMUL source
Notation:Multiplicand x multplier = product
byte source AL x source = AXword source AX x source = DX:AXdword source EAX x source = EDX:EAX
Hence, there is always enough storage to hold the result
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Multiplication (cont.)Multiplication (cont.)
Nevertheless, CF=OF=1 iff the result cannot be contained within the least significant half (lsh) of its storage location lsh = AL if source is of type byte lsh = AX if source is of type word lsh = EAX if source is of type dword
For MUL: CF=OF=0 iff the most significant half (msh) is 0
For IMUL: CF=OF=0 iff the msh is the sign extension of
the lsh
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Examples of MUL and IMULExamples of MUL and IMUL
Say that AX = 1h and BX = FFFFh, then: Instruction Result DX AX CF/OF mul bx 65535 0000 FFFF 0 imulbx -1 FFFF FFFF 0
Say that AX = FFFFh and BX = FFFFh, then: Instruction Result DX AX CF/OF mul bx 4294836225 FFFE 0001 1 imulbx 1 0000 0001 0
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Examples of MUL and IMUL (cont.)Examples of MUL and IMUL (cont.)
AL = 30h and BL = 4h, then: Instruction Result AH AL CF/OF mul bl 192 00 C0 0 imulbl 192 00 C0 1
AL = 80h and BL = FFh, then Instruction Result AH AL CF/OF mul bl 32640 7F 80 1 imulbl 128 00 80 1
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Multiplication: An observationMultiplication: An observation
Observe: The differences between the double length products for signed and unsigned multiplication occur in the most significant (left) half.
In machines with single length products, the same instruction can be used with both signed and unsigned multiplication
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Additional Multiplication FormatsAdditional Multiplication Formats Question: Originally Intel believed in double
length product. What do they think now? New multiplication instructions
IMUL register, immediate (.286) ; register = register * immediateIMUL register1, register2, immediate (.286) ; register1 = register2 * immediateIMUL register1, register2/memory (.386) ; register1 = register1 * register2 ; register1 = register1 * memory
All yield single length products!
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Integer DivisionInteger Division Notation for integer division:
Ex: 7 2 = 3 r 1
dividend divisor = quotient r remainder We have 2 instructions for division:
DIV divisor ;unsigned division IDIV divisor ;signed division
The divisor must be reg or mem Convention for IDIV: the remainder has
always the same sign as the dividend. Ex: -5 2 = -2 r -1 (not -3 r 1)
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Division (cont.)Division (cont.) The divisor determines what will hold the
dividend, the quotient, and the remainder: Divisor Dividend Quotient
Remainder byte AX AL AH word DX:AX AX DX dword EDX:EAX EAX EDX
The effect on the flags is undefined We have a divide overflow whenever the
quotient cannot be contained in its destination (AL if divisor is byte...) execution then traps into INT 0h which displays a
message on screen and returns control to DOS
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Examples of DIV and IDIVExamples of DIV and IDIV
DX = 0000h, AX = 0005h, BX = FFFEh: Instruction Quot. Rem. AX DX div bx 0 5 0000 0005 idivbx -2 1 FFFE 0001
DX = FFFFh, AX = FFFBh, BX = 0002h: Instruction Quot. Rem. AX DX div bx Divide Overflow idivbx -2 -1 FFFE FFFF
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Examples of DIV and IDIV (cont.)Examples of DIV and IDIV (cont.)
AX = 0007, BL = FEh: Instruction Quot. Rem. AL AH div bl 0 7 00 07 idivbl -3 1 FD 01
AX = 00FBh, BL = FFh: Instruction Quot. Rem. AL AH div bl 0 251 00 FB idivbl Divide Overflow because 251/(-1) = -251 < -128
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Preparing for a divisionPreparing for a division
Recall that: For a byte divisor: the dividend is in AX For a word divisor:the dividend is in DX:AX For a dword divisor: the dividend is in
EDX:EAX If the dividend occupies only its least
significant half (lsh) we must prepare its most significant half (msh) for a division For DIV: the msh must be zero For IDIV: the msh must be the sign extension of
the lsh
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Preparing for IDIVPreparing for IDIV To fill the msh of the dividend with the sign
extension of its lsh, we use: CBW (convert byte to word): fills AH with the
sign extension of AL CWD (convert word to double word): fills DX
with the sign extension of AX CDQ (convert double to quad): fills EDX with
the sign extension of EAX Sign extension (recall):
if AX = 8AC0h, then CWD will set DX to FFFFh if AX = 7F12h, then CWD will set DX to 0000h
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Preparing for DIV or IDIVPreparing for DIV or IDIV
If AX and BX contain unsigned numbers, to perform AX / BX, you must do xor dx,dx ;to fill DX with 0
; faster than mov dx, 0 div bx
If AX and BX contain signed numbers, to perform AX / BX, you must do cwd ; fill DX with sign extension of AX idiv bx
Never assign the msh of the dividend to zero before performing IDIV