1 Fabrication of Active Matrix (STEM) Detectors Wei Chen Silicon Detector Group Instrumentation Division.

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Fabrication of Active Matrix (STEM) Detectors

Wei Chen

Silicon Detector Group

Instrumentation Division

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Contents

Our capabilities The concept of a diode

detector Planar-technology for silicon

detector processing New processes developed for

Active Matrix detectors Current status

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Our Capabilities

Class 100 cleanroom equipped with oxidation furnace, spin-coating track, mask-aligner, sputtering system.

Simulation tools, mask design tools and testing equipment.

Strip, Pad, Pixel, Drift, Stripixel and Active matrix detectors

We are the only one in the US

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Basic Concept of Diode Detector

P-type: 0.1m N-type: 3m W=(2sV/qNd)1/2

Nd=1/q =W2/(2sV)

V~100V, W~300m,

~3kcm

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Planar Technology for Silicon Detector Process

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Oxidation Process

Silicon Dioxide (SiO2) provides High quality insulating

barrier Impurity-diffusion barrier Passivation Gettering of impurities in Si

Dry oxygen grown oxide (32hr)

Ambient: O2 + 0.5% TCA About 0.5µm thickness

(wafer about 400µm)

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Photolithography Process

Photoresist: Positive, S1811 (Shipley) 0.5m~2.5m

Softbake: Hotplate contact or proximity Exposure: Proximity and Contact print,

ultraviolet light Developer: MF-312 (Shipley) Smallest feature: 5µm

Produces optical images in a light sensitive film (Photoresist)

Images are a reproduction of photomask

It is an integration of steps which strongly influence one another: Photoresist and application Exposure Development

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Etching Process (New challenge)

Wet etching Chemical solution Isotropic

Advantages Low cost Reliable High throughput

Disadvantages Isotropic Photoresist adhesion Non-uniformities

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Ion Implantation

Introduces dopants as ions at controlled energies

Boron: 35keV, 1x1014/cm2 (front side)

30keV, 1.2x1014/cm2 (backside) Phos.: 50keV, 4x1014/cm2 (front side)

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Deep Implantation Mask (New)

AZ4600 Shipley Positive photoresist

>5µm thickness Blocks 520keV Boron

or Phosphorus ions implantation

Boron: 2.6x1011/cm2

Phos.: 6.5x1011/cm2

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Post Implant Anneal

High temperature process repairs damage

(700ºC, 30min) Electrically activates

dopants Ambient: N2

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Metalization ProcessSputtering

Provides contacts and interconnections

Requirements– Low resistance “ohmic”

contacts– Low sheet resistance– Reliable interconnections

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Polyimide Insulation Layer Between Two Metals (New)

Spin on: 1000RPM, 10sec; 4000RPM, 30sec

Combined with photoresist lithography

Thickness of Polyimide: ~2µm

Size of opening: 10µm

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Double Aluminum (New)

Advantages of Al– Inexpensive– Ease of forming contacts– Excellent adherence to Si and

SiO2– Low bulk resistivity (2.7 -

cm)– Excellent bondability– Easy to process

Disadvantages– Spiking– Unable to sustain high

temperatures (over 450 °C) Aluminum Oxide Need Reverse Sputtering

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Plasma Clean (New)

Ambient: Ar gas Reduces the surface contamination After polyimide process After second aluminum patterning

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Current Status

Total Mask steps: 14

Total processing steps: 193

Now: at step #177 (Coating the second Al)

Remaining: Lithography for the second Al

Clean surface with plasma

Open oxide for p-n-implants Open oxide on backside for p-

implant Photoresist mask for protecting n-

region from p-implant Oxide cut for opening up anodes Al mask for covering p-region Deep p-implant Deep n-implant Post implant anneal Oxide step cut Oxide step cut on backside First metalization First metalization on backside Polyimide Second metalization

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Clean wafers

Deposit barrier layer SiO2, metal, etc. Clean wafers Coat with photoresist

Soft bake

Align masks

Exposure pattern

Develop photoresist

Hard bake

Etch windows in barrier layer

Remove photoresist

Ion-implantation or diffusion or metal deposition

more mask steps

next processing step

N

Y