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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 3, MARCH 2012 1401

Modeling and Control for a BidirectionalBuck–Boost Cascade Inverter

Honglin Zhou, Student Member, IEEE, Shuai Xiao, Geng Yang, Senior Member, IEEE, and Hua Geng, Member, IEEE

Abstract —This paper proposes a bidirectional buck–boost cas-cade inverter and presents its modeling and control methods. Theproposed inverter can be seen as the cascade of a buck converterand a boost converter, both with bipolar outputs. The buck stagemaintains the main inductor current and the boost stage controlsthe output voltage to track a given reference. With detailed analy-sis, the switching function model is established, which reveals thattheinverter hasan extra control freedom for achieving high perfor-mance. Then, the averaged model for control is given and therebythe buck–boost capability is proven. Afterward, utilizing the feed-forward compensation technique, a decoupled control scheme isdesigned. A new modulation strategy is also proposed to minimizethe dead time effect. By simulations and experiments, it is veri-

fied that the proposed system possesses the following features: 1)bidirectional operation with bipolar buck–boost output voltage; 2)reduced output distortion due to advanced modulation minimizingthe dead time effect; 3) reduced size and weight with only one mainenergy storage component; 4) decoupled linear controller design;and 5) good steady-state and dynamic performance including wideoperation range, strong robustness to load and input voltage vari-ations, fast dynamic response, and excellent overload protection.

Index Terms —Bidirectional converter, buck–boost cascade con-verter, control system, inverter, modeling.

I. INTRODUCTION

TODAY, dc–ac inverters have been widely used in variouscommercial and industrial areas such as motor driving,

energy storage, renewable energy generation, etc. The conven-

tional voltage source inverter (VSI) (also referred to as the buck

inverter) has taken a very large market share in these applica-

tions. Inheriting the characteristics of the buck converter, the

VSI can only produce an output voltage lower than its dc input.

However, in some applications, e.g., motor driving in electric

vehicle systems [1]–[3] and grid-connected fuel cell or photo-

voltaic systems [4]–[6], both the step-down (buck) and step-up

(boost) operations are required. Sometimes, the bidirectional

power handling capability of the inverter is also desired in order

Manuscript received January 15, 2010; revised July 19, 2010 and November2, 2010; accepted December 17, 2010. Date of current version February 7, 2012.This work was supported in part by the National Natural Science Foundationof China under Grant 60974130 and in part by the Power Electronics Scienceand Education Development Program of Delta Environmental and EducationalFoundation. Recommended for publication by Associate Editor B. Johansen.

The authors are with the Department of Automation, TNList, TsinghuaUniversity, Beijing 100084, China (e-mail: [email protected];[email protected]; [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2010.2103957

to recover energy or adapt for back-to-back applications in a

wind power system [7]. Therefore, it is necessary to explore an

alternative topology that can meet both of the two requirements.

Probably, the most natural solution is to use a boost+VSI

topology [8], [9]. Although the principle is straightforward, it

requires two main energy storage components (i.e., a main in-

ductor and a main capacitor) that will increase the volume,

weight, and cost of the system. Also, the control of the boost

stage is not as easy as that in ordinary dc–dc applications be-

cause of rapid and substantial variations of the load power in ac

applications.

An alternative to this is the recently developed Z-source con-verter that combines functionality of the boost and VSI into a

single stage [10], [11]. Compared to the boost+VSI scheme,

it has higher efficiency due to its compact structure, less har-

monics thanks to its second-order filtering network and less

distortion since dead time is not needed [10], [12]. On the other

side of the coin, the Z-source network increases the system

volume and cost [13], [14]. Also, with increased system order

and complexity, it leads to complicated control and modulation

strategies [15].

Another representative solution is based on the idea of dif-

ferentiating the outputs of two bidirectional, unipolar dc–ac in-

verters [9], [16]. The boost or Cuk topology of the two inverterstages enables a higher output voltage than the input while the

differential output allows a lower output voltage and eliminates

the dc bias of each inverter stage as well. Although this solution

is superior to the boost+VSI in terms of the cost and efficiency,

great difficulties are encountered in the control design. For this

topology, conventional control based on a linearized model is

no longer valid because of large variation of the operation point

in ac applications. Though effective in some cases, the sliding

mode control lacks effective control for the current loop since it

is hard to reasonably give the current reference that heavily de-

pends on the load condition [16]. The double-loop strategy [17]

enhances the current robustness, but the voltage loop is only par-

tially compensated by using a steady-state relationship, which

limits the improvement of system dynamics. Actually, the es-

sential reason leading to these difficulties can be attributed to

the strong nonlinearity of the boost (Cuk) circuit and its lack of

control freedom, as explained in Section II-C.

In fact, finding a bidirectional converter with buck–boost ca-

pabilities has long been discussed in developing the dc–dc con-

verters. For dc–dc power conversion, to handle the bidirectional

power flow, one only needs to replace the diodes in the clas-

sic step-up/down circuits, e.g., buck–boost, Cuk, buck–boost

cascade circuits, etc., with bidirectional current switches [18].

However, since these bidirectional converters cannot produce

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1402 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 3, MARCH 2012

Fig. 1. System topology of the bidirectional buck–boost cascade inverter.

a bipolar output, seldom efforts are devoted to adapt them for

dc–ac conversions. Besides the bipolar output issue, to extend

them to inverters, the control complexity should also be consid-

ered seriously. Among these topologies, the buck–boost cascade

converter is most advantageous in control [19], [20] since it has

two control freedoms. For dc–dc applications, this advantage

is not so remarkable and even offset by the cost on additional

devices to a large extent. However, for dc–ac applications, this

additional control freedom can be very favorable.

Therefore, with special consideration on the control superi-ority, an inverter that successfully extends the functionality of a

bidirectional buck–boost cascade dc–dc converter is proposed.

This paper is organized as follows. First, the operation principle

of the proposed inverter is explained. Then, the switching func-

tion model of the inverter is established with detailed analysis.

Afterward, an averaged model for control purpose is given and

the control scheme is presented. Finally, by device-level simu-

lations and experiments, the validity of the proposed inverter is

verified and its control superiorities are highlighted.

II. SYSTEM ANALYSIS AND MODELING

The topology of the proposed inverter is shown in Fig. 1. The

overall system can be seen as the cascade of a buck converter

and a boost converter, both with bipolar outputs, which are

referred to as the buck stage and the boost stage, respectively,

throughout this paper. Q1 –Q4 are unidirectional devices suchas reverse blocking insulated gate bipolar transistors (IGBTs) or

ordinary IGBTs with a blocking diode [21]–[23]. i1 and u1 arethe input current and output voltage of the buck stage while u2and i2 are the input voltage and output current of the boost stage,respectively. uL is the voltage across the main inductor L andic is the input current of the output capacitor C . Note that all of the electric variables in this figure represent their instantaneous

value and their direction denotes the selected sign convention.In conventional control for a buck–boost cascade converter,

only one of the two stages is activated while the other is kept

feedthrough, i.e., the converter assumes either the buck or the

boost topology [20]. Besides the existing characteristics of the

two topologies, this simple combination does not bring about

any new features. However, in the proposed control scheme,

the system is operating under continuous conduct mode and

both of the two stages are activated: the buck stage maintains

the main inductor current constant while the boost stage regu-

lates the output voltage to follow the given command. With this

control strategy, the control freedom of the buck–boost cascade

converter is increased, and therefore, simpler controllers and

improved performance can be obtained, as discussed in detail in

the following sections.

A. Operation of the Buck Stage

During normal operation, the inductor current is kept at a

positive value by the buck stage. Hence, there are only four

conducting patterns for the buck stage, as shown in Fig. 2(a)–(d)(the arrow denotes the actual current direction). In the positive

bucking phase (a), VT1 and VT4 are conducting and the energyis transferred from the battery to the inductor as well as the load

of the buck stage (i.e., the boost stage). Ignoring the forward

voltage of the semiconductor devices, then the relations u1 =uIN and i1 = iL hold. In the freewheeling phase (b) or (d), VD2and VT4 (or VD3 and VT1 ) are conducting and the energy istransferred from the inductor to the boost stage, so u1 = 0 andi1 = 0. Note that phases (b) and (d) are equivalent and only (b)is used in the following discussion and design. In the negative

bucking phase (c), VD2 and VD3 are conducting and the energyis transferred from the inductor and boost stage to the battery,

so u1 = −uIN and i1 = −iL .Accordingly, a bipolar voltage output can be obtained: if a

positive output voltage ū1 (barred variables represent averagedvalues throughout this paper) is desired, the buck stage will

switch in a pulse width modulation (PWM) manner between

the positive bucking and freewheeling phases. In this situation,

u1 = S VT 1 O N uIN and i1 = S VT 1 O N iL . If a negative ū1 is de-sired, it will switch between the negative bucking and freewheel-

ing phases. In this situation, these are u1 = −S VD 3 O N uIN andi1 = −S VD 3 O N iL . Here, S VT 1 O N and S VD 3 O N are the switchingfunctions [24] of VT1 and VD3

S VT 1 (V D 3 )O N =

1, when VT1 (VD3 ) is ON0, when VT1 (VD3 ) is OFF. (1)

In order to unify these two cases, define the switching function

of the buck stage as

S buckON =

S VT 1 O N , when ū

∗1 ≥ 0

−S VD 3 O N , when ū∗1

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ZHOU et al.: MODELING AND CONTROL FOR A BIDIRECTIONAL BUCK–BOOST CASCADE INVERTER 1403

Fig. 2. Conducting patterns and illustrative waveforms of the buck stage. (a) Positive bucking. (b) Free-wheeling. (c) Negative bucking. (d) Free-wheeling(unused). (e) Illustrative waveforms.

the buck stage) as well as the inductor to the load, so i2 = iLand u2 = uOU T . In the charging phase (b) or (d), one of thebridge legs is conducting (e.g., Q1 and Q2 ) and the energy istransferred from the buck stage to the inductor, so i2 = 0 andu2 = 0. The case for the negative boosting phase (c) is similar tophase (a) except that the output polarity is negative, so i2 = −iLand u2 = −uOU T .

Therefore, a bipolar current output can be obtained: if a pos-

itive averaged output current ī2 is desired, the boost stagewill switch in a PWM manner between the positive boost-

ing and charging phases. In this situation, i2 = S Q 2 O F F iL andu2 = S Q 2 O F F uOU T . If a negative ī2 is desired, it will switchbetween the negative boosting and charging phases. In this

situation, i2 = −S Q 4 O F F iL and u2 = −S Q 4 O F F uO UT . Here,S Q 2 O F F and S Q 4 O F F are the switching functions of Q2 andQ4

S Q 2 (Q 4 )OFF =

1, when Q2 (Q4 ) is OFF0, when Q2 (Q4 ) is ON.

(4)

To unify these two cases, define the switching function of the

boost stage as

S boostOFF =

S Q 2 OF F , when ī

∗2 ≥ 0

−S Q 4 OF F , when ī∗2

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Fig. 3. Conducting patterns and illustrative waveforms of the boost stage. (a) Positive Boosting. (b) Charging. (c) Negative Boosting. (d) Charging. (e) Illustrative

waveforms.

Fig. 4. Switching function model of the overall system.

Fig. 5. Block diagram of the overall system.

corresponding block diagram of the overall system is illustrated

in Fig. 5.

For the converter deriving from the conventional boost topol-

ogy, S buckON ≡ 1, so S boostOFF is the only control freedom.

On the other hand, Fig. 5 clearly reveals that the system is bi-

linear for the control input S boostOFF [17]. Then, there comes adilemma for the control: if S boost OF F was used to perform cur-rent control, the output voltage would be strongly affected, but

if it was chosen to control the voltage, the current loop might be

heavily disturbed. For dc–dc boost converters, this problem is

not so critical since its operation point is relatively constant and

some locally linearized control can achieve a good result. How-

ever, for dc–ac converters, large variation of the operation point

makes it very difficult to obtain a satisfactory dynamic perfor-

mance in terms of reference tracking and disturbance rejection.

On the contrary, for the proposed buck–boost cascade in-

verter, one more control freedom S buckON can be utilized.Therefore, decoupled control for the current and voltage is ob-

tained: S buckON is chosen to regulate the main inductor currentiL while S boostOFF is used to control the output voltage uO UT .With such a control strategy, simpler controller design and bet-

ter performance can be expected. Detailed control schemes are

given in Section III.

III. SYSTEM CONTROL

A. Averaged Model for Control

For the sake of control, a locally averaged model is often

necessary [24]. Based on the switching function model (7), the

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Fig. 6. Control scheme of the current loop.

Fig. 7. Control scheme of the voltage loop.

averaged model can be easily obtained

dīLdt

= 1

L (DbuckON ūIN − DboostOFF ūO UT )

dūOU Tdt

= 1

C (DboostOFF īL − īLoad )

(8)

where the duty cycles DbuckON and DboostOFF are the localaverage of S

buckON and S

boostOFF, respectively. Other barred

variables represent the local average of their counterparts in (7).

As previously mentioned in Section II, during normal oper-

ation, the inductor current īL is kept constant. Therefore, letdīL /dt = 0; from the first equation in (8), it can be found that

ūO UT = DbuckONDboostOFF

ūIN . (9)

Since |DbuckON | , |DboostOFF | ∈ [0, 1], this equation effec-tively proves the buck/boost capability of the proposed system.

The overall control strategy can be divided into two parts:

the buck stage controls the current loop whereas the boost stage

controls the voltage loop.

B. Current Loop Design

The control objective of the buck stage is to regulate the main

inductor current to a positive value ī∗L . From (8), in order toeliminate the disturbances from the battery input and the boost

stage, a feedforward compensator can be designed

D∗buckON = u∗L + D

∗boostOFF ūO UT

ūIN(10)

where D∗buckON and D∗boost OF F are the duty cycle commands

for the buck stage and boost stage, respectively. u∗L is the voltagereference for the main inductor, normally given by the current

controller. After this compensation, the current channel simply

becomes an integrator

d̄iLdt

= 1

Lu∗L . (11)

In order to eliminate the errors caused by parasitic parameters

and switching operation, a conventional proportional-integral

(PI) controller can be used to complete the current loop. The

current control scheme is shown in Fig. 6, where T s in the filterblock is the switching cycle. The equivalent modulation block isconstructed according to (2). However, the sign of the equation

D∗buckON = ū∗1 /ūIN is utilized instead of the variable ū

∗1 to

determine the value of S buckON . This is simply because ūIN isalways positive. The actual implementation of the modulation

block that generates the gate pulses for the switching devices

will be given later.

C. Voltage Loop Design

The control objective of the boost stage is to control the

output voltage to follow the reference u∗OU T . From (8), in orderto eliminate the disturbances from the load and the buck stage,

a feedforward compensator can be designed

D∗boostOFF = i∗C + īLoad

īL(12)

where i∗C is the current reference for the output capacitor, nor-mally given by the voltage controller. Similar to the current

loop, after this compensation, the voltage channel becomes an

integrator

dūOU Tdt

= 1

C i∗C . (13)

As a good starting point for most of the industrial applications, a

simple PI controller can be applied to complete the voltage loop.

The voltage control scheme is shown in Fig. 7. Note that the load

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Fig. 8. Output modulation for the buck stage.

current compensation can improve the dynamic response of the

system under load variation, but it is not indispensable in this

scheme. For low-cost applications, this compensation module

can be removed without modifying other parts of the design. In

these cases, the load disturbance will be totally rejected by the

PI controller, i.e., the output of the PI directly gives the reference

for ī∗2 . For high-performance applications, a PI controller cannotguarantee a perfect tracking in the case of a periodic reference,

according to the internal model principle [25]. In these cases,

the PI controller in Fig. 7 can readily be replaced by advancedcontrollers such as repetitive controller or deadbeat controller,

etc.

The equivalent modulation block is constructed according

to (5). However, the sign of the equation D∗boostOFF = ī∗2 /̄iL

is utilized instead of the variable ī∗2 to determine the value of S boostOFF . This is because īL is always positive. The actualimplementation of the modulation block will be discussed later.

D. Output Modulation

In an actual control system, the duty cycle commands

D∗

buckON and D∗

boostOFF should finally be converted to gatepulses so as to drive the switching devices. This task is per-

formed by the output modulation block.

1) Buck Stage: The modulation block of the buck stage gen-

erates logic pulses for driving VT1 and VT4 according toD∗buckON . Note that VT4 is always complementary to VD3according to the analysis in Section II-A; therefore, by referring

to the equivalent modulation block in Fig. 6, one can easily work

out the actual modulation block for the buck stage as shown in

Fig. 8, where gVT1 and gVT4 are the gate signals for VT1 andVT4 , respectively. Note that dead time is not needed for thebuck stage modulation since there is no shoot-through path.

2) Boost Stage: The modulation block of the boost stage

outputs logic pulsesfor driving Q1 –Q4 according to D∗boostOFF .Essentially, the boost stage is a current source inverter (CSI).

Conventionally, for safe commutation, an overlap time (also

referred to as the dead time in this paper) is inserted in each

switching cycle, causing waveform distortion [10]. In order to

minimize its effect, a new modulation strategy is introduced in

this paper.

To organize the modulation process properly and clearly, a

state machine-based modulation is suggested. Define the modu-

lation states as shown in Table 1. Different states correspond to

different output patterns. Note that gQ1 –gQ4 are the gate signalsrather than the actual ON / OFFstate of the switches. S 1 –S 4 are the

four main states that intend to generate conducting patterns dis-

TABLE IOUTPUT LOGICAL OF THE STATE MACHINE

Fig. 9. Conventional output modulation for a CSI.

Fig. 10. Proposed output modulation for the boost stage.

cussed in Section II-B. Roughly speaking, if a positive output

current is desired (i.e., D∗boostOFF ≥ 0), then the state machinewill switch between S 1 and S 2 in a PWM manner according toS boostOFF given by Fig. 7. Similarly, if a negative output currentis desired, then the state machine will switch between S 3 and S 4 .When the polarity of D∗boostOFF changes from positive to neg-

ative, the state machine will switch from S 1 (S 2 ) to S 3 (S 4 ) and

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Fig. 11. Experimental setup of the proposed inverter.

vice versa. For safe commutation, the conventional modulation

method simply inserts the commutation states S 5 –S 8 betweeneach of the main states to generate an overlap (see Fig. 9). The

dead time when the state remains in S 5 –S 8 , especially in S 7 andS 8 that appear in every switching cycle, can cause waveformdistortion.

The proposed modulation method in Fig. 10 can completely

eliminate the influence of S 7 and S 8 by treating them as sub-stitute states for the main states. Through careful investigation

on the commutation states, it can be discovered that S 7 (S 8 ) is

equivalent to S 1 (S 4 ) when uOU T ≥ 0, and S 7 (S 8 ) is equivalentto S 2 (S 3 ) when uOU T

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Fig. 13. Experimental results with resistive load. (a) Output voltage and main inductor current. (b) Output voltage and load current.

Fig. 14. Output voltage and load current with inductive–resistive load. (a) Proposed modulation method. (b) Conventional modulation method.

Fig. 15. Simulation results with regenerative load. (a) Output voltage, maininductor current, and load current. (b) Control variables of the buck and booststages.

voltage is desirable as it can be used to test the robustness of

the proposed control system to input voltage disturbance. A

breaking branch with a resistor Rb is added to limit its output

voltage when regenerative loads are connected. As for the pro-

posed inverter, the unidirectional devices Q1 –Q4 of the booststage are implemented by ordinary IGBTs IKW50N60T in se-

ries with fast-switching diodes IDP45E60. The controller for

the inverter mainly includes two parts, i.e., the measurement and

drive part, and the control and modulation part. The measure-

ment and drive part serves as the isolated interface between the

main circuit and its control unit. Signal amplifications, low-pass

filtering, and gate signals generating are done in this part. The

control and modulation part consists of a digital signal processor

(DSP) and a complex programmable logic device (CPLD). A

high-performance DSP TMS320F28335 with floating point unit

is used as the central processor, which allows a very straight-

forward implementation of the proposed control scheme in aC-language environment. A low-cost CPLD EPM7128 is used

to implement the modulation state machine of the boost stage

(see Fig. 10). The DSP generates the drive signals for the buck

stage as well as the switching conditions for the state machine

in CPLD. According to Fig. 10, these switching conditions in-

clude the absolute value of S boostOFF , the signs of D∗boostOFF ,

(uOU T + uth ), and (uO UT − uth ). During the experiments, dif-ferent kinds of loads are connected to the output of the inverter

to assess its performance. These loads involve the resistive load,

the inductive–resistive load with nonlinear characteristics, and

the regenerative load. Detailed explanations will be given in the

following sections.

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Fig. 16. Experimental results with regenerative load. (a) Grid voltage, output voltage, and input voltage. (b) Grid voltage and load current.

B. Steady-State Performance

1) Resistive Load: As the typical test for inverters, a resistive

load (RLoad = 110Ω) is connected to the output of the inverter.

With 96-V dc input, the inverter is commanded to generate a220 Vrms/50 Hz ac output. Simulation results are summarized in

Fig. 12. From (a), it can be seen that iL is successfully regulatedat 15 A by the buck stage. As a result, under the decoupled

control of the boost stage, the output voltage uO UT is also wellcontrolled. As to the control variables, since iL is maintainedconstant, the waveform of D∗boost OF F will reflect the averagedoutput current ī2 while the waveform of D

∗buckON will reflect the

instantaneous output power. Therefore, D∗boostOFF is expectedto be in 50 Hz and has a phase shift of arctan(2πf 0 RLoad C ) =22.5◦ while D∗buckON is expected to be in 100 Hz and greaterthan zero, both of which can be verified in (b).

The corresponding experimental results are shown in Fig. 13.The division ratios of the voltage and current probes are 100:1

and 1:1, respectively. Due to limited measurement range of the

current probe, the main inductor current is approximately halved

by its wire and the measured result is thus denoted by 0.5iL inthe figure. It can be observed that the experimental results are

in consistent with the simulation: iL is well maintained, and theoutput voltage uOU T tracks the given reference as desired.

2) Inductive–Resistive Load: This section further examines

the system’s driving capability for inductive–resistive loads,

which represent a large category of industrial loads. In the exper-

iment, a 1-kVA, 220-V single phase autotransformer is inserted

between the resistive load and the inverter. Due to its large

magnetization inductance, the phase shift of the load currentwould be obvious. Moreover, because of the saturation char-

acteristics of the core, the equivalent inductance is nonlinear,

which is useful to test the system’s robustness to different load

types. Here, the load resistor is 70 Ω on the secondary side of the autotransformer and the transformer ratio is set to 220:140.

The reference for the output voltage is still at 220 Vrms/50 Hz.

Fig. 14(a) demonstrates that the output voltage tracks the ref-

erence satisfactorily with total harmonic distortion (THD) of

only 1.67%. As expected, the load current lags behind the out-put voltage and has some distortion due to the saturation of the

core. As a comparison, Fig. 14(b) gives the waveforms when the

conventional modulation method of the boost stage is applied.

Fig. 17. Simulation results with input voltage and load variations.

Due to the dead time effect, a larger output voltage distortion

(THD = 2.68%) can be observed. Therefore, from the earliersimulations and experiments, it can be concluded that the pro-

posed system is capable of providing a bipolar, clean ac outputlarger than the input voltage.

3) Regenerative Load: For some ac motor driving applica-

tions and grid-connected applications, such as renewable power

systems, energy storage systems, etc., energy needs to be trans-

ferred from the load to the battery (or the dc-link capacitor)

temporarily or persistently. These loads fall into the category

of regenerative load. This section will demonstrate that the pro-

posed system is bidirectional and thus suitable for these appli-

cations. The output voltage reference remains the same while

the current reference i∗L is set to 10 A. In order to simulatea regenerative load, a controlled ac current source with 3.0 A

(amplitude), −180◦ phase angle (with respect to uO UT ) is em-

ployed. Fig. 15(a) shows that the output voltage can follow thegiven command and the load current has an opposite phase an-

gle, which indicates that the power flow is reversed. Fig. 15(b)

verifies that, under regenerative condition, D∗boostOFF (propor-tional to ī2 ) has a leading phase larger than 90

◦ and D∗boostOFF(proportional to the instantaneous output power) has a negative

average value.

In the experiment, since an ideal ac current source is hard to

obtain, in order to verify the bidirectional power flow handling

capability of the inverter, the inverter is actually connected to

the 220 V/50 Hz ac grid through a 3-mH filtering inductor (see

Fig. 11). For grid connection, the controller also measures the

grid voltage uG and performs synchronization and load current

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Fig. 18. Experimental results with input voltage and load variations. (a) Input voltage. (b) Output voltage and load current.

Fig. 19. Output voltage and load current under VVVF operation. (a) Simulation results. (b) Experimental results.

control. But since this section only intends to verify the sys-

tem’s bidirectional capability, these issues will not be discussed

further. The results in Fig. 16(a) show that after grid connection,

the output voltage of the inverter is well synchronized with the

grid and Fig. 16(b) proves that the regenerative load current is

successfully injected into the inverter.

C. Dynamic Performance

1) Input Voltage and Load Variations: This section inves-tigates the robustness of the proposed control to external dis-

turbances. The first disturbance that should be considered is

the load variation. For switching power converters, both of the

nominal and light load conditions are concerned [26]. Besides

the requirements on a wide load operation range, the converter

should also be capable of dealing with sudden load changes. An-

other disturbance that shouldbe noted is thevariation of theinput

voltage, which can easily cause instability of conventional boost

inverters [17]. In order to simulate these disturbances, a 100-Hz

±10% square-wave is added to the input voltage and the resis-tive load suddenly switches from 10%(968 Ω) to 100%(96.8 Ω)

and then switches back. Simulation results are shown in Fig. 17.

It can be seen that the input voltage disturbance has little effect

on the output voltage thanks to the feedforward design (10) of

the buck stage. A fast dynamic response to the large load varia-

tion can also be observed and there is only a very small variation

(about 40 V) of the output voltage during the transients. This su-

periority should be attributed to the proposed decoupled control

design with additional control freedom.

In the experiment, the output capacitor of the dc voltage

source is properly selected so that about 25-V ripple is gen-

erated under the nominal condition [see Fig. 18(a)]. The loadvariation is created by switching the load between 200 and 120

Ω manually. Similar results are obtained in the experiment; fromFig. 18(b), it is evident that the input voltage and load variations

have little influence on the output voltage, further proving the

robustness of the proposed system.

2) Variable Voltage and Variable Frequency (VVVF) Opera-

tion: For motor driving applications, VVVF operation is often

desired so as to obtain a wide speed range with stiff torque char-

acteristics [27]. This requires the inverter be able to operate in

a wide range in terms of both the frequency and the voltage. To

demonstrate such capability of the proposed system, a VVVF

command is applied to the inverter. Initially, the voltage and

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Fig. 20. Output voltage and load current. (a) Simulation results. (b) Experimental results.

Fig. 21. Output voltage and main inductor current. (a) Simulation results. (b) Experimental results.

frequency commands are set to 220 Vrms and 50 Hz, respec-

tively. From t = 0.08 s, both of them decrease with the time at aslope of −200%/s until reach 20% of their rated values, i.e., 44Vrms and 10 Hz, respectively. From Fig. 19, it can be seen that

the experiment is in good agreement with the simulation results.

With a fast dynamic response, the output voltage follows the

given command very well. Therefore, it can be concluded that:

1) the proposed system is able to generate an ac voltage higheror lower than the dc input; and 2) it has a wide operation range

with satisfactory dynamic response.

3) Overload Protection: This section will demonstrate an-

other merit of the proposed system and its control scheme. That

is, without adding extra control modules, the system is equipped

with good protection against overload. Initially, a 120-Ω resistoris connected to the inverter. To generate an overload condition, at

t = 0.105 s another 120-Ω resistor is suddenly connected in par-allel. System responses are shown in Figs. 20–21. Immediately

after the overload occurs, the load current iLoad tends to riserapidly as observed in Fig. 20. This requires the boost stage to

output more current during a switching cycle. Subsequently, ac-

cording to (6), the boost stage controller (i.e., voltage controller)

quickly increases S boostOFF . Asa result, u2 = S boostOFF uO UTincreases simultaneously. However, refer to Fig. 4, when u2 be-comes larger than the maximum output voltage of the buck stage

uIN , the inductor current iL tends to drop, as shown in Fig. 21.For the same reason, after t = 0.11 s when the output currentdecreases as the output voltage declines, iL can quickly restore

due to the recovered regulation of buck stage. In sum, duringthe transients, the output voltage and the inductor current are

effectively kept under their rated values, proving the system’s

excellent current protection.

V. CONCLUSION

With special consideration on the control superiority, a bidi-

rectional buck–boost cascade inverter is proposed in this paper.

It can be seen as the cascade of a buck converter and a boost con-

verter both with bipolar outputs. The switching function model

and the averaged model of the system are established. System

level analysis reveals that, different from boost-type converters,

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the proposed converter has one more control freedom, which

can be utilized to eliminate the system’s nonlinearity, and thus

achieve high performance. Consequently, a decoupled control

strategy with feedforward compensation technique is proposed,

where the buck stage regulates the main inductor current while

the boost stage controls the output voltage. Moreover, a new

output modulation strategy is proposed to minimize the dead

time effect.

By device-level simulations and experiments, it is verified

that the system possesses the following features: 1) bidirec-

tional operation with bipolar buck/boost output voltage almost

free of harmonics; 2) reduced output distortion due to advanced

modulation strategy minimizing the dead time effect; 3) reduced

volume and weight with only one main energy storage compo-

nent; 4) simple controller design as only two PI controllers are

needed and they can be designed separately; and 5) good steady-

state and dynamic performance involving wide operation range,

strong robustness to load and input voltage variations, excel-

lent overload protection, and fast dynamic response allowing

VVVF operation. A more thorough comparative study to theconventional inverters will be carried out and subjected to fu-

ture publications.

APPENDIX A

MAIN CIRCUIT PARAMETERS

Rated power: P 0 = 500 W.Rated input voltage: U IN 0 = 96 V.Rated output voltage: U OU T0 = 220 Vrms.Rated output frequency: f 0 = 50 Hz.Rated current of the main inductor: I L0 = 15 A.

Switching frequency: f s = 12.5 kHz.Inductance of the main inductor: L = 3.3 mH.Capacitance of the output capacitor: C = 12 µF .

APPENDIX B

CONTROL SYSTEM PARAMETERS

Current controller: kp = 22.6, ki = 5.2.Voltage controller: kp = 0.05, ki = 4.3.Hysteresis voltage: uth = 10 V.

ACKNOWLEDGMENT

The authors would like to thank G. Zhang and B. Lin for their

fundamental work on the DSP hardware platform.

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