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214 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008 Design Techniques of CMOS Ultra-Wide-Band Amplifiers for Multistandard Communications Tommy K. K. Tsang, Kuan-Yu Lin, and Mourad N. El-Gamal Abstract—This paper presents design techniques of CMOS ultra-wide-band (UWB) amplifiers for multistandard communi- cations. The goal of this paper is to propose a compact, simple, and robust topology for UWB low-noise amplifiers, which yet con- sumes a relatively low power. To achieve this goal, a common-gate amplifier topology with a local feedback is employed. The first amplifier uses a simple inductive peaking technique for bandwidth extension, while the second design utilizes a two-stage approach with an added gain control feature. Both amplifiers achieve a flat bandwidth of more than 6 GHz and a gain of higher than 10 dB with supply voltages of 1.8–2.5 V. Designs with different metal thicknesses are compared. The advantage of using thick-metal inductors in UWB applications depends on the chosen topology. Index Terms—Ultra-wide-band (UWB), CMOS integrated cir- cuits, low-noise amplifier (LNA). I. INTRODUCTION T HE ultra-wide-band (UWB) technology is experiencing a “rebirth” in the wireless arena, since the U.S. Federal Com- munications Commission (FCC) opened up a 7.5 GHz of un- licensed spectrum for commercial applications in the United States in early 2002 [1]. The potential of the UWB technology for future wireless applications is multifaceted, ranging from high data rate (i.e., Mb/s) wireless multimedia applica- tions, to low data rate (i.e., Kb/s) very low-power sensing and tracking applications [2]. In particular, the quest for low- cost system-on-a-chip (SoC) wireless systems has resulted in a remarkable growth of interest in CMOS UWB designs (e.g., [3]–[13]). There are several advantages in using an UWB technology, compared to traditional wireless technologies. An UWB signal behaves as a noise-like signal, which has low probability of in- terception and detection by unintended radio systems, due to its low equivalent isotropically radiated power (EIRP) emission limit. Besides, due to their wide bandwidth nature, UWB sig- nals have excellent multipath immunity and less susceptibility to interferences from other radios. In wireless multistandard applications, it is highly desirable to incorporate new communication standards such as the UWB Manuscript received August 14, 2007; revised November 10, 2007. This work was supported in part by the Canadian Microelectronics Corporation (CMC), the Natural Sciences and Engineering Research Council of Canada (NSERC), and the Regroupement Stratégique en Microsystèmes du Québec. This paper was recommended by Guest Editor A. Tasic. The authors are with the Department of Electrical and Computer En- gineering, McGill University, Montreal, QC H3A 2A7, Canada (e-mail: [email protected]; [email protected]; mourad.el- [email protected]). Digital Object Identifier 10.1109/TCSII.2008.918925 technology, while maintaining backward compatibility with existing standards. For these multistandard radios, the overall power consumption, chip size, and cost can be significantly reduced by multiplexing all the antennas and pre-select filters to a single UWB low-noise amplifier (LNA ) instead of using several standard specific LNAs. This paper presents two multistandard UWB LNA: a wide- band dc to 6-GHz low-power inductive peaking common-gate amplifier with local feedback (CGF), and a wide-band dc to 7-GHz gain controllable two-stage amplifier. They are designed and fabricated in a standard CMOS 0.18- m process targeting very low-power consumption applications. In Section II, a review of existing UWB amplifier designs is presented. Circuit designs for the LNA presented here are ex- amined in details in Section III. The paper will conclude with a performance summary of fabricated chips, as well as a discus- sion of the use of thick metal inductors in UWB applications. II. REVIEW OF UWB AMPLIFIER DESIGNS In the literature, both nonfeedback [3]–[9] and feedback LNA topologies [10]–[13] have been implemented to meet the different UWB receiver specifications. Examples of non- feedback UWB amplifier topologies are distributed amplifiers (DAs), which utilize several parallel transistors and artificial transmission lines to periodically combine the gain of each stage on the output line. This topology offers good wide-band input impedance matching, a relatively flat gain, a high IIP3, and a good group delay over wide-band frequencies (e.g., dc to 40 GHz) [3]–[6]. However, CMOS DA often consume high power, due to their low quality on-chip passives. With careful design optimization, UWB amplifiers with good performance (e.g., dB, dB) and moderate power consumption ( mW) can be implemented, as demonstrated in [6]. For low-cost, high-integration, and low-system-complexity applications, a single wide-band LNA is generally preferred. By using a multisection reactive network such as a Chebyshev filter [7], [8], conventional narrowband techniques for a common source LNA can be extended to wide-band applications, with moderate power consumption (i.e., mW). However, this topology requires a large number of lossy passive components at its input, thus limiting noise performance and increasing silicon area. Another popular wide-band topology of interest, due to its simplicity, is the common gate amplifier [9], [10]. By connecting the input signal to the source of a common gate amplifier, wide-band matching and gain can be achieved, through proper setting of the transconductance of the gain 1549-7747/$25.00 © 2008 IEEE
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  • 214 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008

    Design Techniques of CMOS Ultra-Wide-BandAmplifiers for Multistandard Communications

    Tommy K. K. Tsang, Kuan-Yu Lin, and Mourad N. El-Gamal

    AbstractThis paper presents design techniques of CMOSultra-wide-band (UWB) amplifiers for multistandard communi-cations. The goal of this paper is to propose a compact, simple,and robust topology for UWB low-noise amplifiers, which yet con-sumes a relatively low power. To achieve this goal, a common-gateamplifier topology with a local feedback is employed. The firstamplifier uses a simple inductive peaking technique for bandwidthextension, while the second design utilizes a two-stage approachwith an added gain control feature. Both amplifiers achieve a flatbandwidth of more than 6 GHz and a gain of higher than 10 dBwith supply voltages of 1.82.5 V. Designs with different metalthicknesses are compared. The advantage of using thick-metalinductors in UWB applications depends on the chosen topology.

    Index TermsUltra-wide-band (UWB), CMOS integrated cir-cuits, low-noise amplifier (LNA).

    I. INTRODUCTION

    THE ultra-wide-band (UWB) technology is experiencing arebirth in the wireless arena, since the U.S. Federal Com-munications Commission (FCC) opened up a 7.5 GHz of un-licensed spectrum for commercial applications in the UnitedStates in early 2002 [1]. The potential of the UWB technologyfor future wireless applications is multifaceted, ranging fromhigh data rate (i.e., Mb/s) wireless multimedia applica-tions, to low data rate (i.e., Kb/s) very low-power sensingand tracking applications [2]. In particular, the quest for low-cost system-on-a-chip (SoC) wireless systems has resulted ina remarkable growth of interest in CMOS UWB designs (e.g.,[3][13]).

    There are several advantages in using an UWB technology,compared to traditional wireless technologies. An UWB signalbehaves as a noise-like signal, which has low probability of in-terception and detection by unintended radio systems, due toits low equivalent isotropically radiated power (EIRP) emissionlimit. Besides, due to their wide bandwidth nature, UWB sig-nals have excellent multipath immunity and less susceptibilityto interferences from other radios.

    In wireless multistandard applications, it is highly desirableto incorporate new communication standards such as the UWB

    Manuscript received August 14, 2007; revised November 10, 2007. This workwas supported in part by the Canadian Microelectronics Corporation (CMC), theNatural Sciences and Engineering Research Council of Canada (NSERC), andthe Regroupement Stratgique en Microsystmes du Qubec. This paper wasrecommended by Guest Editor A. Tasic.

    The authors are with the Department of Electrical and Computer En-gineering, McGill University, Montreal, QC H3A 2A7, Canada (e-mail:[email protected]; [email protected]; [email protected]).

    Digital Object Identifier 10.1109/TCSII.2008.918925

    technology, while maintaining backward compatibility withexisting standards. For these multistandard radios, the overallpower consumption, chip size, and cost can be significantlyreduced by multiplexing all the antennas and pre-select filtersto a single UWB low-noise amplifier (LNA ) instead of usingseveral standard specific LNAs.

    This paper presents two multistandard UWB LNA: a wide-band dc to 6-GHz low-power inductive peaking common-gateamplifier with local feedback (CGF), and a wide-band dc to7-GHz gain controllable two-stage amplifier. They are designedand fabricated in a standard CMOS 0.18- m process targetingvery low-power consumption applications.

    In Section II, a review of existing UWB amplifier designs ispresented. Circuit designs for the LNA presented here are ex-amined in details in Section III. The paper will conclude with aperformance summary of fabricated chips, as well as a discus-sion of the use of thick metal inductors in UWB applications.

    II. REVIEW OF UWB AMPLIFIER DESIGNS

    In the literature, both nonfeedback [3][9] and feedbackLNA topologies [10][13] have been implemented to meetthe different UWB receiver specifications. Examples of non-feedback UWB amplifier topologies are distributed amplifiers(DAs), which utilize several parallel transistors and artificialtransmission lines to periodically combine the gain of eachstage on the output line. This topology offers good wide-bandinput impedance matching, a relatively flat gain, a high IIP3,and a good group delay over wide-band frequencies (e.g., dcto 40 GHz) [3][6]. However, CMOS DA often consume highpower, due to their low quality on-chip passives. With carefuldesign optimization, UWB amplifiers with good performance(e.g., dB, dB) and moderate powerconsumption ( mW) can be implemented, as demonstratedin [6].

    For low-cost, high-integration, and low-system-complexityapplications, a single wide-band LNA is generally preferred. Byusing a multisection reactive network such as a Chebyshev filter[7], [8], conventional narrowband techniques for a commonsource LNA can be extended to wide-band applications, withmoderate power consumption (i.e., mW). However, thistopology requires a large number of lossy passive componentsat its input, thus limiting noise performance and increasingsilicon area.

    Another popular wide-band topology of interest, due toits simplicity, is the common gate amplifier [9], [10]. Byconnecting the input signal to the source of a common gateamplifier, wide-band matching and gain can be achieved,through proper setting of the transconductance of the gain

    1549-7747/$25.00 2008 IEEE

  • TSANG et al.: DESIGN TECHNIQUES OF CMOS UWB AMPLIFIERS FOR MULTISTANDARD COMMUNICATIONS 215

    transistor. However, for an input of 50 , the required inputtransconductance has to be 20 mS, which translates intohigh power consumption. Besides, wide-band matching oftendegrades at high frequency due to parasitics.

    In addition to the multisection reactive network and thecommon gate amplifier, a feedback topology can be used toenhance the wide-band characteristics of UWB LNAs. Manyvariations of wide-band resistive feedback LNAs have beenimplemented [10], [11]. A resistive feedback offers higherstability and gain bandwidth enhancement. However, the noiseperformance is limited. Alternatively, an UWB reactive feed-back implementation provides better noise performance andan increase in linearity [12]. However, a larger silicon area isrequired.

    III. LOW-POWER UWB AMPLIFIER TOPOLOGY

    Most of the existing UWB amplifier designs are either in-evitably complex, with multiple LC elements, or consume a rel-atively high power (e.g., mW), which is not suitable forlow-power applications. The goal of this section is to proposea compact, simple, and robust topology for UWB LNAs, whichyet consumes a relatively low power (i.e., under 10 mW).

    Wide-Band Input MatchingThe use of a common-gate(CG) amplifier is a simple technique to achieve wide-band inputmatching, however, as mentioned earlier, it requires high powerto match for 50 , since the input impedance is inversely pro-portional to its . In other words, when biased under a lowcurrent condition, the input impedance of a CG amplifier ismuch higher than 50 . In order to reduce the input impedanceunder low-power/current conditions, a local feedback stage canbe added at the input [13]. The schematic of a common-gate am-plifier with a local feedback stage is shown in Fig. 1. We referto it here as the CGF topology.

    According to small-signal analysis, the input impedance ofthe CG amplifier with local feedback is given by

    (1)

    where is the voltage gain of the local feedbackstage.

    The addition of local feedback reduces the input impedanceby the amount of its own voltage gain (i.e., , whencompared to the CG stage. Qualitatively, it can be viewed as aCG stage with a boosted transconductance of .

    One important note here is that the local feedback stage in-herently adds a zero, which causes a peaking in the frequencyresponse of the system. The peaking frequency can be approx-imated by

    (2)

    where and are the parasitic gatesource andgatedrain capacitances of and , respectively.

    To avoid excessive peaking in the frequency response,should be set such that a flat band gain is achieved. Since thecontribution of is much smaller than those of the othertwo terms (i.e., and ), the resistance and the sizing

    Fig. 1. (a) Conceptual view of the inductive peaking technique. (b) Schematicof the inductive peaking CGF for UWB applications.

    of should be designed such as to place the zero at the fre-quency which would achieve the desired maximally flat band-width extension. Note that decreasing has a negative impacton the voltage gain of the local feedback, as well as on the inputimpedance (1), which has to be compensated for by increasingthe transconductance of . This is clearly not desir-able from a power consumption perspective. Hence, reducing

    (i.e., the sizing of ) is the preferred method to push thezero up in frequency. However, excessive reduction of the sizeof (resulting in a smaller ) would lead to an unaccept-able high input impedance and excessive channel thermal noise.Therefore, the sizing of has to be chosen carefully, to meetboth the noise figure and power consumption specifications.

    Bandwidth Extension TechniquesCombined with para-sitic capacitances, purely resistive loads would result in limitedhigh frequency performance. Simulations have shown that thegain roll-off starts as early as 4 GHz, due to significant nodal par-asitic capacitances, contributed by both the gain and buffer tran-sistors. This bandwidth is clearly insufficient, and bandwidth ex-tension techniques are needed. In the first design presented here,a simple inductive shunt peaking approach is used. The detailedschematic is shown in Fig. 1. This technique enhances the band-width of the amplifier by transforming the frequency responsefrom a single pole system to one with two poles and a zero,where the zero is determined primarily by the time con-stant for bandwidth enhancement. The shunt peaking inductor

    and the resistor in Fig. 1 are designed to achieve a60% bandwidth extension with an optimum group delay, whichis desirable for optimizing pulse fidelity in broadband systems[14]. The final design shown in Fig. 1 has a flat band gain above6 GHz, which is sufficient to cover both the WLAN and thelower band of the UWB standards.

    The second bandwidth extension technique explained hereutilizes a two-gain stage approach, where a wide-band first gainstage is followed by a narrowband second stage [9]. The concep-tual view of this technique and the design schematic are shownin Fig. 2.

    In this design, the first stage is implemented by a wide-bandCGF amplifier with a 3-dB cutoff frequency at around 5 GHz.1The narrowband second gain stage is designed to have the LC

    1Note that this cutoff frequency is higher than the one in the single-stage de-sign, because the second gain stage in Fig. 2 contributes less parasitic capaci-tances than the buffer stage in Fig. 1.

  • 216 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008

    Fig. 2. (a) Conceptual view of the bandwidth extension technique in a two-stage amplifier design. (b) Schematic of a gain controllable two-stage amplifierdesign for multistandard applications

    elements resonate at 7 GHz. The combination of both frequencyresponses results in bandwidth extension.

    In order to ensure a flat bandwidth extension, the peak gainof the narrowband stage should be equal to the gain of the wide-band stage. This can be achieved by properly sizing the tran-sistor of the second stage and its bias current level.

    To satisfy the dc bias point of the second stage, a dc shiftingtransistor is needed [Fig. 2(b)]. By controlling the gatevoltage of , the bias current and gain of the second stagecan be tuned. This provides an added gain-control feature forthis topology.

    IV. AMPLIFIERS PERFORMANCEWith a power budget of less than 10 mW, an upper limit for

    the transconductance and current in the CGF amplifier is set.Based on the discussion in Section II, a minimum sizing ofthat satisfies the gain requirement is chosen, while the maximumallowable sizing of , within the power budget limit, is used.The final sizing of is approximately three times larger than

    . The voltage gain of the local feedback is set to be six, whichis again constrained by the power budget, as well as the desiredinput impedance level. With a supply voltage of 1.8 V, the corepower consumption is 5.8 mW. This CGF amplifier is used forboth the first and second UWB amplifiers in this work.

    The second gain stage is a narrowband common source ampli-fier with a nominal bias current of 1 mA at 1.8 V. An ac groundcoupling capacitor is connected to the source of transistor

    , as shown in Fig. 2. The buffer stage, which is designed todrive a 50- external load for testing purposes, is independentlybiased by a current mirror. This results in a 6-dB difference be-tween the measured power gain at the output of the test setupand the actual voltage gain of the LNA core.

    Fig. 3 and 4 show the microphotographs and the S-param-eters ( and ) of the two UWB amplifiers, respectively.Both designs are implemented in a standard CMOS 0.18- mprocess. Including the buffer, but excluding all testing pads, thesingle-stage inductive peaking amplifier occupies an active areaof 0.14 mm , while the two-stage CGF amplifier consumes anarea of 0.17 mm . A ratioed design approach, with the sameunit transistor and resistor fingers, is employed to minimize theeffect of mismatch and process variations on the amplifiers per-formances.

    Fig. 3. Microphotographs of the UWB amplifiers. (a) Single-stage inductivepeaking CGF amplifier. (b) Two-stage gain controllable CGF amplifier.

    Fig. 4. Measured and plots of: (a) the single-stage inductive peakingCGF amplifier and (b) the two-stage gain controllable CGF amplifier.

    The measured and plots of the single-stage inductivepeaking CGF amplifier are shown in Fig. 4(a). A good wide-band input matching (i.e., dB) is achieved acrossthe 110 GHz band. With a power consumption of 5.8 mWat 1.8 V, a 6-GHz flat-band gain of 12 dB is achieved, with a

    3-dB cutoff frequency above 7 GHz. The amplifier continuesto provide a wide-band gain of higher than 7 dB with good inputmatching at 1.4-V supply. This demonstrates the effectiveness

  • TSANG et al.: DESIGN TECHNIQUES OF CMOS UWB AMPLIFIERS FOR MULTISTANDARD COMMUNICATIONS 217

    TABLE IPERFORMANCE SUMMARY OF THE TWO CMOS UWB AMPLIFIERS IN THIS WORK, AND A COMPARISON WITH [13]

    Fig. 5. Measured noise figure of the two UWB amplifiers in this work.

    of this approach for multistandard applications. The measurednoise figure across the 26 GHz band is ranging from 4.4 to6.7 dB, as shown in Fig. 5. Two-tone tests at 3 GHz with atone spacing of 1 MHz are performed to measure intermodu-lation (IM) distortions of the amplifier. A center frequency of3 GHz is chosen because both the IM2 @ 6 GHz and IM3 @3 GHz fall within the flat-band region of the amplifier. From theIM measurements, the second-order (IIP2) and the third-order(IIP3) intermodulation intercept points are 7 and 13.5 dBm,respectively. The measured 1-dB compression gain is

    23 dBm. The measured group delay is almost identical to theone shown in Fig. 7. The performance of this amplifier designis summarized in Table I.

    Fig. 4(b) shows the measured and plots of the two-stage UWB amplifier. At a 2.5-V supply, the amplifier has aflat band gain of 13 dB over a 7-GHz bandwidth. The 3dBcutoff frequency is at 8.5 GHz. By controlling the gate voltageof transistor in the second gain stage [Fig. 2(b)], a 5-dB con-trol of the overall amplifier gain is achieved, without affectingthe quality of the input matching. An excellent input reflec-tion coefficient of dB is achieved across the full

    Fig. 6. Measured IIP2 and IIP3 plots of the two-stage gain controllable CGFamplifier.

    Fig. 7. Measured group delay of the two-stage gain controllable CGF amplifier.

    110-GHz frequency band. The measured noise figure (Fig. 5)is 4.14.8 dB between 27 GHz. It is approximately 0.61 dBhigher than the expected value. The main causes of this discrep-ancy are the inaccurate modeling of the transistors gate noiseand the slight reduction in the overall gain of the amplifier. Fromthe two-tone test, as shown in Fig. 6, the measured , IIP2,and IIP3 are 23.7, 7.5, and 13 dBm, respectively. The mea-sured group delay is as shown in Fig. 7. Both designs have good

  • 218 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMSII: EXPRESS BRIEFS, VOL. 55, NO. 3, MARCH 2008

    Fig. 8. Measured S21 and S11 comparison plots of thick and standard metalinductor implementations of a single inductive peaking CGF amplifier.

    reverse isolation lower than 32 dB and output reflectioncoefficient lower than 13 dB, across the band of interest.The performance of this design is also summarized in Table I.A comparison to a recent LNA in the literature [13] is includedin Table I.

    Thick top metal options in modern CMOS processes are oftenused in narrowband RFIC designs, as they enable the implemen-tation of high-Q inductors for power reduction and performanceenhancement. However, this is not necessarily true for UWB de-signs, due to the inherent wide-band nature of the system. Infact, the benefits of using high-Q inductors in UWB designs de-pend on the chosen topology. For example, in the single-stageCGF amplifier of this work (Fig. 1), the inductor is onlyused for frequency peaking, and its series resistance can beeasily absorbed by the resistive load of the amplifier. Hence,high-Q inductors are not necessary in this case. Fig. 8 shows themeasured and comparison plots of the thick and stan-dard inductor implementations of the inductive peaking CGFamplifier. No significant difference is observed between the tworesponses, under the same biasing conditions. The thick andstandard metal inductors used are estimated to have Q-factorsof 10 and 6 at 5 GHz, respectively. The Agilent ADS EM-sim-ulator was used to obtain these metrics, based on the details ofthe process used.

    In the case of the two-stage UWB design in this work (Fig. 2),the thick metal inductor has a significant effect on power reduc-tion, because it is used as an inductive load in the narrowbandamplifier of the second stage. Results have shown that, for thesame gain, there is a 20% reduction in power consumption withthe use of high-Q inductors when compared to the standard im-plementation.

    V. CONCLUSIONWe have demonstrated in this work, two low-power CMOS

    UWB amplifiers for multistandard communications. Bothdesigns employ a common-gate amplifier topology withlocal feedback to achieve robust wide-band, 110-GHz, inputimpedance matching. Two different bandwidth extension tech-niques, namely inductive peaking and a two-stage topology,were examined and discussed in detail. Both UWB amplifiershave a flat bandwidth of over 6 GHz and a gain of higher than10 dB, while consuming only 5.8 and 9.3 mW, respectively,making them among the lowest power 3.110.6-GHz UWBLNAs reported to date. A 5-dB gain-controllability is incorpo-rated in one of the amplifiers, without affecting the quality ofthe input matching.

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