µ D 04EI 12.08.2013 Embedded Systems Page 1 164C L XTAL C166- C166- Core Core Port 5 Port 3 CPU Dual Port RAM 2 KByte Interrupt Controller Watchdog Peripheral Data External Instr./Data Instr./Data USART ASC BRG GPT1 16 16 16 16 32 PEC 64 K ROM (C164 CI-8RM) or OTP (C164CI-8EM) Interrupt Bus Data Data Port 8 BRG SSC Sync. Channe l (SPI) PLL-Oscillator prog. Multiplier: 0.5; 1; 1.5; 2; 2.5; 3; 4; 5 XBUS (16-bit NON MUX Data / Addresses) T2 T4 T3 13 ext. IR Full-CAN Interface V2.0B active RTC 10-Bit ADC Timer 7 Timer 8 Port 1 Timer 13 1 Comp. Channel 3/6 CAPCOM Channels CAPCOM6 Unit for PWM Generation 8 9 4 16 6 16 Port 4 8-Channels External Bus 8/16 bit MUX only & XBUS Control CAPCOM 2 8-Channel C164CI - the Peripheral devices P4.6/ CAN TxD P4.5/ CAN RxD Port 0
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Μ D 12.08.2013 Embedded Systems Page 1 C166-Core Port 5 Port 3 CPU Dual Port RAM 2 KByte Interrupt Controller Watchdog Peripheral Data External Instr./Data.
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12.08.2013 Embedded Systems Page 1
164CL
XTAL
C166-CoreC166-Core
Port 5 Port 3
CPU
Dua
l Por
t
RAM
2 KByte
Interrupt Controller
Watchdog
Peripheral Data
External Instr./Data
Instr./Data
USART
ASC
BRG
GPT1
16
16
16
1632
PEC
64 K ROM
(C164 CI-8RM)or
OTP(C164CI-8EM)
Interrupt Bus
Data
Data
Port 8
BRG
SSC
Sync. Channel(SPI)
PLL-Oscillatorprog. Multiplier:
0.5; 1; 1.5; 2;2.5; 3; 4; 5
XB
US
(16-
bit N
ON
MU
X D
ata
/ Add
ress
es)
T2
T4
T3
13 ext. IR
Full-CANInterfaceV2.0Bactive
RTC
10-BitADC
Tim
er 7
Tim
er 8
Port 1
Tim
er 1
3
1 Comp.Channel
3/6 CAPCOMChannels
CAPCOM6 Unit forPWM Generation
8 9 4 16
6
16
Port 4
8-Channels
External Bus8/16 bit
MUX only&
XBUSControl
CAPCOM 2
8-Channel
C164CI - the Peripheral devices
P4.6/ CAN TxD
P4.5/ CANRxD
Port
0
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Overview of the I/O-PortsOverview of the I/O-Ports
• The Port-pins provide the connection to the ‚outside world‘
– the C164CI has got 59 Pins for port-connections:• 4 8-Bit-Ports: PORT0 as P0H and P0L; PORT1 as P1H and P1L.• 1 9-Bit-Port: PORT3 as P3.• 1 6-Bit-Port: PORT4 as P4.• 1 4-Bit-Port: PORT8 as P8.• 1 8-Bit-Port. PORT5 as P5 usable only as input.
• All port-connections may be adressed separtely bitwise.
• All I/O-lines are indepently programmable as Input - resp. output. via a direction selection register
• The port-connections are equipped with one or more alternative functions (Periphery or BUS).
• Each port is protected via fast diods.• Some ports additionally provide to be configured as buffered
“Open-Drain”-Outputs (P3 and P8 for C164CI).• Some ports provide a special treshold rating as CMOS-level (P3 and
P8 for C164CI) beside of the qualification of the input levels as TTL-signal
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Overview of the port structure Overview of the port structure
DirectionRegister
AlternateOutput
AlternateEnable
Read
ClockAlternate Input
Inte
rnal
Bus
Buffer
Mux
Mux
OutputLatch
Write
Buffer
InputLatch
Open DrainControl
VCC
Vss
Port Pin
ESD structure
Ports Dave
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General Purpose Timer 1 (GPT 1 - 20 MHz) General Purpose Timer 1 (GPT 1 - 20 MHz)
• Three 16-Bit up/down-counter:1 Core Timer(T3) and 2 Auxiliary Timers (T2,T4)
• Clock input signals:– Timer Modus:
Internal clock input with prescaler up to 2.5 MHz / 400 ns; The clock can be connected to an external signal.
– Counter Modus: External clock up to 1.25 MHz.
– Cascading of the Core-Timer with each of the Aux.-Timer (33-Bit timer).
– Counting direction can be changed via input signal.• Output signals
– Interrupt-generation and signal switching via Core Timer T3.– Interrupt-generation via Auxiliary Timer T2 and T4.
• Reload:The Core Timer can be loaded with the content of any Auxiliary Timer.
• Capture:The content of the Core Timer can be taken over to any Auxiliary Timer
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T2 / T3 /T4 Over-/UnderflowClocka) Three independant 16 Bit-
Timer / Counter
T2 / T4Over/-Underflow
b) 32 or 33 Bit- Timer/Counter T3Clock
T3 Outputtoggle latch
T2 / T4
T3 Over-/UnderflowClock
Capture-Trigger
T2 / T4
d) 16 bit Timer / Counter with Capture -Register
T2 / T4c) 16 Bit-Timer / Counter with Reload-Register
T3 Over-/UnderflowClock
Reload-Trigger
Overview of the operating modesOverview of the operating modes
Principle of an Incremental-EncoderPrinciple of an Incremental-Encoder
Signal B
Signal A
Ref. signal
T3 Input
T3 Input
Interrupt(PEC)
C167CR
In many cases a further signal will be generated, which produces exactly one impulse per rotation and therefore the reference position of the rotation axis is indicated. This impulse could be used to realize the reseting of the T3 register via an external interrupt.
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Asynchronous / Synchronous Serial Interface Asynchronous / Synchronous Serial Interface (USART-20MHz)(USART-20MHz)
• Onboard baud rate generator
• Asynchronous operation mode with max 625 Kbaudtransmission rate
– Full-duplex (simultaneous transmitting and receiving)
– Programmable features:• 1 or 2 stop bits,• 7, 8 or 9 Data bits• Generation of Parity- or “Wake-Up”-Bits for data transmission • Even respectively odd parity bit• Error detection (Parity, Overrun, Framing)• “Wake-Up”-monitoring (receive interrupt if the “Wake-Up”-Bit is
set )
• Synchronous operation mode with max. 2.5 MBit/sec transmission rate.
– Half-duplex-mode - only transmitting or receiving possible
– Simple enlargeable via external shifting registers.
• 10-Bit ADC - operation mode is the successive approximation
– 9.7 µs conversion time.– Integrated Sample & Hold-Circuit (1.6 µs Sample-Time)– Sample-Time and Conversion Time are programmable– 8 multiplexed input channels– Automatic self calibration after each conversion
• Flexible operation modes– Single channel - and continuous single channel conversion.– Auto-Scan- and continuous Auto-Scan-conversion– Automatic start of a new conversion after access to the
current value of conversion– Channel-Injection-Modus with own result register,
can be used due to interrupt the scan mode
• Simple error handling and channel identification– 10-Bit result is located together with the channel number in
the result register.– Test on Overrun error
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Analog-Inputs
Channel selection and operation mode registerChannel selection and operation mode register
Capture / Compare Unit 2 (CAPCOM2-20 MHz) Capture / Compare Unit 2 (CAPCOM2-20 MHz)
• Two 16-Bit Timer (T7,T8), with 16-Bit Reload- Register for each Timer: Internal clock with prescaler up to 2.5 MHz (400ns).– Counter: External clock input at T7IN up to 1.25 MHz, the T3-
output signal (GPT1) can be used as clock input
• One registerfield with 16-Bit Capture/Compare Registers.– Individually programmable for the Capture- or one of the
Compare- modes– Individually assignable to the Timers T7 or T8
• Various Compare-modes for flexible generation Pulse-Width- Modulation (PWM) signals– Output-Pin changes its signal stage in case of positive
Compare.– 1 or 2 Compare-Registers act to one output-pin.– 1 or more Compare-events can be happen in one period of the
Timer – Operation modes, which are only cause interrupts, are possible
• Overrun of a 16-Bit-couter results in:– System Reset
– Activating of the output signal RSTOUT
– Set of the corresponding control bit
– WDT is still active
• Programmable input clock derived from system clock• 8-Bit-reload register for the higher significant Byte• Counter period n from 25.6µs to 470ms• Reset of the counter register (Reload) is done via special
Synchronous Serial Interface (SSC - 20 MHz)Synchronous Serial Interface (SSC - 20 MHz)
• Full duplex-mode• Own baudrate generator for high transmission rate
– up to 5 MBit/sec transfer rate
• Compatible to SPI (industrial standard)• Master- (clock is Output) or Slave-mode (clock is input)• Programmable variants for most different requirements of
the synchronous serial communication– MSB or LSB first
– Length of the data frames from 2 to 16 Bits
– Clock polarity and -phase
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SSC – BlockdiagramSSC – Blockdiagram
Baud RateGenerator
ClockControl
Control Unitwith Controland StatusRegisters
Shift Registerprogrammable from 2 - 16-bit
MSB- / LSB-First Selection
Receive Buffer
Transmit Buffer
Internal Bus
InterruptRequest
Slave Mode
Master ModeCPU
ClockMaster / Slave
Selection
P3.13 / SCLK
P3.8 / MRST
P3.9 / MTSR
SFR
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System ResetSystem Reset
The C164 distinguishes the following reset-sources
• Hardware Reset
• Software Reset
• Watchdog Timer Reset
Simple Reset-Circuit for Power-Up• 22F capacitor between the Pin RESIN# and Ground
System definition at Start-Up• Certain settings of the C164CI have to set just before the excecution of
üthe first instruction (BUS-Configuration, CS#-Signals, internal/external ROM ...)
• EA# - Pin determines external/internal program memory• Due to set further definitions the levels applied at Port0 and the Pin
RD# are used during the reset ( 1 = HIGH = without load
0 = LOW = Pull-Down-resistance RPD 8k2 )
Bootstrap-Mode at Start-Up• Allows programming of a Flash-EPROM
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System Start ConfigurationSystem Start Configuration
Pin EA# (External Access) = '1' Program start from internal ROM = '0' Program start from external ROMPin RD# (Read) = '1' Oscillator watchdog disabled
= ‘0' Oscillator watchdog enabled
SFR
Reset state of Port0 P0H, P0L
H7 H6 H5 H4 H3 H2 H1 H0 L7 L6 L5 L4 L3 L2 L1 L0
Port P0 SALSEL CSSEL WRC BUSTYP ADP EMU
CLKCFG SALSEL CSSEL WRCRP0H
ClockGenerator
Port 4Logic
Port 4Logic
to internal controll logiconly at HW-Reset
SYSCON BUSCON 0
CLKCFG
RD#
SMOD
EA#
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Bootstrap LoaderBootstrap Loader
• SMOD = 1011 during a Hardware-Reset
• ASC0 is waiting for a Null-Byte
• From the duration of the Null-Bytes automatically the necessary baudrate is detected
• C164 returns an identifier with this baudrate
• Exactly 32 Bytes are deposited via the serial interface in the internal RAM at 0xFA40 - 0xFA5F
• Afterward the program start at address 0xFA40 is executed