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Microsoft Word - .doc(Guard
(Four-path input)
Orthogonal Frequency Division Multiplixing (OFDM) modulation makes
use of
a longer symbol duration with a guard interval to reduce frequency
selective fading
and inter symbol interference (ISI). Multipath transmission results
in frequency
selective fading. In OFDM, subchannel signals with narrow frequency
bandwidth will
suffer amplitude attenuation only; therefore, much simpler
frequency equalizers are
enough to compensate the amplitude distortion, which greatly
reduces the receiver
complexity. In OFDM, the transmitter needs to calculate the IFFT of
the input signal
to generate the baseband (complex-valued) signals; and the receiver
needs to calculate
the FFT. If the IDFT/DFT is calculated directly, it will waste the
computation
resources; thus, the application of the IFFT/FFT is necessary. One
of the key
techniques in the OFDM system is the IFFT/FFT. The purpose of this
thesis is to
design an efficient OFDM IFFT/FFT processor for the system. The
calculation speed,
number of multipliers, gate count, write, read and latency are
taken into account in
design. The pipeline structure used in this design involves the
real-time process of the
four-path input and cascade-delay-commutator. To get the optimum
realization of the
factor ( N 1 ) in the IFFT calculation , we propose to use the
adaptive shift dividing
concept.
3
4-11
4-12 EvenOdd stage
4x 6
co m
m ut
at or
sw itc
h bZ −
4-1112 ))()(( cbaZ −−− a
b=2ac=3a a Even Stage(1) a=4 clock Odd Stage(1) a=2 clock Even
Stage(2) a=1 clock
4x64x2
standard
(real-time) IC IC MasterBlaster Communication Cable ByteBlasterMV
Download Cable Quartus IC
IC FPGA ELA(Embedded Logic Analyzer)
SignalTap Altera LE ESB Channel()
LE ESB
4-29 IFFT
4-1 IFFT
IFFT
4-30 FFT
4-3 FFT
FFT
(Pipeline)
Veriolg
26MHz OFDM
128 256 … CE Delay Commutator
50
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