( 128×RGB×160 1.9” )Address setup time Tas6 0 - - ns Address hold time Tah6 0 - - ns Write cycle time Tcyc6 90 - - ns Write pulse “L” width Twrlw6 35 - - ns Write pulse “H”

CUSTOMER： SPEC. NO.:

APPROVED BY: ISSUED:

DATE: PAGE:

Densitron Technologies PLC □APPROVAL FOR SEPCIFICATIONS ONLY

□APPROVAL FOR SPECIFICTAIONS AND SAMPLE

MODEL NO.：DV-CS128160 F19

( 128×RGB×160 1.9” )

REVISION：A

COLOR STN LCD MODULE

LCM R&D CENTER APPROVED BY CHECKED BY PREPARED BY

DIRECTOR MANAGER Firmware Engineer Mechanism Engineer Electronic Engineer

www.densitron.comNovel Engineering Worldwide Solutions

London , Los Angeles, Tokyo, Newcastle, Nantes, Lyon, Munich, Helsinki, Hong Kong, Taipei

SPEC. NO. MODEL NO. PAGE

DV-CS128160 F19 2

TABLE OF CONTENTS

NO CONTENTS PAGE

1 COVER 1

2 TABLE OF CONTENTS 2

3 RECORD OF REVISION 3

4 GENERAL SPECIFICATION 4

5 MECHANICAL SPECIFICATION 5

6 ABSOLUTE MAXIMUM RATING 5

7 ELECTRICAL-OPTICAL CHARACTERISTICS 6

8 OPTICAL CHARACTERISTICS 7

9 INTERFACE PIN ASSIGNMENT 9

10 BLOCK DIAGRAM 10

11 LCD MODULE DRAWING 11

12 TIMING CHARACTERISTICS 12

12 INSTRUCTIONS SET 16

13 RELIABILITY 19

14 LIFE TIME 19

15 SPECITICATION OF QUALITY ASSURANCE 20

16 HANDLING PRECAUTION 27

SPEC. NO. MODEL NO. PAGE DV3 DV-CS128160 F19 3

RECORD OF REVISION

REV COMMENT PAGE DATE

A 27 01/24/2003

SPEC. NO. MODEL NO. PAGE. DV3 DV-CS 128160 F19 4

GENERAL SPECIFICATION

ITEM CONTENTS

Display Format 128 RGB(W) × 160 (H ) Dots

Color 4096 colors

Dot Size 0.068 (W) ×0.215(H) mm

Dot Spacing 0.012 (W) x 0.009(H ) mm

View Area 33.1 (W) × 42.4 (H) mm

Outline Dimensions 38.5(W ) ×51.9(H) ×6.1(D) mm

Pixel (configure) Stripe

LCD Type STN Gray STN Yellow Green STN Blue FSTN Positive FSTN Negative TN Color STN

Polarizer mode Reflective Transflective Transmissive : Reflective Transflective : CS128160F19

View Angle 6 O’clock 12 O’clock Others

Duty Ratio 1/160

Driver IC HM17CM4096

Backlight LED EL CCFL

Backlight Color Yellow green White Amber Blue Green Other

Backlight Driver type Internal Power External Power

DC/DC Converter Within

Brightness 45 cd / m2

Contrast Ratio 18

Temperature Range 0℃~+50℃ -20℃~+70℃ -30℃~+80℃

Weight 12 g

SPEC. NO. MODEL NO. PAGE. DV3 DV-CS 128160 F19 5

MECHANICAL SPECIFICATION

ITEM CONTENTS

Module Size 38.5 (W) ×51.9(H) ×6.1(D) mm

View Area 33.1(W) mm × 42.4 (H) mm

Dot Size 0.068 (W) mm ×0.215 ( H ) mm

Dot Spacing 0.012 ( W ) mm ×0.009 ( H ) mm

Duty Ratio 1/160 duty

ABSOLUTE MAXIMUM RATING(Ta=25℃ VSS=0V)

Item Symbol Min. Type Max. Unit Humidity

Power Supply for Logic VDD-VSS -0.3 - 4.0 Volt

Power Supply for LCD*3 VDD-Vo -0.3 - 25 Volt

Input Voltage VIN -0.3 - VDD+0.5 Volt Operating Temperature *1 Top -20 - +70

℃ 70%max.

Storage Temperature *2 Tst -30 - +80 ℃ 85%max.

LED Forward current LED(Back

Light) 0 45 60 mA

＊1: Background color changes slightly depending on ambient temperature. This phenomenon is reversible.

Ta≦70℃: 80% RH max

＊2: Ta≦85℃: 85% RH max

＊3：Vout = number of boosting steps ×VDD≦18V absolute maximum ratin

SPEC. NO. MODEL NO. PAGE. DV3

DV-CS12160 F19 6

ELECTRICAL-OPTICAL CHARACTERISTICS (Ta=25℃, VDD=3.0V , VSS=0V

Item Symbol Condition Min. Typ. Max. Unit

Power Supply for Logic VDD1 Ta=-20~70℃ 1.7 3.0V 3.3 Volt

Power Supply for Driver IC VDD2

VDD

- 2.4 - 3.3 Volt

SUPPLY VOLTAGE VEE - 2.4 - 3.3 VIL L level 0 - 0.2 VDD Volt

Input Voltage VIH H level 0.8 VDD 1 - VDD Volt

Ta＝-20℃ - - -

Ta＝0℃ - - -

Ta＝25℃ 17.5 18 18.5

LCD Driving Voltage VDD=3.0VVDD-Vo=18.0V

Ta＝50℃ - - -

Volt

VLCD=10V - 1 2 LCD Driver Output On Resistance

Ron1 │△Von│=0.5V VLCD=6V - 2 4

KΩ

LCD Driving Voltage VLCD VDD=3.0V

VDD-VO=17.0 16.5 17 17.5 Volt

Boosting Output Voltage Vout

Ta=25℃ NX boosting

(N=2~6) RL=500KΩ

(Vout – Vss)

N*VEE*0.95

- - Volt

IDD - 1.6 2.0 Power Supply Current for LCM ILED

VDD=3V - 45 -

mA

Luminous Inteusity

L (White)VLED-VLSS=3.6V

30 45 - cd / m2

X 0.26 0.315 0.33 Emission Wavelength

(White) Y IF=45mA

0.29 0.305 0.32 -

SPEC. NO. MODEL NO. PAGE. DV3 DV-CS 128160F19 7

OPTICAL CHARACTERISTICS

Item Symbol Min. Typ. Max. Unit Condition Note

Θ1-Θ2 -- 25 -- deg.Viewing Angle

Φ -- 20

--

deg.

1.2

Contrast Ratio

Cr 14 18 -- -- Θ=20。 Φ=0。

3

Tr -- 140 -- ms Θ=20。 Φ=0。

4

Response Time (fall)

Tf -- 210 -- ms Θ=20。 Φ=0。

4

Frame Frequency

FLM 115 120 125 Hz -- --


DV3

DV-CS128160F19 8

Note 1. Definition of angle Θ & Φ Note 2. Definition of viewing angle Θ1 & Θ2

Note 3. Definition of contrast ratio (Cr)

Note 4. Definition of response time

X' (Φ= 90。)

Y' (Φ= 0。)

Φ

X (Φ= 270。)

Y (Φ= 180。)

C r

Θ1 < 20。< Θ2

2

Θ1 20。 Θ2

Θ1

Θ2

Driving Voltage(V)

Intensity

Cr Max

100％

Vop

Selected Wave

Non-selected Wave

[positive type]

Cr = Loff / Lon

Driving Voltage(V)

Intensity

Cr Max

100％

Vop

Selected Wave

Non-selected Wave

[Negative type]

Cr = Lon / Loff

Intensity

90％100％

Tr

10％

Tf

Non-selectedConition

Non-selectedConitionSelected Conition

[positive type]

Intensity

90％100％

Tr

10％

Tf

Non-selectedConition

Non-selectedConitionSelected Conition

[Negative type]


DV3 DV-CS128160 F19 9

INTERFACE PIN ASSIGNMENT PIN

NO. PIN OUT FUNCTION DESCRIPTION

1 VEE VEE(FOR LCD DRIVING)

2 VSS VSS

3~18 D0-D15 Data Bus

19 WRB It goes active LOW when connected to the 80 series MPU. This pin connects WRB signal from the 80 series MPU. Signal on the data bus is latched at the positive going edge of WRB signal.

20 RS Input data selestion pin.(H:instruction L:display data

21 CSB This pin is used to enter chip select signal. It is activated when CSB is LOW, enabling interface with MPU.

22 RESB Causing RESB to LOW performs initialization. Reset operation is performed according the level of RESB signal. 23 VDD VDD

24 VSS VSS

25 SEL68 CPU Interface selection port (H:68 serias,L:80series)

26 CA LED A

27 AN LED K

28 RD(E) Read control input pin


BLOCK DIAGRAM

V3V2V1VLCDVOUT

C5+C5-C4+C4-C3+C3-C2+C2-C1+C1-

RS/WRD0D1D2D3D4D5D6D7

D11D12D13D14D15VREGVBAVREFVEE

V4

D3

V1

V4

V2V3

C2+

C5-

VOUTVLCD

C5+

C3+C4-C4+

C3-

/WR

C1+C2-

RS

C1-

D1D0

D2

D5D4

D7D6

VREG

VREFVEE

C10

C13C12C11

C5

C8C9

C4

C3

C2

C1

D3

/WRRS

D1D0

D2

D5D4

D6D7

/RESGND/RD

SI

CAAN

SCL

GND

VEE C7C8

FPC

COG

HM

17CM

4096

128 x RG

B x 160

384 OU

T 80O

UT

80O

UT

13

1718

1514

1112

109

678

5

1920

43

1

2

16

D8

D10D9

D11

D9D10

D8

D14D13D12

D15

C6C6-C6+

C6-C6+

RD

RESBVDDVSSSEL68

CSB

RD

RESB

VSSSEL68

VDD

CSB

RD

RESB

VSSSEL68

VDD

CSB

24

2625

2223

21

2728

※VDD-OSC1 OSC2 TEST2 P/S


DV3 DV-CS128160 F19 11

()

()

()

( )

( )

(FF0 1R28SA1[JAE])

(FF01R28SA1[JAE])

()

<Interface signa l>

AN17011

( )

DETAIL (S=4/1)

User's PCB(t=1.1mm)

FPC

()

DETAIL (S=4/1)

012

013

014

015

VSS

VEE

CSB

210711

VSS

0414

0506

RESB

2223

VDD

1213

0203

SEL68

2 524

26 CA

1516

21

35

46

(Active area)

(Viewin

g area)

(Active area)

(Viewing area)

( )

()

!O0.8

281

CN1

(Relnf

orvtre

nl boa

rd)

! O 0.08

DETAIL CN1 1:2

008

009

010

WRB

0001

RD(E)

2827

1819

RS

20

28

108

79

1

! O 0.03(Pattern minth)

t=0 .12±0.0 3

(1.8

min)


＊Host Interface Timing Diagrams(80-family MPU)

CS=0

Write timing

Tah8Tas8

Twrlw8

Tds8

Twrhw8

Trcyc8

CS

RS

RD

WR

D0 TO D7(Input)

＊note: All the timings must be specified relative to 20% and 80% of VDD voltage

Table 7 VSS=0 V, VDD=(2.9~3.1)V ITEM SYMBOL MIN TYP MAX UNIT

Address setup time Tas8 0 - - ns

Address hold time Tah8 0 - - ns

Write cycle time Tcyc8 90 - - ns

Write pulse “L” width Twrlw8 35 - - ns

Write pulse “H” width Twrhw8 35 - - ns

Data setup time Tds8 30 - - ns

Data hold time Tdh8 5 - - ns

SPEC. NO. MODEL NO. PAGE DV3 DV-CS128160F19 13

(80-Family MPU)

CS=0

Read timing

Tah8Tas8

Twrlw8

Tds8

Twrhw8

Trcyc8

CS

RS

RD

WR

D0 TO D7(Input)

＊note:All the timings must be specified relative to 20% and 80% of VDD voltage.

Table8 VSS=0 V, VDD=2.85~3.05V ITEM SYMBOL MIN TYP MAX UNIT








SPEC. NO. MODEL NO. PAGE. DV3 DV-CS128160 F19 14

＊ HOST Interface Timing Diagrams (68-family MPU) for Main LCD panel

CS=0

Write timing

Tah6Tas6

Twrlw6

Tds6

Twrhw6

Trcyc6

CS

RS

RD

WR

D0 TO D7(Input)

＊Note:All the timing must be specified relative to 20% and 80% of VDD voltage.










DV3 DV-CS-128160 F19 15 ＊ (for 68-family MPU)

CS=0

Read timing

Tah6Tas6

Twrlw6

Tds6

Twrhw6

Trcyc6

CS

RS

RD

WR

D0 TO D7(Input)

＊Note:All the timing must be specified relative to 20% and 80% of VDD voltage.







Data setup time Tds6 - - 70 ns



Command table 【LCD panel driver HM17CM4096】 CODE(80 series

I/F) REflag Resister address Control address

INSTRUCTION cs RS RD WR RE2 RE1 RE0 D7 D6 D5 D4 D3 D2 D1 D0

function

X address(lower) 0 1 1 0 0 0 0 0 0 0 0 AX3 AX2 AX1 AX0 X address(upper) 0 1 1 0 0 0 0 0 0 0 1 ＊ AX6 AX5 AX4

Write in to display

RAM Y address (lower) 0 1 1 0 0 0 0 0 0 1 0 AY3 AY2 AY1 AY0 Y address (upper) 0 1 1 0 0 0 0 0 0 1 1 AY7 AX6 AX5 AX4

Write in to display

RAM Display start line

set(lower) 0 1 1 0 0 0 0 0 1 0 0 LA3 LA2 LA1 LA0

Display start line set(upper)

0 1 1 0 0 0 0 0 1 0 1 LA7 LA6 LA5 LA4

RAMY address setting

corresponds to scan start line of common driver

Nline inversion set (lower)

0 1 1 0 0 0 0 0 1 1 0 N3 N2 N1 N0

Nline inversion set (upper))

0 1 1 0 0 0 0 0 1 1 1 N7 N6 N5 N4

quantity setting of

line inversion

Display control(1) 0 1 1 0 0 0 0 1 0 0 0 SHIFT MON ALL ON ON/ OFF (1) Display control(2) 0 1 1 0 0 0 0 1 0 0 1 REV NLIN SWAP REF (2) Increment control 0 1 1 0 0 0 0 1 0 1 0 WIN AIM AYI AXI (3)

Power control 0 1 1 0 0 0 0 1 0 1 1 AMPON HALT DC ON ACL (4) LCD duty set 0 1 1 0 0 0 0 1 1 0 0 DS3 DS2 DS1 DS0 LCD driver duty ratio set

Boosting coefficient set 0 1 1 0 0 0 0 1 1 0 1 ＊ VU2 VU1 VU0 Boosting times setBias ratio set 0 1 1 0 0 0 0 1 1 1 0 ＊ B2 B1 B0 LCD drive bias set

RE register set 0 1 1 0 0/1 0/1 0/1 1 1 1 1 TST RE2 RE1 RE0 Reflag set Gradation palette set 0 1 1 0 0/1 0/1 0/1 0/1 0/1 0/1 0/1 Gradatioon palette (5) Display start command set 0 1 1 0 1 0 0 0 1 1 0 SC3 SC2 SC1 SC0 Common driver scan start set

Display signal output set 0 1 1 0 1 0 0 0 1 1 1 ＊＊＊ SONControl of outputs status of CKL, CL,FLM,FR 0CKL, CL, FLM,FR=”L”(default) 1CKL,CL,FLM,FR=”H”

Display selection control 0 1 1 0 1 0 0 1 0 0 0 PWM C256 FDC1 FDC2RAM data length 0 1 1 0 1 0 0 1 0 0 1 HSW ABS CKS WLS

(6)

Electric volume control (lower) 0 1 1 0 1 0 0 1 0 1 0 DV3 DV2

Electric volume control (upper) 0 1 1 0 1 0 0 1 0 1 1 ＊ DV6 DV5 DV4

Address set for internal address reading 0 1 1 0 1 0 0 1 1 0 0 Address for register read

DV2

Oscillator Rf control 0 1 1 0 1 0 0 1 1 0 1 ＊ RF2 RF1 RF0 RF:ocillator Rfselection discharge 0 1 1 0 1 0 0 1 1 1 0 ＊＊＊ DIS Cap OF vlcd, v1~v4 discharge


DV3 DV-CS128160 F19 17

Window end X address Set (lower)

0 1 1 0 1 0 1 0 0 0 0 EX3 EX2 EX1 EX0

Window end X address Set (upper) 0 1 1 0 1 0 1 0 0 0 1 ＊ EX6 EX5 EX4

Xend address

Window mode

Window end Y address Set (lower) 0 1 1 0 1 0 1 0 0 1 0 EY3 EY2 EY1 EY0

Window end Y address Set (upper) 0 1 1 0 1 0 1 0 0 1 1 EY7 EY6 EY5 EY4

Y end address under

window mode

Line inversion start address(lower) 0 1 1 0 1 0 1 0 1 0 0 LS3 LS2 LS1 LS0

Line inversion start address(upper) 0 1 1 0 1 0 1 0 1 0 1 LS7 LS6 LS5 LS4

End line address set under line

inversion mode

Line inversion end address(lower) 0 1 1 0 1 0 1 0 1 1 0 LE3 LE2 LE1 LE0

Line inversion end address(upper) 0 1 1 0 1 0 1 0 1 1 1 LE7 LE6 LE5 LE4

End line address set under line

inversion mode

Line inversion control 0 1 1 0 1 0 1 1 0 0 0 ＊＊ BT LREV

Gradation palette setting selection 0 1 1 0 1 0 1 1 0 0 1 ＊＊＊ PS

BT:blink type set LREV:line inversion ON/OFF

PWM mode control 0 1 1 0 1 0 1 1 0 1 0PW

MS

PW

MA

PW

MB

PW

MC

PWM mode

selection

(＊mark is Don’t Care) (1) SHIFT:common shift drection set,MON:BW/gradation display,ALLON:all on,ON/OFF control

(2) REV:display positive/negative,NLIN:n line inversion ON/OFF,SWAP:display data swap,REF:segment positive/negative

(3) WIN:window selection,AIM:increment timing selection,AYI:Y increment,AXI:X increment

(4) AMPON:internal OP AMP.ON,HALT:power save,DCON:boosting circuit ON,ACL:reset

(5) See the specification of LCD driver HM17CM4096

(6) PWM:variable 16/fixed 8gray mode selection,C256:256 color mode ON/OFF(default:OFF),FDC:boost clock control,HSW

:high speed WLS:RAM access length 8/16 bit


DV3 DV-CS128160 F19 18 Power sequence

(1) Power on Power on (VDD,VEE) ↓ Power will stable ↓ RESET ↓ WAIT ↓ Function setting by command RE register set Electrical volume set Bias ratio control set Number of boosting step set Number of alternated reverse line set ↓ Power circuit on DCON=”1”,AMPON=”1” Setting display data function to RAM Display start line set Setting address increment control Setting X address Setting Y address Write display data ↓ Setting gradation function Set Gradation Palette Register RE register set Set Gradatiion LSB Set Gradation Display mode ↓ Setting display function on master Display start common RE register set Display start line set Display Duty set ↓ End of power on setting (2) Power off Any condition ↓ Setting operational function Display off and discharge*3 (Setting HALT=”1” or make reset operation) Setting D/S=”1” (Discharge V0-V4 capacitor) ↓ WAIT*2) ↓ *2)minimum 20ms Power off (VEE,VDD) During Discharge V0-V4 capacitor


DV3

DV-CS128160 F19 19

Life Time Item Description

1.

Functions, Performance, appearance, etc. shall be free from remarkable deterioration within MTBF 2,000 hours under ordinary operating and storage conditions room temperature (25±10ºC) , normal humidity(45±20%RH),and in area not exposed to direct sun light.

2. The half Life of back-light Module will be more than 50,000Hrs

Test item Test condition Evaluation and assessment Operation at high temperature and humidity

50℃±2℃ 90%RH for 120 hours

No abnormalities in functions* and appearance**

Operation at high temperature

70℃±2℃ for 120 hours No abnormalities in functions* and appearance**

Thermal shock -20~+70℃ Left for half hour at each temperature ，transition time 5minute ，repeated 27times


Operation at Low temperature

-20 ±2℃ for 120 hours No abnormalities in functions* and appearance**

Vibration Sweep for 1 min at 10Hz， 55Hz，10Hz，amplitude 1.5 mm 2hrs each in the X，Y and Z directions


Drop shock Drop shock No abnormalities in functions* and appearance**

SPEC. NO. MODEL NO. PAGE.

DV3 DV-CS128160 F19 20

1.Specification of quality assurance

1.1 Purpose This standard for quality assurance should affirm the quality of LCD module products to supply to ˍˍˍˍˍˍˍˍˍ（Purchaser） by VBSET ELECTRONIC LTD.（Supplier） 1.2 Standard for Quality Test 1.2.1 Test method :According to MIL-STD-105E,General Inspection Level II take a single time. 1.2.2 Electronic Assemblies Standard is according to IPC-A-610 Rev. C .CLASS 2 1.2.3 The defects classify of AQL as following list .

Classify Inspect item Nonconforming status AQL Remark （1） Non-Display （2） Occur high current （3） Segment missing （4） LCD with wrong

viewing direction

1.Display damage

（5） Back light unlighten

AQL=0.65

Product no function

Critical defect

2.Dimension not correct

（1）Holder & Bezel out of specification

AQL=0.65 Can not assembly

（1）Display scanned Disorder

1.Display

（2）display defect （1）Flash，duct

Major defect

2.Back-light （2）Wong color

AQL=1.0

（1）Dust（Black spot， white spot）（2）Polarizer scratch （3）Reflective polarizer with bubble （4）Display segment transfigure

Minor defect

1.LCD

（5）Color out of the range of sample color

AQL=2.50

Appearance defect

Total AQL=2.50 .

1.3 NONCONFORMING ANALYSIS＆DEAL WITH MANNERS 1.3.1 Nonconforming analysis: · Purchaser should supply the detail data of non-conforming sample and the improper state.


DV3 DV-CS128160 F19 21 · After accepting the detail data from purchaser，the analysis of

Nonconforming should be finished in two weeks. · If supplier can not finish analysis on time，must announce purchaser.

1.3.2 Disposition of nonconforming : · If the customer will fine any defected product during assembly time， supplier will replace the good product for every defect after. · Both supplier and customer should analysis the reason and discuss the disposition of nonconforming when the reason of nonconforming is not sure.

1.4 Agreement items

Both sides should discuss together when the following problems happen. 1.4.1 There is any problem of standard of quality assurance，and both sides

Think that must be modified. 1.4.2 There is any argument item which does not recorded in the standard of quality assurance. 1.4.3 Any other special problem.

1.5 Standard of the product appearance test

1.5.1 Manner of appearance test

· The test must be under 20W×2 or 40W fluorescent light，and the distance of view must be at 30cm.

· When test the model of transmissive product must add the reflective plate. · The test direction is base on about 45º of vertical line

SPEC. NO. MODEL NO PAGE

DV3

DV-CS128160 F19 22

Definition of area: A area:viewing area B area:out of viewing area(outside viewing area) 1.5.2 Standard of appearance inspection : (Unit:mm)


DV3 DV-CS128160F19 23


DV3 DV-CS128160 F19 24

Name:LCM Inspection Specification

Scope LCM Item Criterion

3.Polarizer scratch Following the dust specification of time type

4.Polarizer bubble (1) Bubble could be seen by eyes exidently to be judged According to black spot specification

(2) Not allow polarize jutting glass outside.

Size Acceptable Q’TY Area A B Ψ


DV3 DV-CS128160 F19 25

Name :LCM Inspection Specification

Scope LCM

Item Criterion

6.Spgmenter transfigure

(Digit,word,sign)

b.dot Matrix display

Size Acceptable Q’TY a,b≦0.1 Accept no dense

(a+b)/2≦0.1 Accept no dense 0.5＜Ψ＜1.0 3

Total acceptable Q’TY 7 (2)a. Segment are not same width b.Segment are not equal no length and size within ±15% of production specification

w

a b


DV3 DV-CS128160 F19 26

Name: LCM Inspection Specification

Scope LCM

Item Criterion 7.Segmenter transfigure(Digit, word,sign)

c. Alignment layer defect: Ψ=(a+b)/2

a

b

Size Ψ Acceptable Q’TY

Ψ≦0.4 Accept no dense

0.4

SPEC NO. MODEL NO. PAGE

DV3

DV-CS128160 F19 27 HANDLING PRECAUTION 1.Mounting Method

The panel of the LCD Module consists of two thin glass plates with polarizes which easily get damaged since the Module is fixed by utilizing fitting holes in the printed circuit board. Extreme care should be taken when handling the LCD Modules.

2.Caution of LCD handling & cleaning When cleaning the display surface, use soft cloth with solvent (recommended below) and Wipe lightly. -Isopropyl alcohol -Ethyl alcohol -Trichlorotriflorothane Do not wipe the display surface with dry or hard materials that will damage the polarize surface. Do not use the following solvent： -Water -Kettle -Aromatics

3.Caution against static charge The LCD Module use C-MOSLSI drivers, so we recommend end that you connect any unused input terminal

to VDD or VSS, do not input any signals before power is turned on. And ground your body, Work/assembly table. And assembly equipment to protect against static electricity.

4.Packaging -Modules use LCD elements, and must be treated as such. Avoid in tense shock and falls from a height. -To prevent modules from degradation. Do not operate or store them exposed directly to

sunshine or high temperature/humidity.

5.Caution for operation -It is indispensable to drive LCD’s with in the specified voltage limit since the higher voltage than the

limit shorten LCD life. An electrochemical reaction due to direct current causes LCD deterioration, Avoid the use of direct current drive. -Response time will be extremely delayed at lower temperature than the operating temperature range and

on the other hand at higher temperature LCD's show dark color in them.

However those phenomena do not mean malfunction or out of order with LCD's. Which will come back in the specified operating temperature range.

- If the display area is pushed hard during operation, some font will be abnormally displayed but it - resumes normal condition after turning off once. - A slight dew depositing on terminals is a cause for electro-chemical reaction resulting in terminal open - circuit.

Usage under the relative condition of 40 ℃, 50%RH or less is required.


DV3 DV-CS128160F19 28

6. Storage

In the case of storing for a long period of time (for instance. For years) for the purpose or replacement use,

The following ways are recommended.

- Storage in a polyethylene bag with sealed so as not to enter fresh air outside in it, And with no desiccant.

- Placing in a dark place where neither exposure to direct sunlight nor light is. Keeping temperature in

- the specified storage temperature range.

-Storing with no touch on polarizer surface by the anything else. (It is recommended to store them as

they have been contained in the inner container at the time of delivery)

7. Safety

- It is recommendable to crash damaged or unnecessary LCD into pieces and wash off liquid crystal by

- using solvents such as acetone and ethanol. Which should be burned up later.

- When any liquid crystal leaked out of a damaged glass cell comes in contact with your hands, please

wash it off well with soap and water.

( 128×RGB×160 1.9” )Address setup time Tas6 0 - - ns Address hold time Tah6 0 - - ns Write cycle time Tcyc6 90 - - ns Write pulse “L” width Twrlw6 35 - - ns Write pulse “H”

Documents