Total Dose Effects on Devices and Circuits - Principles and Limits of Ground Evaluation-
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Total Dose Effectson Devices and Circuits
-Principles and Limits of Ground Evaluation-
2Total Dose Effects on Devices and Circuits
Outline
Sensitive structures and degradation processesSensitive structures and degradation processes
Rules for effective device selectionRules for effective device selection
Limits of total dose evaluations Limits of total dose evaluations
3Total Dose Effects on Devices and Circuits
Problematic of total dose ground evaluation
Impossible to reproduce in-orbit device environmentImpossible to reproduce in-orbit device environment radiative environment complexityradiative environment complexity
operating conditions(bias, temperature)operating conditions(bias, temperature)
Necessary to understand the physics to establish rules to Necessary to understand the physics to establish rules to
extrapolate from ground to spaceextrapolate from ground to space
Need of realistic data for non-hardened devices Need of realistic data for non-hardened devices (COTS)
4Total Dose Effects on Devices and Circuits
One answer: reasonable conservativity
Conservative conditions to assure that:Conservative conditions to assure that: a satisfying behaviour during device evaluationa satisfying behaviour during device evaluation
implies implies a satisfying in-orbit behavioura satisfying in-orbit behaviour
““Reasonable” for “not too much”Reasonable” for “not too much” These conditions must be defined regarding each experimental parameter modifying the device degradationThese conditions must be defined regarding each experimental parameter modifying the device degradation
Irradiation natureIrradiation nature Dose rate/experiment durationDose rate/experiment duration Device bias and temperatureDevice bias and temperature
5Total Dose Effects on Devices and Circuits
Sensitive structures (Si technologies)
nMOS transistor
p-type Si substrate
Gate oxide
n+ n+
Interface
NPN bipolar transistor
p-type base
n-type collector
Surface passivation oxide
n+ emitter
Interface
6Total Dose Effects on Devices and Circuits
MOS structure degradation mechanism
Gate (Vg)
Oxide
Interface
Silicon
E
Energy
+
+-
+-+-+-+-+-+-+-
+-
+-+-+-+-+-+-
+-
+-+-
+-+-
+-
+-+-+-
+-+-+-
+-
+-
+- +-+-+-+-+- +-
+-
+-+- +-
+-
+-+-
++ +-+++
+++ +------
7Total Dose Effects on Devices and Circuits
Drain Source
Ideal nMOS transistor
Gate oxide
0
0.1
0.2
0.3
0.4
2 3 4 5Vgs (V)Id
s (A
)
p-type Si substrate
Gate (Vgs)
Vth
8Total Dose Effects on Devices and Circuits
Ideal nMOS transistor: total dose D- Oxide trapped charge-induced degradation -
Drain Source
+ + + + + ++ +
0
0.1
0.2
0.3
0.4
2 3 4 5Vgs (V)Id
s (A
)
-- - --+ + ++ + + ++ ++
++
Gate (Vgs)
thV
ox
itotth C
QQV
With, fractional yield D..Qot
9Total Dose Effects on Devices and Circuits
Fractional yield dependencies
Worst case regarding two parameters:
1- Nature of ionising source:
Electrons or Co60
2- Electric field in sensitive oxide:
Maximum value
After Ma T.P., Dressendorfer P.V. (1983)
10Total Dose Effects on Devices and Circuits
Ideal nMOS transistor: stable state- Effect of oxide trapped charge annealing -
0
0.1
0.2
0.3
0.4
2 3 4 5Vgs (V)Id
s (A
)- Theoretical condition: infinite post irradiation time- Practical conditions: 168 hours at 100°C is a compromise for
large oxide charge annealing and slight interface traps annealing
thV
Drain Source
-- - --
Gate (Vgs)
- -
11Total Dose Effects on Devices and Circuits
End of ground irradiation state
Interface states growth
nMOS ideal case: time-dependant effect (TDE)
0
Par
amet
er v
aria
tion
tir tpi
-Qot
-Qit
Vth
Possible in-orbit states Stable state
12Total Dose Effects on Devices and Circuits
Selection of MOS circuitsP
aram
eter
val
ue
Dtpi
x
x x
x
xx
: Specified limits
x: Measured values
A device is selected if all the measurements are in the specified domain
PASS
13Total Dose Effects on Devices and Circuits
Selection of MOS circuitsP
aram
eter
val
ue
Dtpi
x
x
x
xxx : Specified limits
x: Measured values
Failure due to oxide trapped charge
FAIL
14Total Dose Effects on Devices and Circuits
Selection of MOS circuitsP
aram
eter
val
ue
Dtpi
x x
x
xx x
: Specified limits
x: Measured values
Failure due to interface traps
FAIL
15Total Dose Effects on Devices and Circuits
Ideal nMOS sensitive parameters (1)
Device levelThreshold voltage (~ linear)Drive current Carrier mobility (second order)
Circuit levelLogic levelsPropagation delaysHigh speed performances
0
0.1
0.2
0.3
0.4
2 3 4 5Vgs (V)
Ids
(A)
Initial
100 Gy(Si)
200 Gy(Si)
168h at 100°C
16Total Dose Effects on Devices and Circuits
Ideal nMOS sensitive parameters (2)
Device levelLeakage current (superlinear)
Circuit levelSupply current (superlinear)Design-dependant parametric degradation
10-12
0 1 2 3 4 5Vgs (V)
Ids
(A)
Initial
100 Gy(Si)
200 Gy(Si)
168h at 100°C
10-10
10-8
10-6
10-4
10-2
1
Leakage current
17Total Dose Effects on Devices and Circuits
Bipolar transistors degradation (1)
++ + +- - - - --
Base
Emitter
Surface passivation oxide
++ ++ + ++ +
Recombination rate in the emitter-base junction is modified:
1- In Si: surface potential shift induces change in the carrier densities
2- At the SiO2/Si interface: by the interface traps density increase and change in carrier densities
The global resulting degradation strongly depends the transistor structure (design and type) and of the experimental conditions
18Total Dose Effects on Devices and Circuits
Bipolar transistors degradation (2)
The recombination fraction of the base-emitter current do not participate to the current amplification:
- The current gain (IC/IB) decreases
- The current gain degradation depends on VBE (non-linear effect)
- Device level: Gain degradation has important impact in linear circuits- Circuit level: Leakage currents are induced in all circuit types
0
20
40
60
80
100
0.4 0.5 0.6 0.7 0.8VBE (V)
Cu
rren
t ga
in (
A/A
) -
Initial
100 Gy(Si)
200 Gy(Si)
500 Gy(Si)
19Total Dose Effects on Devices and Circuits
Enhanced Low Dose Rate Sensitivity (ELDRS)
- True dose rate effect -
* Specific to bipolar technologies
* Fractional yield dependence to dose rate (# from TDE)
* No satisfying experimental method to bound its magnitude
After Johnston et al. IEEE TNS (1994)
20Total Dose Effects on Devices and Circuits
Selection of bipolar devices
tpi
x
A device is selected if all the measurements are in the specified domainDesign margins are recommendedHigh dose rate at room temperature prohibited
D
: Specified limits
x: Measured values
Par
amet
er v
alue x
x x
xx
PASS
No signification:May be omitted
21Total Dose Effects on Devices and Circuits
Main I.C. degradation mechanism- Leakage currents in isolating structures -
Z
X
Drain
Gate
Sourc
e Calculated current density at the silicon surface
X
Z
Drain SourceGate
22Total Dose Effects on Devices and Circuits
Standards for ground evaluation:Irradiation conditions
- Worst-case conditions to test oxide charge-related failures -
Method Source Dose rate BiasSCC 22900.4 Co60 or electron
acceleratorStandard: 36 to 360 Gy/hLow rate: 0.36 to 3.6 Gy/h
Worst case
MIL 1019.6 Co60 50 to 300 rad/s(1800 to 10800 Gy/h)
Worst case
Higher fractional yield
Compromise between:- benefit of TDE (annealing during irradiation)- cost of time consuming experiments
-Maximum electric field in sensitive zones(fractional yield)-Avoid chip heating (thermal annealing)
23Total Dose Effects on Devices and Circuits
Standards for ground evaluation:Post-irradiation conditions
- Worst-case conditions to test interface traps-related failures -
SCC: time for Nit to reach maximumMIL: time less then irradiation time to anneal in the intended use
MIL: +50% of design margin(compensates possible Nit annealing)
One bias board only
Method Roomtemperature
Over test Accelerated annealing Bias
SCC 22900.4 24 h None 168 h at 100°C Worst caseMIL 1019.6 Time<D/Rmax 0.5xD (default) 168 h at 100°C Worst case
Something simple !
24Total Dose Effects on Devices and Circuits
Displacements/ionisation cumulative effect - Dark current in Active Pixel Sensor -
Protons create ionisation (in SiO2) and displacements (in Si)Both interaction type can induce dark current
1010 protons/cm²
25Total Dose Effects on Devices and Circuits
Displacements/ionisation combined effects:Bipolar circuits
A really extreme example of proton-induced failure, but
- a smaller effect can reduce bipolar technologies hardness,
- RH means “PTDH” (Pure Total Dose Hard)
After Rax et al. IEEE TNS (1998)
26Total Dose Effects on Devices and Circuits
Summary
Ground evaluation of total dose effects are well Ground evaluation of total dose effects are well defined and can assure devices hardness for most of defined and can assure devices hardness for most of device technologiesdevice technologies device typesdevice types mission profilesmission profiles
Some specific devices or applications need particular Some specific devices or applications need particular attentionattention
Necessary to study effect of device scalingNecessary to study effect of device scaling
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