Non-Isolation Soft-Switching Buck Conve r t e r For

Non-isolation Soft-Switching Buck Converter forHigh-Step-Down Conversion

Jinbin zhaoResearch & Development Headquarters, Origin Electric Co., Ltd

1-18-1,Takada, Toshima-ku, Tokyo, 171-8555, JapanE-mail: j_zhao@origin.jp

Abstract -A novel non-isolation soft-switching buckconverter for high step-down conversion is proposed in thispaper. Compared with buck converter and tapped-inductorconverter, it can easily extend the duty cycle, achieves loweroutput voltage and soft-switching operation by adding a seriesinductor and a clamp capacitor. To demonstrate the results,principle of operation is described and detailed steady-stateanalysis is presented. Finally, a 48 VII V, lOA prototype converter isbuilt to verify the theoretical analysis and shows the significantadvantages.

I. INTRODUCTION

To meet fast development of information technology, powerconversion equipment employed in computer and telecompower systems must face lots of challenge such as lowersupply voltage, larger current, higher efficiency and fastertransient response. Generally, extremely narrow duty cycle isused to convert a higher input voltage to lower output voltage,for example, convert 48V or 12V to 1V or below 1V. However,extremely narrow duty cycle will seriously influence converterperformance, lead to conversion efficiency down and on-timeperiod exceed limitation of the control circuit. To eliminatethese drawbacks, coupled inductor converter, two stageconverter, tapped-inductor converter are proposed to extentduty cycle and provide high step down conversion [1-9], butthese proposed topologies bring other new problems such ascost up, complex control circuit, large size and leakage-energyreset, etc.

In order to meet above requirements and avoid these newproblems, a novel non-isolation soft-switching buck converterfor high step-down conversion is proposed in this paper.Comparing with the conventional buck converter shown inFig.l and tapped-inductor buck converter shown in Fig.2,significant advantages are shown as extend the duty cycle,achieve lower output voltage and soft-switching operation.Finally, the operation principle of the proposed converter isdescribed in Section II, steady-state operations are analyzed inSection III, and performances are verified by the simulationresults in section IV.

II. PRINCIPLE OF OPERATION

The configurations of the proposed converters are shown inFig.3, which is composed with two switches SI, S2, theirparasitic capacitors Cs 1, Cs2, clamp capacitor Cc, freewheel

diode D, middle inductor Ll, output filter inductor L2, outputfilter capacitor Co, and load resistor Ro. As shown in thefigure, L1 and L2 are connected in series to replace the outputinductor L of the conventional converter shown in Fig.l.Switch S1 and S2 are driven alternately with a short period ofdead time. Based on the proposed topology, during the offtime period of switch S1, L1 is discharged and charged toreverse current 11 in resonant manner with clamp capacitor Cc,L2 is discharged by output voltage. During the on time periodof switch S1, its operation is divided into two stages. In thefirst stage, since freewheel diode D is forward-bias to on, L1 ischarged by voltage (Vin-O), L2 is discharged by outputvoltage Vo, the stage will be ended at 11=12. In the secondstage, since freewheel diode D is reverse-bias to off, L1 ischarged by (Vin-Vl), L2 is charged by (VI-Vo). VI can be

d . d ~ Vin + nVa h ... 1enve rrom VI = . Were, VIn IS Input vo tage, Vol+n

is output voltage, VI is the voltage across freewheel diode D,and n is turns ratio which defined as n=Ll/L2. As result, dueto L1 existing, discharging time of L2 is extended, in otherwords, charging time ofL2 is reduced, in additionv

o= ~D' can

be used to calculate the output voltage. Where, D' is actualduty cycle. Therefore, high step-down voltage conversion ratiois achieved, and voltage stress VI across freewheel diode isreduced, too. Waveforms of operation principle betweenproposed converter and conventional buck converter areshown in Fig.3. From the fig, it is clear that output voltage ofthe proposed converter is lower than conventional converter atthe same duty.

R

Fig.I. Conventional buck converter

Fig.3. Proposed buck converter for high step-down conversion(2)

(1)

Ic1 0

II

I'I,

"" "" :',I

:1,I

II

I' ," D' II: I

to

II(t) = II(t1)+ V;n (t-tJL}

12(t) =I 2(tJ - Vo (t - tl )

Lz

,I,

":'

Vgs 2

Fig.5.Key waveforms of the proposed converter

Vgs 1t----;-If----~~----...;.a..----.Ll--...

Mode 1: [to<t<tl] at t=tO, switch S2 is turned off. Parasiticcapacitors Cs1 and Cs2 start to charge and discharge inresonant manner, respectively. While the drain-source voltageVds1 of S1 decreases to zero in an approximately linear wayat tl, the drain-source voltage Vds2 of S2 also increases, andclamped to (Vin+Vcc). Here, due to the time is short,equations of analysis are ignored.

Mode 2: [tl <t<t2] at t=tl, switch S1 is turned on with ZVS(Zero Voltage Switching). Since freewheel diode D isforward-bias to on, Ll is charged by Yin, current 11 starts toincrease in an approximately linear way from negation, L2 isdischarged by V0, current 12 is decreasing gradually throughD2. So, the following equations are obtained. The mode endsat 11 =0.

R

Fig.2. Conventional Tapped-inductor buck converter

v.1

III. STEADY-STATE ANALYSIS

To simplify the analysis process, all circuit elements areassumed to be ideal. Here, Cc is large enough to assume it as aconstant voltage source Vcc, 11 and 12 are inductors currentflowing through Ll and L2, respectively. D is duty cycle ofswitch S1, fs is switching frequency. The switching cyclestarts at the instant t=O. During one switching cycle, it can bedivided into six operation modes. Its key waveforms areshown in Fig.5. In additional, to further facilitate the analysisof operation, Fig.6 shows equivalent circuits of each operationmode.

Mode 3: [t2<t<t3] the Mode is same as Mode2, which is endedat 11 =12.

Corrbuck: Conventional buck converterpro: Proposed buck converter

VgS 2

11(t) =II(t2 ) + V;n (t - t2 )L}

I2(t) = I2(t2)- Vo (t-t2)Lz

(3)

(4)

~T :~+--T II ONI' I OFF ------+j

: ~D l--- ::+-D I-+!+-- 1 - D ---.:

Fig.4. Waveforms of operation principle between proposed converter andconventional buck converter

Mode 4: [t3<t<t4] at t=t3, while 11 =12, D is reverse-biased tooff. L1 and L2 enter the charge mode simultaneously. Thus,the following equations are obtained.

(5)

(6)

Mode 5: [t4<t<t5] at t=t4, switch SI is turned off. The Mode issame as Model, which is ended at t=t5.

Since L1 and L2 are connected in series, 11 and 12 should beincreased at the same change rate. Moreover, 11(t3)= 12(t3),From equation (5) and (6), the voltage VI can be calculatedby:

Since I max = I H' equation (13) is given by:

I H - Va (1- D')Ts = Imin + Vin (D - D')Ts (13)L2 LI

Solving the above equations,V,. V

21 =---!:!!:....(D-D')T +~(I-D')T (14)max LI s L2 s

From equations (12) and (14), equation (15) and (16) are givenby:

Mode 6:[t5<t<tO] at t=t5, switch S2 is turned on with ZVS,freewheel diode D is forward-bias to on. L1 starts to bedischarged and charged in resonant manner with Cc. L2 startsto be discharged by output V0, current 12 starts to decreasegradually. The following equations are obtained.

ll(t) =Ij(ts)- Vee (t-ts) (9)L1

12(t) =12(ts) - Va (t -ts) (10)Lz

According to the charge balance of clamp capacitor Cc,

(29)

(28)

(24)

(25)

VinD +n(D-l)-1=2 LIl s (1+~n)Vo Ro ~n

v· V_zn_(D-D')=2--!L (27)u], s;

a = 2LIIs n (30)

b = 2LIIs -Ro(nD-l-n) (31)

c = RoD (32)

VID'(I-D')M = r, (23)

2L2

In order to simply the calculation process, coefficients of theequation are assumed as a, b, c.Where,

Based on equations (18) and (27), equation (28) is given as:

Here, ~ =~n X k is assumed. So,

k 22LIIsn + k[2L Ils - Ro(nD -1- n)] - RoD = 0

Since I H = I max ' Is =1/T, and I min =-Imax ' the next

equations are given by:Vo VID'(I-D')

IH=-+~---

Ro 2L21s

Imin =!2..- VID'(I-D') _ Vin (D-D')Ro 2L21s LIls

Solving (29) for k, the following equations is given

- [2Llfs - Ro(nD- n -1)] ± ~[2Llfs - Ro(nD- n_1)]2 + 8LlfsnRoDk =--=---=..:..-=----=------=--------------

4Llfsn(33)

Since b>Oand k>O, equation (33) is written as

~[2Llfs - Ro(nD- n _1)]2 + 8LlfsnRoD - [2Llfs - Ro(nD- n -1)]k = ..!..:...--=..:..-=-----=-----------------

4Llfsn(34)

VoI =- (20)o R

o

VoI H =-+M (21)

Ro

VoIL =--M (22)

Ro

The ripple of output current can be calculated as follow:

From equation (24) and (25), equation (26) is given by:

_(Vo + ~D'(l-D'))

Ro 2Lzh· (26)

=Vo _ ~D'(l-D') _ ~n (D-D')Ro 2Lzh· L1h·

Solving the above equations,

(8)

(7)

(19)

(17)

(16)

(15)

(18)

(11)

(12)

I max = -Imin

21 = ~e (l-D)Tmax L

1s

Where,

Vin -VI = VI-Vo

LI L2

Vin + nVoVI = - - ­l+n

Where, n is defined as n=Ll/L2.

V v· V--f£..(I-D)Ts =---!:!!:....(D-D')Ts +~(I-D')TsLI LI L2

D'= VinD+nVo -Vcc(I-D)

Vin + nVo

Since Vo =~ X D' , Vee can be calculated as equation (17),

VinD-VoV =----cc I-D

Based on above calculation, actual duty cycle d' can becalculated as follow.

D'= Vo(l+n)Vin +nVo

The average output current 10 can be given by:

I = -..;1H_-_I_Lo 2

(35)

(39)

Vo

o

Vo

R

Mode 3

Ccsl

Ccsl

(36)

(38)

(37)

As result, it is clear that voltage conversion ratio of theproposed converter is lower than conventional buck converterat the same as duty cycle D.

VI == Vin (1+ nk)1+ n

V== Vin (D - k)

cc --l--D--

D'== k(l + n)l+nk

Also, the voltage conversion ratio of the proposed converter isRoD

Vo == Vin x k == Vin x----~----2LI f sn - Ro(nD - n -1)

For the different value of k and duty cycle D, The followequation can be given by:

k~ RoD2LIfsn - Ro(nD - n -1)

Using the result, the different value of VI, Vee and D' can begiven by:

Since Jb 2 + 4ac ~ b + 2ac ,equation (34) can be approximatedb

as follow.

Vo

R

Mode 4

Vo

R

Mode 1

Ccsl

Vo

R

ModeS

Vo

R

Mode 2 Mode 6

Fig.5 Equivalent circuits of the proposed converter

IV. PERFORMANCE RESULTS

A. Specifications

To verify the above analysis, a non-isolation soft-switchingbuck converter with proposed topology is implemented withthe following circuit specification:1. Input voltage: Vin=48V.2. Output voltage: Vo =IV.3. Output current: Io=10A.4. Output resistance: Ro=10n.5. Clamp capacitor: Cc=10uF.6. Switching frequency: fs=100 kHz.7. Middle Inductor: Ll= 8uH.8. Output Filter Inductor: L2= 4uH.9. Output Filter capacitor: Co=560uF.10. Clamp capacitor voltage ripple: < 6 %.

B. Clamp capacitor selection.

The selection of clamp capacitor value can be determined byconsidering clamp capacitor voltage ripple. Assumed Vee isconstant voltage, the current variability of clamp capacitor Cccan be derived from

Fig.8 shows waveforms ofVgs, Vds, 11, 12 and ~ Vee at dutycycle D=0.395, Vo=I.0V and Io=10A. It can be seen thatVcc=28.56V, ~ Vee =1.708V at Cc=10uF. Clamp capacitorvoltage ripple is 5.9%, which meets design requirements.

Fig.9 shows waveforms for gate-source voltage and drain­source voltage of switches. As can be seen in Fig.9, voltagestress of switches S. and S2 are clamped at (Vin+Vcc=76.56V),and turned on under ZVS.

Fig.l0 shows the relation comparison between the duty cycleand output voltage for proposed converter, conventional buckconverter and tapped inductor converter. Here, The turn rationN of tapped inductor shown in Fig.2 is definedas N =(n1 + nz) / nz =4 . As can be seen in the figure, the

output voltage of the proposed converter is a straight line thatshows better PWM control stability, and output voltage islower than others converter at the same duty D=0.395, only1/19 of the conventional buck converter and 1/7 of tappedinductor converter.

(45)

(42)

(44)

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lo.OOL UU·- U-- r~-::::: D~. 9S . .Ll10.00· "

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Fig.7 Waveforms oflb Iz, Va and VI at D=O.395

Fig.6 Waveforms ofVgs,V dS' Va and VI at D=O.395

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1~:~~ --/!\~----r'~\~---1\'\~----t\~,~--1\~---

-5.00 ..,/ \, \ i \. ,../ ",/

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(43)

Fig.7 shows relations of 11, 12, Vo and VI at duty cycleD=0.395, Vo=I.0V and Io=10A. As shown in the figure, whileswitch S1 is turned on, 11 rapidly rises and 10 continue to falluntil 11=10. In the next mode D' will be decided. The values ofvoltage VI and duty ratio D' can be calculated by equation(36) and (38).

C. Simulation Results

Fig.6 shows waveforms of gate-source voltage Vgs, drain­source voltage Vds, output voltage Vo and VI at duty cycleD=0.395, Vo=I.0V and Io=10A. It can be seen that the actualduty cycle D' is only 0.06 which is far lower than duty cycled=0.395 and the values of voltage VI is 16.67V, it is 1/3 ofVin=48V. Vo can be calculated by d' and VI.

Since tJ.t=~(1-D)Ts and ~Q=Ccx~~c =Ix~t , the follow2

equations can be given by:

Vee 1 ( )TM =--x- 1-D sLI 2

1 1~Q=C x~V =-x-(I-D)T xMc ce 2 2 s

Solving the above equations, ~~c can be calculated as follow.

2 2Vee (1 - D) r,~V =------

ee 8LICeTaking (37) into (44), Cc can be given by:

2C; = Vin (D - k)(1- D)Ts

8LI~Vce

inductors in series. The proposed converter can offer someadvantages as follows1. High step-down conversion ratio2. Better PWM control stability.3. Zero voltage switching for Sl and S2.4. Simple structure.

REFERENCES

[1] S. Nakagawa, "Voltage Step-Down Type DC-DC Converter Having ACoupled Inductor," US patent, 6,429,628, August 2002.

[2] Kaiwei. Yao, Yang. Qiu, Ming. Xu, and Fred. C. Lee, "A novelwinding-coupled buck converter for high-frequency, high-step-downDC-DC conversion," IEEE Transactions on Power Electronics, Vol. 20,No.5, pp. 1017-1024, September 2005.

[3] Kaiwei. Yao, Mao. Ye, Ming. Xu, and Fred. C. Lee, "Tapped-InductorBuck Converter for High-Step-Down DC-DC Converter," IEEETransactions on Power Electronics, Vol. 20, No.4, pp. 775-780, July2005.

[4] Yuancheng. Ren, Ming. Xu, Kaiwei. Yao, Yu. Meng, Fred. C. Lee, andJinghong. Guo, "Two-stage approach for 12V VR," IEEE APEC2004,pp. 1306-1312.

[5] Xiaogao. Xie, Zhaoming. Qian, "A new two-stage buck converter forvoltage regulators," IEEE PESC2008, pp. 1580-1584.

[6] K. Nishijima, K. Abe, D. Ishida, T. Nakano, T. Nabeshima, T. Sato andK. harada, "A Novel Tapped-Inductor Buck Converter for DividedPower Distribution System," IEEE PESC2006, pp. 299-304.

[7] Joung-Hu Park, Bo-Hyung Cho, "Nonisolation Soft-Switching BuckConverter With Tapped-Inductor for Wide-Input Extreme Step-DownApplications," IEEE Transactions on Circuits and Systems I, Vol. 54,No.8, pp. 1809-1818, August 2007.

[8] Sheng. Yeo Wilson. Eberle, and Yanfei. Liu, "A Novel Non-Isolated FullBridge Topology for VRM Applications," IEEE Transactions on onPower Electronics, Vol. 23, No.1, pp. 427-437, January 2008.

[9] Zhiliang. Zhang, Eberle. W, Yanfei. Liu and Sen. P. C, "A novel non­isolated ZVS asymmetrical buck converter for 12V voltage regulators,"IEEE PESC2008, pp. 974-978.

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-5.00 , ""'" / -, / ........... ./ '~,.' /"'\'-10.00 / ".,/ 'v' .j "'-/ '"-15.00

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Fig.9 Waveforms of gate-source voltage and drain-source voltage

Vin=48V Vout=1V lo=10A

Turn ratio N=4

18.96V

---buck converter

---.....-tap inductor converter

--+- proposed converter

42

36

>'";' 30 I-------------------~~-----/------------I

C)

J9~ 24

118 I--------------~~-----________M~----______I'5o

12

oa 0.1 0.2 0.3 0.395 0.5 0.6 0.7 0.8 0.9

Duty

48

Fig.I 0 Relation of duty cycle and output voltage

V. CONCLUSION

In this paper, a novel non-isolation soft-switching buckconverter topology is proposed to achieve high step-downconversion, in which a filter inductor is replaced by two