N5242B Block Diagramna.support.keysight.com/pna/docs/N5242B_blk_2port.pdf · 2019. 11. 9. · W146 W7 W5 W145 OPTION 201 OPTION 217, 219, 222, 224 W117 W116 W27 (201) W25 (217, 219,

EXT TEST SET DRIVE RF OUT

EXT TEST SET DRIVE LO OUT

W59

W63

REAR PANELINTERCONNECTS

FRONT PANELINTERCONNECTS

W13

W41

W1

\15

IF INPUTS

PULSE I/OA20 J20

A20 J202

A20 J602

A20 J802

A20 J402

A20 J2

W98 To A50

To A50

From A46

W99

W97

W103

W113

W113

COMB THRU IN (J10)

COMB ARM IN (J9)

SW SRC OUT (J11)

SW SRC OUT (J8)

Port 1

Port 3

Src 2

W3

W9

W45

W46

W47

W2

From A47

\5

W51

W54

OPTION 029

W149

W150

2port

OPTION 224

W146

W7

W5

W145

OPTION 201

OPTION 217, 219, 222, 224

W117

W116

W27 (201)W25 (217, 219, 222, 224)

W137 (029)

OPTION 201

OPTION 217, 219, 222, 224

W114

W115

W40 (201, 217, 219)W154 (222, 224)

W27 (201)W25 (217, 219, 222, 224)

W48 (201)W37 (219,224)

W64

W65

N5241B, N5242B and N5249B 2-Port Overall Block Diagram

W138 (029)

W137 (029)

W136 (029)

Including Options 201-Standard; 217-Attenuators; 219-Attenuators and Bias Tees; 222-Second Source, Combiner, and Bypass Switches without Bias Tees; 224-Second Source, Combiner, and Bypass Switches with Bias Tees; 029-Noise Figure Measurements

10 MHz REF

10 MHz REF

15 MHz

PCIBRIDGE

J1

A

B

J4

J5

J3

J6

R

C/R1

D/R2

J2

DSP

X6 PULSEDRIVE

ADC

CONTROLLERGPIB

TALKER/LISTENERGPIB

VGA

LAN

MAINCPU

EEPROM

ROM RAM

VIDEO RAM

A55HARD DISKDRIVE

A18GPIB

A15 MIDPLANEA16POWERSUPPLY

AC LINE IN

VIDEO PROCESSOR

A17 CPU

USBINTERFACE

GPIB PORTINTERFACE

GPIB PORTINTERFACE

VGAINTERFACE

10/100 BASE-TETHERNET

USB x 4

A14SYSTEMMOTHERBOARD

9 MHz

DITHERNOISE

RAM

\4

TO A20

15 MHzADC

9 MHz

15 MHzADC

9 MHz

15 MHzADC

9 MHz

15 MHzADC

9 MHz

FRONT PANELINTERCONNECTS

A3DISPLAY

A2USB BD

USB x 4

A1 FRONT PANEL INTERFACE BOARD

DISPLAYPROCESSOR

INVERTERPOWER

USBHUB

KEYPAD

RAM

FLASH

SPEAKER

DIRECT CONNECTTO A4, A5, A7, A8,

A10, A12, A13,A14, A15, A17

LOCAL DIGITAL BUS

POWER BUS

A19TEST SETMOTHERBOARD

RIBBON CABLE CONNECTIONSTO A20, A21, A23, A24,

A33-A37, A42-A49

A12 SIGNAL PROCESSINGADC MODULE (SPAM)

A59 NOISE DOWNCONVERTER

RIL

0.75-1.5 GHz

350-750 MHz

25-60 MHz

10-25 MHz

150-350 MHz

60-150 MHz

1.5-3.0 GHz

A7 NOISE RECEIVERW171

W172

W173

RIL

31.6 MHz

31.6 MHz

12 MHz

TO A14 ADC

OPTION 029

J4

3.0-6.0 GHz

3.0 GHz

J6

J1

26.0-32.0 GHz

32.0-40.0 GHz

40.0-50.0 GHz

X2

J2W175HIGH BANDOVERLOADDETECTOR

0.010-6.00 GHz

26.0-36.0 GHz

6.0-12.0 GHz

12.0-26.0 GHz

36.0-50.0 GHz

J1

J5

J3

LOW BANDOVERLOADDETECTOR

Bx = ACTIVE SOURCE BAND

SERIAL TEST BUS NODES

MIXED POWER AND CONTROL SIGNALSFROM THE A23 TEST SET MOTHERBOARD

LOCAL DIGITAL BUS

POWER BUS

HIGH DENSITY DATA BUS

ALC1.0-2.0 GHz

2.0-3.0 GHz

5.33-6.75 GHz

6.75-8.0 GHz 10.66-13.51 GHz

8.0-10.66 GHz

3.0-4.0 GHz

4.0-5.33 GHz

J1207

B21-36

-10 to +10 dBm

0.5-1.0 GHz

÷2

X2

÷4

A4 13.5 GHz SOURCE 1 SYNTHESIZER2-4 GHz

B14-15

B12-13

B16-17

B18

B19-20

50 MHzREF

J5

0.25-0.5 GHz

ƒFrac-NLogic

X2

MAIN

B24-28,31-36,

B23,29-30

B26-28,34-36,

B24-25,31-33,

B22,26-28,34-36

B21,24-25,31-33

0.01-13.51 GHz

B2-51

÷8

DDS

250 MHz

B2-11

10

16,17

DDS=Direct Digital Synthesizer

φ

∫

ALC1.0-2.0 GHz

2.0-3.0 GHz

5.33-6.75 GHz

6.75-8.0 GHz 10.66-13.51 GHz

8.0-10.66 GHz

3.0-4.0 GHz

4.0-5.33 GHz

J1207

B21-36

-10 to +10 dBm

0.5-1.0 GHz

÷2

X2

÷4

A13 13.5 GHz SOURCE 2 SYNTHESIZER2-4 GHz

B14-15

B12-13

B16-17

B18

B19-20

50 MHzREF

J5

0.25-0.5 GHz

ƒFrac-NLogic

X2

MAIN

B24-28,31-36,

B23,29-30

B26-28,34-36,

B24-25,31-33,

B22,26-28,34-36

B21,24-25,31-33

0.01-13.51 GHz

B2-51

÷8

DDS

250 MHz

B2-11

13

19,20

DDS=Direct Digital Synthesizer

φ

∫

ALC1.0-2.0 GHz

2.0-3.0 GHz

5.33-6.75 GHz

6.75-8.0 GHz 10.66-13.51 GHz

8.0-10.66 GHz

3.0-4.0 GHz

4.0-5.33 GHz

J1207

B21-36

-10 to +10 dBm

0.5-1.0 GHz

÷2

X2

÷4

A11 13.5 GHz LO SYNTHESIZER2-4 GHz

B14-15

B12-13

B16-17

B18

B19-20

50 MHzREF

J5

0.25-0.5 GHz

ƒFrac-NLogic

X2

MAIN

B24-28,31-36,

B23,29-30

B26-28,34-36,

B24-25,31-33,

B22,26-28,34-36

B21,24-25,31-33

0.01-13.51 GHz

B2-51

÷8

DDS

250 MHz

B2-11

15

22,23

DDS=Direct Digital Synthesizer

φ

∫

10 MHz REF10 MHz

50 MHz REF10 MHzHIGH STAB

OCXO

100 MHz

A10 FREQUENCY REFERENCE

10 MHz0-200 Hz

DAC

J3

J2

J5

J4

J8NC

J7

J6

50 MHz

10 MHz

ƒφ

∫

÷2

÷10

PulseModulator

ALCModulator

P1

P2 P6

A5 26.5 GHz SOURCE (SOURCE 1)

13.5-16 GHz

16-20 GHz

20-26.5 GHz

20-26.5 GHz

12.8-20 GHz

8.5-12.8 GHz

5.33-8.5 GHz

3.2-5.33 GHz

10 MHz-3.2 GHzPIN-switched LPF

3.2 GHz

B29-31,

37-38,45-48

B2-28

B20-28

B2-19

P5

P3

B2-19

B29-30,37,

45-46

B31,38,47-48

B2-19

B2-19

B20-21

B22-24

B25-27

B28

B20-28,32-36,39-44

B20-28

B20-48

B20-28

B29-48

X2

0.01-13.5 GHzB2-28

OUT 1

0.01-13.5 GHzB2-28

OUT 2

ALCModulator

ALCModulator

PulseModulator

P4J402

29

8

9

PulseModulator

ALCModulator

P1

P2 P6

A8 26.5 GHz SOURCE (SOURCE 2)

13.5-16 GHz

16-20 GHz

20-26.5 GHz

20-26.5 GHz

12.8-20 GHz

8.5-12.8 GHz

5.33-8.5 GHz

3.2-5.33 GHz

10 MHz-3.2 GHzPIN-switched LPF

3.2 GHz

B29-31,

37-38,45-48

B2-28

B20-28

B2-19

P5

P3

B2-19

B29-30,37,

45-46

B31,38,47-48

B2-19

B2-19

B20-21

B22-24

B25-27

B28

B20-28,32-36,39-44

B20-28

B20-48

B20-28

B29-48

X2

0.01-13.5 GHzB2-28

OUT 1

0.01-13.5 GHzB2-28

OUT 2

ALCModulator

ALCModulator

PulseModulator

P4J402

30

11

12

A21 LO MULTIPLIER/AMPLIFIER 26.5 (HMA26.5)

B2-28,36-39

B29,40-41

B30-32,42-45

B33-35,46-48

B29-35,40-48

FROM A19

26 GHz

13 GHz

0.013-13.518 GHz

13.518-26.508 GHz

0.013 -26.508 GHz

13.5-15.4 GHz

15.4-20.0 GHz

20.0-26.5 GHz

X2

14

∫

A19 TEST SET MOTHERBOARD

HANDLER I/O HANDLER I/OINTERFACE

TEST SET I/O

PWR I/O

TEST SET I/O INTERFACE

PWR I/OINTERFACE

MEAS TRIG IN LOCALDIGITAL BUS

TO A34 THRU A37,A42 THRU A49

MEAS TRIG RDY

MEAS TRIG IN

AUX TRIG 2 OUT

AUX TRIG 2 IN

AUX TRIG 1 OUT

AUX TRIG 1 IN

28 V28 V

AUX TRIG 2 OUT

AUX TRIG 2 IN

AUX TRIG 1 OUT

AUX TRIG 1 IN

MEAS TRIG RDY

POWERBUS

\9

\25

\ 36

DC BIAS 3 TO A43

BIAS 4 IN

BIAS 2 IN

BIAS 3 IN

BIAS 1 IN

\2

DC BIAS 1 TO A42\2

DC BIAS 4 TO A44\2

DC BIAS 2 TO A45\2

J541

J542

J543

J544

A33 REFMIXERSWITCH

W36

W35 W30

RCVR R1 IN

SOURCE OUT

REF 1

W30

RCVR A IN

CPLR ARM

W31

0-35 dB

A42 STEPATTEN

RCVRA INTO A23 A

W133 (029) W132 (029)

Port 1

OPTION 201

OPTION 217, 219, 222, 224

W88 (219,224) W87 (219,224)

W30

RCVR B IN

CPLR ARM

W30

RCVR R2 IN

SOURCE OUT

W50

0-35 dB

A45 STEPATTEN

RCVRB INTO A23 B

W135 (029)

Port 2

REF 2

OPTION 201

OPTION 217, 219, 222, 224

W94 (219,224) W93 (219,224)

W30

W112From rear panelSW TSET IN (J1)

From W9W109

W111

W110

To rear panel SW SRC OUT (J2)

A49 BYPASSSWITCH

50

A28 RECEIVERBRIDGE

OPTION 201, 217, 219

OPTION 222, 224

To rear panelSW SRC OUT

From rear panel COMB THRU IN (J10)From rear panel COMB ARM IN (J9) W99

A25 RECEIVERBRIDGE

OPTION 222, 224

OPTION 201, 217, 219

W4

FromW11

W95

W100

W97

W98

W96

A46 BYPASSSWITCH

A50COMBINER

50

IF INPUTS

A

R

D/R2

C/R1

B

W64

W65

W66

W67

Port 2

OPTION 222, 224

DRIVETSET

EXT

LO OUT (J5)

W46

To A47

W112

W111

W104

W113

SW TSET IN (J1)

SW SRC OUT (J2)

From A49

To A49

0.01 - 26.5 GHzW47

3.2 - 19 GHz

LOAD

LOAD

LOAD

RF1 OUT (J6)

SW TSET IN (J7)

W69

W6810 MHz

REF OUT

10 MHzREF IN

W30

SOURCE OUT

CPLR THRU

A32TEST PORTCOUPLER

Port 2

PORT 2

A29TEST PORTCOUPLER

SOURCE OUT

W30

CPLR THRU

Port 1

PORT 1

W104

W103

A47 BYPASSSWITCH

50

From rear panelSW TSET IN (J7)

W101

To rear panel SW SRC OUT (J8)

LOCALDIGITAL

BUS

POWERBUS

LOCALDIGITAL

BUS

POWERBUS

LOCALDIGITAL

BUS

POWERBUS

LOCALDIGITAL

BUS

POWERBUS

LOCALDIGITAL

BUS

POWERBUS

LOCALDIGITAL

BUS

POWERBUS

W85

A41BIAS TEE

DC BIAS 2

ToPort 2W30

W86

W24

A37 STEPATTEN

0-50 dB

W83 W84

W30

ToPort 2

W73

A38BIAS TEE

DC BIAS 1

ToPort 1W30

W74

W12

A34 STEPATTEN

0-50 dB

W71 W72

W30

ToPort 1

A53 BYPASSSWITCH

50

A37 STEPATTEN

0-50 dB

A54 BRIDGE

W126 W127

W130

W30

ToPort 2

W128

W129W131

OPTION 029

A52 BYPASSSWITCH

50

A34 STEPATTEN

0-50 dB

W121 W122

W30

ToPort 1

W125

W123

W124

1

2

3

3

4

4

B21-23,29-30

J102

B21-23,29-30

J102

B21-23,29-30

J102

OPTION 201, 217, 222

OPTION 219, 224

OPTION 219, 224

OPTION 201, 217, 222

SRC 2 OUT 1

SRC 2 OUT 2

W13

THRU A14

R1

R2

R3

R4

\4

A24 IF MULTIPLEXER

PULSEMODULATION

LOGIC

SOURCEPULSE

DRIVE OUT

Pulse A

Main IF A

Main IF B

Main IF R

Main IF C

Main IF D

Ext IF In A

Ext IF In B

Ext IF In R

Ext IF In C

Ext IF In D

Aux R3

Aux R4

AUX R2

Aux R1

P1

P201

P601

P801

P411

P412

P413

P414

P3

P203

P603

P803

P403

A

B

D/R2

R

IF OUT A

IF OUT B

IF OUT C/R1

IF OUT D/R2

IF OUT R

PULSE DRIVE

C/R1

PULSEGATES

10.7 MHz

P2

IF

OU

T A

P2

02

IF

OU

T B

P4

02

IF

OU

T R

P6

02

IF

OU

T C

P8

02

IF

OU

T D

P1

00

1D

ET

OU

T

P1

FROM A23

FROM A16THRU A18

J8

02

Ext

IF

In D

J6

02

Ext

IF

In C

J4

02

Ext

IF

In R

J2

02

Ext

IF

In B

J2

Ext

IF

In A

LFE IF A

LFE IF B

LFE IF C

LFE IF D

PULSEGATES

10.7 MHzPulse B

PULSEGATES

10.7 MHzPulse R

PULSEGATES

10.7 MHzPulse C

PULSEGATES

10.7 MHzPulse D

LFE IF R

P8

04

LF

E I

F D

P6

04

LF

E I

F C

P4

04

LF

E I

F R

P2

04

LF

E I

F B

P4

LFE

IF A

70.0 MHz

A27 MIXER BRICK (1)

A A

R1 R1

R2 R2

B B

70.0 MHz

70.0 MHz

70.0 MHz

IL

R

FROMA23

IL

R

IL

R

IL

R

IF = 7.438 MHz for CW Freq > 53 MHzIF = 0.826 MHz for CW Freq < 53 MHz

EXT TSET DRIVE LO OUT

W170

W80

W53 ToA27

W52

A26 SPLITTER

WITHOUT OPTION 029

OPTION 029

FromA25