Microelettronica (part 1) · 2011-08-03 · EE141Microelettronica Microelettronica (part 1) J. M. Rabaey, "Digital integrated circuits: a design perspective", Second Edition, ed.
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EE141Microelettronica
MiMicrcroelettronica oelettronica (part 1)(part 1)
J. M. Rabaey, "Digital integrated circuits: a design perspective",Second Edition, ed. Prentice Hall, 2003.
EE141Microelettronica
IntroductionIntroduction
Why is designing digital ICs different today than it was before?
Will it change in future?
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The First ComputerThe First Computer
The BabbageDifference Engine(1832)25,000 partscost: £17,470
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ENIAC ENIAC -- The first electronic computer (1946)The first electronic computer (1946)
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The Transistor RevolutionThe Transistor Revolution
First transistorBell Labs, 1948
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The First Integrated Circuits The First Integrated Circuits
Bipolar logic1960’s
ECL 3-input GateMotorola 1966
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Intel 4004 MicroIntel 4004 Micro--ProcessorProcessor
19711000 transistors1 MHz operation
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Intel Pentium (IV) microprocessorIntel Pentium (IV) microprocessor
200042 M transistors1.7 GHz clock-rate
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MooreMoore’’s Laws Law
In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.
He made a prediction that semiconductor technology will double its effectiveness every 18 months
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MooreMoore’’s Laws Law16151413121110
9876543210
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
LOG
2 OF
THE
NU
MB
ER O
FC
OM
PON
ENTS
PER
INTE
GR
ATE
D F
UN
CTI
ON
Electronics, April 19, 1965.
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Trends in logic IC ComplexityTrends in logic IC Complexity
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Trends in Memory ComplexityTrends in Memory Complexity
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MooreMoore’’s law in Microprocessorss law in Microprocessors
400480088080
8085 8086286
386486 Pentium® proc
P6
0.001
0.01
0.1
1
10
100
1000
1970 1980 1990 2000 2010Year
Tran
sist
ors
(MT)
2X growth in 1.96 years!
Transistors on Lead Microprocessors double every 2 yearsTransistors on Lead Microprocessors double every 2 years
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MooreMoore’’s Laws Law
(data from Intel)
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FrequencyFrequency
P6Pentium ® proc
48638628680868085
8080800840040.1
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Freq
uenc
y (M
hz)
Lead Microprocessors frequency doubles every 2 yearsLead Microprocessors frequency doubles every 2 years
Doubles every2 years
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Die Size GrowthDie Size Growth
40048008
80808085
8086286
386486 Pentium ® procP6
1
10
100
1970 1980 1990 2000 2010Year
Die
siz
e (m
m)
~7% growth per year~2X growth in 10 years
Die size grows by 14% to satisfy Moore’s LawDie size grows by 14% to satisfy Moore’s Law
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Power DissipationPower Dissipation
P6Pentium ® proc
486386
2868086
808580808008
4004
0.1
1
10
100
1971 1974 1978 1985 1992 2000Year
Pow
er (W
atts
)
Lead Microprocessors power continues to increaseLead Microprocessors power continues to increase
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Power will be a major problemPower will be a major problem
5KW 18KW
1.5KW 500W
4004800880808085
8086286
386486
Pentium® proc
0.1
1
10
100
1000
10000
100000
1971 1974 1978 1985 1992 2000 2004 2008Year
Pow
er (W
atts
)
Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive
Courtesy, Intel
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Power densityPower density
400480088080
8085
8086
286 386486
Pentium® procP6
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Pow
er D
ensi
ty (W
/cm
2)
Hot Plate
Power density too high to keep junctions at low tempPower density too high to keep junctions at low temp
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Not Only MicroprocessorsNot Only Microprocessors
Digital Cellular Market(Phones Shipped)
1996 1997 1998 1999 2000
Units 48M 86M 162M 260M 435M Analog Baseband
Digital Baseband(DSP + MCU)
PowerManagement
Small Signal RF
PowerRF
(data from Texas Instruments)(data from Texas Instruments)
CellPhone
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Why Scaling?Why Scaling?Technology shrinks by 0.7/generationWith every generation can integrate 2x more functions per chip; chip cost does not increase significantlyCost of a function decreases by 2xBut …
How to design chips with more and more functions?Design engineering population does not double every two years…
Hence, a need for more efficient design methodsExploit different levels of abstraction
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Design Abstraction LevelsDesign Abstraction Levels
n+n+S
GD
+
DEVICE
CIRCUIT
GATE
MODULE
SYSTEM
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Design MetricsDesign Metrics
How to evaluate performance of a digital circuit (gate, block, …)?
CostReliabilityScalabilitySpeed (delay, operating frequency) Power dissipationEnergy to perform a function
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Cost of Integrated CircuitsCost of Integrated Circuits
NRE (non-recurrent engineering) costsdesign time and effort, mask generationone-time cost factor
Recurrent costssilicon processing, packaging, testproportional to volumeproportional to chip area
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NRE Cost is IncreasingNRE Cost is Increasing
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Cost per TransistorCost per Transistor
0.00000010.0000001
0.0000010.000001
0.000010.00001
0.00010.0001
0.0010.001
0.010.01
0.10.111
19821982 19851985 19881988 19911991 19941994 19971997 20002000 20032003 20062006 20092009 20122012
cost: cost: ¢¢--perper--transistortransistor
Fabrication capital cost per transistor (Moore’s law)
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Die CostDie Cost
Single die
Wafer
Going up to 12” (30cm)
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YieldYield%100
per wafer chips ofnumber Totalper wafer chips good of No.
×=Y
yield Dieper wafer DiescostWafer cost Die×
=
( )area die2
diameterwafer area die
diameter/2wafer per wafer Dies2
××π
−×π
=
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DefectsDefects
α−⎟⎠⎞
⎜⎝⎛
α×
+=area dieareaunit per defects1yield die
α is approximately 3
4area) (die cost die f=
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Some Examples (1994)Some Examples (1994)Chip Metal
layersLine width
Wafer cost
Def./ cm2
Area mm2
Dies/wafer
Yield Die cost
386DX 2 0.90 $900 1.0 43 360 71% $4
486 DX2 3 0.80 $1200 1.0 81 181 54% $12
Power PC 601
4 0.80 $1700 1.3 121 115 28% $53
HP PA 7100 3 0.80 $1300 1.0 196 66 27% $73
DEC Alpha 3 0.70 $1500 1.2 234 53 19% $149
Super Sparc 3 0.70 $1700 1.6 256 48 13% $272
Pentium 3 0.80 $1500 1.5 296 40 9% $417
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ReliabilityReliability――Noise in Digital Integrated CircuitsNoise in Digital Integrated Circuits
i(t)
Inductive coupling Capacitive coupling Power and groundnoise
v(t) VDD
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