lna tutorial ver4.ppt - SMDP-C2SDsmdpc2sd.gov.in/downloads/Other Materials/lna_tutorial.pdf · 1 1 1 F g m S g m S ¨ ¸ . impedanceThe load resistor influences the input impedance

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Prof S. S. Jamuar Department of Electrical Engineering,

Faculty of Engineering, University Malaya50603 K l L M l i

50603 Kuala Lumpur, Malaysia.ssjamuar@um.edu.my

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I. Introduction to RF & Wireless TechnologyII Design consideration – example: LNA

Part :

II. Design consideration example: LNANoise PowerImpedance matchingImpedance matching

Resistive terminationSeries-shunt feedbackCommon gateCommon-gateInductive degeneration

III. Design procedures for Inductive Source Degeneration LNA IV D i lIV. Design examplesV. VGLNA – current modeVI. VGLNA – gain control loop

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VII. Other architectures

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Source: J. Dabrowski, Radioelectronics

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Small Signal RF

PowerRF

Analog Baseband

PowerManagement

Digital Baseband

(DSP + MCU)

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Source: [2-3]

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• Cost• Size• Power consumption• System complexity• Time to Market

Ultimate goal: single chip CMOS RF transceiver; multi-standard.

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Ultimate goal: single chip CMOS RF transceiver; multi standard.

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Today’s mobile phones - >> 1million transistorsOnly a small fraction operate in the RF range –

l f t d (AFE)analog front-end (AFE)The rest perform low-frequency “baseband” analog and digital signal processing (DSP)analog and digital signal processing (DSP).Yet, RF section is still the design bottleneck of the entire system due to:

Multidisciplinary fieldComplex trade-offsLack of design toolsg

RFSection

BasebandSection

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Communication theoryMicrowave theory

Random signalsSignal propagation

RF DesignRF DesignTransceiversarchitectures

Multiple accessarchitectures

IC DesignWireless standards

CAD Toolsstandards

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Noise Power

Linearity Frequencyy Frequency

RF DesignRF Design

I/O Impedance Voltage swings

Supplyvoltage

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voltage

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In power amplifier, if the supply voltage is reduced, the power dissipation increases.Gain high noise highg gNoise low nonlinearSupply voltage low non-full voltage swingSupply voltage low non full voltage swingPower dissipation low gain lowFrequency high noise highFrequency high noise high

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Computer-aided analysis and synthesis toolsComputer aided analysis and synthesis toolsNonlinearity, time variance and noiseModeling circuits in scattering (S) parametersModeling circuits in scattering (S) parameters

Tools availableAdvanced Design System (ADS) by AgilentsAdvanced Design System (ADS) by AgilentsSpectreRF by CadenceHspiceRF by SynopsysHspiceRF by Synopsys

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Wireless Local Area Network (WLAN)900 MHz, 2.4 GHz & 5.7 GHz rangeConnectivity in offices hospitals factories etcConnectivity in offices, hospitals, factories, etc

Global Positioning System (GPS)1.5 GHz rangeD t t ’ l ti di tiDetect one’s location + directions

RF Identification Systems (RF ID)900 MHz & 2.4 GHz rangeLow-cost tags attached to objects or persons to track their position.

Home satellite network10 GHz rangeSatellite television

Mobile phones

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Mobile phones

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Transmit path : signal generated by the microphone modulates a high-frequency carrier and thehigh-frequency carrier, and the result is amplified and buffered so to drive the antenna.

Receive path : signal is amplified by low-noise amplifier (LNA), the spectrum translated to lower frequency by a down-converter (mixer) for subsequent demodulation, and the demodulated output is

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amplified to drive the speaker.

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V i i l di iti d b ADCTransmit path :

Voice signal digitized by ADC.Compressed to reduce bit rate & the required bandwidth.Data undergoes “coding” & “interleaving” – format the data such that the receiver can detect & minimize errors.Data is “shaped” before it is applied to the modulator & power amplifier since rectangular pulses are not optimal for

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modulation.

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Signal is amplified, down-converted and digitized.Receive path :

Subsequently, demodulation, equalization, decoding and de-interleaving and decompression are performed.Resulting data converted to analog form by a DAC amplifiedResulting data converted to analog form by a DAC, amplified and applied to a speaker.

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Performance of these transceivers can be put in simpler form :

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Determined by power delivered to the antennasensitivity of the receiver, particularly the noise of the LNA

In analog domain, all building blocks are RF circuits except audio amplifieraudio amplifier.In digital domain, the modulator, PA, LNA and down-converter operate in the RF range.

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Looking at both the transmit and receiveLooking at both the transmit and receive paths, analog signal still exists.Can’t replace the analog signal with digitalCan t replace the analog signal with digital domain.

>> Analog signal is important Th i d f LNA !!>> There is a need for LNA !!

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Built from analog

Built from analog and digital building blocks.Some sectionsSome sections pertaining RF section.

Driving force of modern RF electronics realize the whole RF section in one chipcombine this chip with a digital chip “one chip transceiver”

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combine this chip with a digital chip one chip transceiver

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Enormous support from digital market“one chip transceiver” combining the RF andone chip transceiver – combining the RF and digital/analog domain

CMOS devices achieved high cutoff frequency g q yexceeding 150 GHz for 90 nm technology [6].With multiple metal layers good capacitors and i d t (Q t 20) b i t t d hiinductors (Q up to 20) can be integrated on a chip.CMOS cheaper than other technologies (BiCMOS, GaAs )GaAs, ..).Many successful RF CMOS designs reported recently.

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Factors influencing choice of technologyFactors influencing choice of technology CMOS:

PerformancePerformanceCost time to marketLevel of integrationLevel of integrationSize / form factor

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A tAntenna

LNA IF Section

BPF Mixer

RF front endLO

RF front end

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Signal coming in from antenna is very small; amplification is needed gain requirement.amplification is needed gain requirement.The received signal should have certain signal-to-noise ratio to be reliably detected; noise comes from the environment and the circuit itself noise requirement.L i l bl k t th i t fLarge signal or blocker can occur at the input of LNA. Large signal performance of LNA should be good linearity requirement.good linearity requirement.Reasonable power consumption power constrain.

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Noise performanceSignificant impact domination at front endSignificant impact – domination at front end

Amplification / gainFirst stage in receiver – amplify weak signalg p y g

Impedance matchingEfficient power transferBetter noise performanceBetter noise performanceStable circuit

Power consumptionpStabilityLinearity

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; where in and vn are partially correlatedin = ic + iu ; ic = Ycvcvn = vc + vu

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For the MOSFET noise model, 2 sources taken into account

; = 2/3 for long channels

Correlation coefficient :

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Remember this!

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Alternate definition:ininin NSSNRFoutoutout NSSNR

Noise figure is the dB form of noise factor:FdBNF log10)(

As a function of device:d i NGN

source

sourcedevice

NGNGNNF

G: power gain of the device

If a system has no noise, then SNRin = SNRoutF =1 NF = 0dB.

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Si /Ni S t/N tSin/Nin

G1, N1, Gi, Ni, GK, NK,

Sout/Nout

NF1 NFi NFK

1...1111 KNFNFNFNFNF

Overall NF dominated by NF1[7].

1212111 ...

...11KGGGGGG

The noise contributed by each stage decreases as the gain preceding the stage increases.

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Thermal noiseRandom motion of thermally agitated charge carriers.“white” noise,

gkTfI 4)(2

: empirical constant; • 2/3 in long channel

md gkTfI 4)(

• 2-3 in short channelPMOS has less thermal noise.

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Flicker noise (1/f noise)Flicker noise (1/f noise)Random trapping of charge at oxide interface.“pink” noise,

K: technology –dependent parameter

K: technology –dependent parameter.At high frequency, it may be neglected; however in mixers and oscillators the 1/f-shaped spectrum can b t l t d t RFbe translated to RF range.

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Noise spectral density

1/f noise1/f noiseThermal noise

dominantThermal noise

Band of interest Frequency

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Band of interest q y

Ratio of output signal to input signal.p g p gSmall signal amplification capability of LNA.For IC implementation

LNA input is interfaced off-chip usually matched to specific impedance (50 ohm)output is not necessary matched if it directly drive the on-output is not necessary matched if it directly drive the onchip block such as mixer.

Characterized by voltage gain or transducer power gain; power delivered to the load divided by powergain; power delivered to the load divided by power available from source.

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Relatively easy to obtain at high frequenciesMeasure voltage traveling waves with VNAMeasure voltage traveling waves with VNA

Parameters for two-port system analysisInputs and outputs expressed in terms of powersInputs and outputs expressed in terms of powers

Transmission coefficientsReflection coefficients

b1=S11a1+S12a21 11 1 12 2b2=S21a1+S22a2

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F dF d

bi id treflectedS 2

bi id t

dtransmitteS

Forward:Forward:

aincident01

2aaincident

Reverse:Reverse:

reflectedS 112

dtransmitteS

Reverse:Reverse:

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S11 – input reflection coefficient with the output matched1

bSoutput matched

S21 – forward transmission gain or loss2bS

S21 forward transmission gain or loss

S12 – reverse transmission or isolation

b S12 reverse transmission or isolation

S22 – output reflection coefficient with the input matched

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Necessary condition ; stability factor,

||||||1

SSSSK S

where21122211 SSSSS

Unconditionally stable if1K 1Sand

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Good linearity high dynamic range

Output spectrum with 2-tone input

Good linearity high dynamic rangeUsual distortion term: 2f1-f2, 2f2-f1 fall in band characterized by 3rd order non-linearity.Large in band blocker can desensitize the circuitLarge in-band blocker can desensitize the circuit.Measured by 1-dB compression point or third order input intercept point (IIP3).

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1dB compression pointCharacterizes circuit linearity forCharacterizes circuit linearity for large input signals.The input level that cause the small signal gain to drop by 1 dBsmall signal gain to drop by 1 dB.

IIP3Characterizes circuit linearity for C a acte es c cu t ea ty osmall input signals accompanied by strong interferers.

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Good gain (S21)L i fi (NF)Low noise figure (NF)Input matching to 50 ohm (S11)Good linearity (P1dB IIP3)Good linearity (P1dB, IIP3)Output matching to 50 ohm (S22)Good reverse isolation (S12)( )Stability (K)Low power consumptionHigh frequency operation ~ GHzMany trade-offs, very difficult to design !!

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AssumeNo flicker noiseio No flicker noisero= infinityCgd = 0

Effective transconductance :

Small signal modelinmo

meffZgiGSmall signal model :

inssmeff ZRV

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Voltage input & current output;Gain,

|| inmmeff

insmeff

gssgss

CRjCjR

22 )(1 gss

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1 ms gRgR

Low frequencyR g >> ~ 1

Tms gR

Rsgm >> ~ 1gm >> 1/50 @ Rs=50 ohmPower consumingPower consuming

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No impedance matchingNo impedance matchingCapacitive input impedanceOutput not matched

Power transfer, assuming R = Rs = RL

gssRCS

High power consumption for NF and S21

gssRCS

111gssRC121

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A Resistive terminationA. Resistive terminationB. Series-shunt feedbackC Common gate connectionC. Common-gate connectionD. Inductor degeneration

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Rs 4kT/Rsio 4kT/RI

4kT gm

Vs Is Rs Vgs gmVgsRI RI

Power gain,2

Noise figure,/1/1 gsIs CjRR

s RgRRg

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Simple LNA NF :Simple LNA NF :

Resistive termination NF :Tms g

s RgRR

RgRRNF

Introduced by input resistance Signal attenuated

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Noise performanceNoise performanceInput matched RS = RI = R and NF,

Signal attenuatedN i i t d d th h R

Noise introduced through RI

NF = 10 log (2) = 3 dB (best that can be done)

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RFRL RF

ioutRss

Vgs gmVgsCgs

Broadband matching

Ra RaVs

gsaamLFi

CsRRgRRR

Broadband matchingCould be noisy

gsLFaaLmin CRRRsRRg

R)()(1

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out RRCRRRRRRsC

RRCRRRgR

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For RF >> Rs, RF >> RL and gmRF >>1 the NF can be given by:

SmSmF RgRgRBetter performance than common source amplifier.The load resistor influences the input impedanceThe load resistor influences the input impedance.Supplementary noise introduced by the RF.Need a shunt inductor to tune out C at higherNeed a shunt inductor to tune out Cgs at higher frequencies.To minimize noise, RF > RS, gmRS >> 1.

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R 4kTR RL

4kT gms

Rs 4kTRs

VgsgmVgs

outIGRs 4kTRs

outeff

Vs Vgs gmVgs4kT gm

CsRRgg

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Input impedanceInput impedance

Input impedance matchinggsmin sCgY

Input-impedance matching1/gm = Rs = 50 ohm

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41 mindevice gkTNGNNF

)()( gsssmg

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CRRggkTRNG

2222)1(1 gsssmms

CRRggR

Si l tt t d

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Signal attenuated

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N i fNoise performanceNo extra resistive noise sourceIndependent of power consumptionIndependent of power consumption

Impedance matchingBroadband input matchingBroadband input matchingNo passive components

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Rs LgZin

Vgs gmVgsCgs

sgsmings

inginin sLVgIsC

IsLIV )(1

inmings

IsLI )1(1

smsgin

sCLLsI 1)(

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Require for Zinto match Rsq in s

Matching criteria: )(

1gs LL

Cssm R

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criteria: )( sggs LLs

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)( gsmout sCgIG

outeff

= 0 @ 0

)()(1 2sggssmgss LLCsLgCRs

)()](1[m

eff LCRLLCgGG

)()](1[ smgsssggsff LgCRLLC

gRemember:

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gsT C )( sTs

meff LRG

N"2&%(42;0-%

Calculate NF at 00

4 gkTNGN

indevice

LgCRgkTR

22 )(1

LgCRgR

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powerLostpowerStoredQR LI

CRRIICII

powerLost

*CVCRRII

R LL 11

gmLs/Cgs 1

gssmsgsin CLgRCCR

Vsgm s gs

smgss LgCR

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in LgCRQ

22 )(1 smgssms

LgCRgR

11inms QgR

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Noise performanceNo resistive noise sourceV d i fiVery good noise figureNF decreases with the quadrature of the input quality factor

Impedance matching Matched at carrier frequency

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Reverse isolation / stabilityReverse isolation / stabilityUse cascode structure

improve SVbias

M2 improve S12

reduce feedback effect of Cgd

Improve noise performanceRs Lg

p pDisadvantage : need a bias voltage

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MNJMNJ

Descriptions Zin Noise performance Gain

StructuresZin Noise performance Gain

Resistive termination

Lm RgRgm

RgRgRR

terminationSeries-shunt

feedbackLm

Common-gate connection

Inductor Lg

RQ21inms QgR

Inductor degeneration

Linm RQg

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NF equations:

onfKF 1

22 )14(211do Qc

gK )14(21

nf QcQg

gsos CRQ

Linearity: Voltage gain:

thgs VVIIP3S

RjAInductive degenerated CMOS LNA

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Frequency 2 4 GHz ISM BandFrequency 2.4 GHz ISM BandNoise Figure < 2 dBIIP3 8 dBIIP3 < -8 dBmVoltage gain 20 dBPower < 10mA from 1.8V

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0.18um CMOS ProcessProcess related parametersProcess related parameters

tox = 4.1e-9 m= 3.9*(8.85e-12) F/m= 3.274e-2 m2/V.s

Vth = 0.52 VNoise related parametersNoise related parameters

= gm/gdo

~ 2~ 3

c = -j0.55

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gdo increases all the way with current density IIdengm saturates when Iden larger than 120 A/ m

Velocity saturation mobility degradation shortVelocity saturation, mobility degradation ---- short channel effectsLow gm/current efficiencygm yHigh linearitydeviates from long channel value with g

large Iden

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fT increases with Vod when Vod is small and t t ft V > 0 3V h t h lsaturates after Vod > 0.3V --- short channel

effectsC /W i l l ft V 0 2VCgs/W increases slowly after Vod > 0.2VfT begins to degrade when Vod > 0.8V

gm saturatesCgs increases

Should keep Vod ~0.2 to 0.4 V

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Knf vs input Q and current density

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For fixed Id increasing Q will reduce theFor fixed Iden, increasing Q will reduce the size of transistor thus reduce total power ----noise figure will become largerg gFor fixed Q, reducing Iden will reduce power, but will increase noise figurebut will increase noise figureFor large Iden, there is an optimal Q for minimum noise figure but power may be toominimum noise figure, but power may be too high

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Linearity plots :IIP3 vs. gate overdrive and transistor size

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MOS transistor IIP3 only, when embedded intoMOS transistor IIP3 only, when embedded into actual circuit:

Input Q will degrade IIP3.Non-linear memory effect will degrade IIP3.Output non-linearity will degrade IIP3.

IIP3 is a very weak function of device sizeIIP3 is a very weak function of device size.Generally, large overdrive means large IIP3

But the relationship between IIP3 and gate overdrive is notBut the relationship between IIP3 and gate overdrive is not monotonic.There is a local maxima around 0.1V overdrive.

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Small current budget ( < 10mA ) does not allow largeSmall current budget ( < 10mA ) does not allow large gate overdrive :

Vod ~ 0.2 V ~ 0.4 Vf 40 45 GH

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fT ~ 40 ~ 45 GHz

A$%E(]/(I%$%-F2#%(.)%#^(V(,#)

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Gm/W~0.4

S l t I 70 A/ >V 0 23V

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Select Iden = 70 A/ m, =>Vod~0.23V

If Q = 4, IIP3 will have enough margin:Q , g gEstimated IIP3:IIP3(from curve) – 20log(Q) = 8-12 = -4dBmSpecs require: > 8 dBm

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Specs require: >-8 dBm

Q=4 and Iden = 70 A/ m meet thenoise figure requirement

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Some calculations:C 1mfFWCgs /3.1 fF

oSgs 166

fF166 mmfF

fFW 128/3.1

AAI 98/70128

Verifying cutoff frequency;

mAmAmIDS 9.8/70128

GHzCgf

mT 482mSgm 501284.0

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L Ss 2.0

nHLL S 261 nHLC

L Sgso

RjA 30SVo

L RARSo R

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SParameter Target SimulatedNoise Figure 1.6 dB 0.8 dBDrain Current < 10mA 8 mAVoltage gain 20 dB 21 dBIIP3 -8 dBm -6.4 dBmP1dB -20dbmS11 -17 dBPower supply 1.8 V 1.8 V

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Step-by-step:1 Process parameters1. Process parameters2. Design guide plots3. Cutoff frequency, fT4. Current density Iden, Q and device sizes5. Inductors values – Lg, Ls and RL

6 Simulation verification6. Simulation verificationEquations and simulation plots needed in order to meet design specifications.g pSeveral iterations between calculations and simulations required to achieve satisfactory result.

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Objective is to design Variable Gain LNA (VGLNA) that would:that would:

Provide sufficient gain Typically 10 dB < gain < 20 dB

Minimize noise contributionNF ~ 2 dB

Good linearity performanceGood linearity performanceConsume minimum powerDesire to have variable gain amplificationg p

High dynamic range of the input signals

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b<MNJ(,-182$%1$0-%(d($,-;%$(/H SUY(<e_

Rbias Cu Lu

RFoutI3 I4Vb

M2M3 M4

ClRFoutVb

1st stage 2nd stage

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1st stage 2nd stage

X&$ &$,;%(H MNJ

The cascode architecture Vdd

provides a good input –output isolation.T i t M i l t thM2

ClRFout

Transistor M2 isolates the Miller capacitance.Input Impedance isM1

Input Impedance is obtained using the source degeneration inductor Ls. G t i d t L t th

LgCiRFin

Gate inductor Lg sets the resonant frequency.

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S#) &$,;%(H b,-2,C7%(<,2#(B !0--%#$(F")%(

$ 8 2 (.$%18#250%^(.\Consisted of M3, M4 and LC load.M3 t bi ltM3 converts bias voltage, Vbias to the drain current signal, I3.Gain amplified and controlledRbias Cu Lu

Gain amplified and controlled through geometry ratio of M4/M3 which influences current, I4,3.M3 M4 Cl

RFoutI3 I4

From_LNA_stage'3

Lu & Cu used for output 43

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u u pmatching.

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The gain S21 changes with changes with Vbias changes from 1.0 to 1.8 V, reporting tuning range of 27.98 dB; from g g g-7.7 20.08 dB.

When Vbias = 1.8 V: SImulated

When Vbias = 1.0 V: Simulated

Measured

M dMeasured

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Description Units Measured data ( )

Simulated data( )( ) ( )

Vbias V 1.0 1.8 1.0 1.8

Gain, S21 dB -7.699 20.082 20.226 25.576

S11 dB -7.902 -10.045 -11.348 -11.348

S12 dB -11.591 -7.046 -72.913 -68.831

S22 dB 2.409 11.093 -2.67 -4.88

Gain variation dB 27.981 5.35

Power dissipation mW 60.0 48.1

NF dB 4.417 1.560

IIP3 dBm 16.451 16.080

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Consisted of a transistor Mgcand a capacitor Cf.If Mgc is turned off, the gain control loop acts like an open

control loop acts like an open circuit minimum gainIf Mgc is turned on with sufficiently high voltage (like

y g g (VDD), the Mgc operates as a bypass switch maximum gainControl voltage of Mgc is between V and V acts like a variable

VT and VDD acts like a variable resistor.Resistance equal to channel R;

gcthgscoxn

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M2CLCf

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Description Unit Measured data ( )

Simulated data( )( ) ( )

Controlled voltage, Vc

V 0.5 1.0 0.5 1.0

Gain S dB 17 828 13 161 8 631 22 185Gain, S21 dB 17.828 13.161 8.631 22.185

S11 dB -1.303 -1.197 -19.361 -18.503

S12 dB -50.828 -54.638 -60.221 -60.08

S22 dB -2.396 -3.703 -0.091 -0.444

Gain variation dB 4.667 13.554

NF dB 0.812 1.916 1.125 1.116NF dB 0.812 1.916 1.125 1.116

IIP3 dBm 3.61 4.636 -2.178 -2.609

Power dissipation mW 5.55 15.3 4.28 12.4

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By adding a simple gain control loop composed of Mgc and Cf, a 2.4 GHz VGLNA achieves gain tuning range of 4.67 dB.

!"#170&2"#

Overviews of RF subsystemBuilding blocks of wireless transceiverAnalog digital & RF fieldsAnalog, digital & RF fieldsWireless applications

RF front-end circuits, typically LNAParameters for noise power impedance matchingParameters for noise, power, impedance matching

Procedures on designing an inductive source degeneration LNAStep-by-step

Design examplesDesign examplesDesign methods and techniques

current mode for VGLNAproposed gain control loop for VGLNAp p g p

Other architecturesDifferential, combined current reuse, inter-stage inductor and folded cascode

!"#$%&'(")*&$+,"#'-./'01'2,3#4#5"6'7 89:((

3%@%-%#1%&/1. http://www.ek.isy.liu.se/~jdab2. T. Manku, G. Beck and E. J. Shin, “A Low-Voltage Design Technique for RF Integrated

Circuits,” IEEE Trans. On Circuits and System, vol. 45, Oct. 1998, pp. 1408-1413.3. http://bwrc.eecs.berkeley.edu/

B R i “Ch ll i P t bl RF T i D i ” IEEE Ci it d D i4. B. Razavi, “Challenges in Portable RF Transceiver Design,” IEEE Circuits and Devices Magazine, vol. 12, Sept. 1996, pp. 12-25.

5. http://www.ee.ualberta.ca/~igor/6. C.-S. Chang, C.-P. Chao, J. G. J. CHern and J. Y-C. Sun, “Advanced CMOS Technology

Portfolio for RF IC Applications,” IEEE Trans. Electron Devices, vol. 52, no. 7, July 2005, pp. 1324 13341324-1334.

7. F. Friis, “Noise Figure of Radio Receivers,” Proc. IRE, vol. 32, July 1944, pp. 419-422.8. D. Shaeffer and T. Lee, “A 1.5-V, 1.5 GHz CMOS Low Noise Amplifier,” IEEE J. Solid-State

Circuits, vol. 32, May 1997, pp. 745-759.9. A. Karanicolas, “A 2.7 V 900-MHz CMOS LNA and Mixer,” IEEE J. Solid-State Circuits, vol. 31,

Dec 1996 pp 1939 1944Dec. 1996, pp. 1939-1944.10. http://amesp02.tamu.edu/~sanchez/11. F. Gatta, E. Sacchi, F. Svelto, O. Vilmercati and R. Castello, “A 2-dB Noise Figure 900-MHz

Differential CMOS LNA,” IEEE J. Solid-State Circuits, vol. 36, Oct. 2001, pp. 1444-1452.12. Y.S. Wang and L.-H. Lu, “5.7 GHz low-power variable-gain LNA in 0.18 µm CMOS,”

Electronics Letters vol 41 Jan 2005 pp 66 68Electronics Letters, vol. 41, Jan. 2005, pp. 66-68.13. M.-D. Tsai, R.-C. Liu, C.-S Lin and H. Wang, “A Low-Voltage Fully-Integrated 4.5-6 GHz CMOS

Variable Gain LNA,” 33rd European Microwave Conference, Munich, vol. 1, pp. 13-14, Oct. 2003.

!"#$%&'(")*&$+,"#'-./'01'2,3#4#5"6'7 89:!))

lna tutorial ver4.ppt - SMDP-C2SDsmdpc2sd.gov.in/downloads/Other Materials/lna_tutorial.pdf · 1 1 1 F g m S g m S ¨ ¸ . impedanceThe load resistor influences the input impedance

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