Transcript
Lecture : Lecture :
TRANSISTOR BIAS TRANSISTOR BIAS CIRCUITSCIRCUITS
Semester II2010/2011
Code: EEE2213
Apr 10, 2023 1
THE DC OPERATING POINTA transistor must be properly biased with a dc voltage in order to operate as a linear amplifier.
A dc operating point must be set so that signal variations at the input terminal are implified & accurately reproduced at the output terminal.
Note that when we bias a transistor, the dc voltage and current values will be established.
Thus, at the dc operating point, IC & VCE have specified values.
Q-point: the dc operating point (quiescent point)Apr 10, 2023 2
DC Bias
Bias establishes the dc operating point (Q-point) for proper linear operation of an amplifier.
If an amplifier is not biased with correct dc voltages on the input and output, it can go into saturation or cutoff when an input signal is applied.
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FIGURE 5–1 Examples of linear and nonlinear operation of an inverting amplifier (the triangle symbol).
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Figure 5-1 shows the effects of proper & improper dc biasing of an inverting amplifier.
Part (a): Linear operation
The output signal is an amplified replica of the input signal except that it is inverted, which means that it is 180° out of phase with the input.
The output signal swings equally above & below the dc bias level of the output, V DC(out).
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Part (b & c): Nonlinear operation
Improper biasing can cause distortion in the output signal.
Part (b): shows the limiting of the positive portion of the output voltage as a result of a Q-point (dc operating point) being too close to cutoff.
Part (c): shows the limiting of the negative portion of the output voltage as a result of a dc operating point being too close to saturation.
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Graphical Analysis
The transistor in Figure is biased with VCC & VBB to obtain certain values of IB, IC, IE, and VCE.
The collector characteristic curves for this particular transistor are shown in Figure.
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Figure 5-3 Illustration of Q-point adjustment.
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Refer to Figure 5-3;
Assign 3 values to IB & observe what happens to IC & VCE.
First, VBB is adjusted to produce an IB of 200µA.
Since IC=βDCIB, the collector current is 20 mA, & VCE;
VCE=VCC – ICRC = 10 V – (20 mA)(220Ω) = 10 V – 4.4 V = 5.6 V
(this Q-point is shown in (a) as Q1.)
Next, in (b);
VBB is increased to produce an IB of 300µA & an IC of 30 mA.
VCE=VCC – ICRC = 10 V – (30 mA)(220Ω) = 10 V – 6.6 V = 3.4 V
(this Q-point is shown in (a) as Q2.)
Next, in (c);
VBB is increased to produce an IB of 400µA & an IC of 40 mA.
VCE=VCC – ICRC = 10 V – (40 mA)(220Ω) = 10 V – 8.8 V = 1.2 V
(this Q-point is shown in (a) as Q3.)Apr 10, 2023 9
DC Load LineThe dc operation of a transistor circuit can be described graphically using a dc load line.
DC Load Line: a straight line drawn on the characteristic curves from the saturation value where IC=IC(sat) on the y-axis to the cutoff value where VCE = VCC on the x-axis.
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Load line is determined by the external circuit (VCC & RC), not determined by the transistor itself, which is described by the characteristic curve.
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Refer to Figure 5-3,
the equation for IC is;
This is the equation of a straight line with a slope of -1/RC, an x intercept of VCE=VCC, & a y intercept of VCC/RC, which is IC(sat).
The point at which the load line intersects a characteristic curve represents the Q-point for that particular value of IB.
Figure 5-4(b): shows the Q-point on the load line for each value of IB in Figure 5-3.Apr 10, 2023 12
Linear OperationThe region along the load line including all points between saturation & cutoff is generally known as the linear region of the transistor’s operation.
As long as the transistor is operated in this region, the output voltage is ideally a linear reproduction of the input.
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Figure shows an example of the linear operation of a transistor.
AC quantities are indicated by lowercase italic subscripts.
Assume a sinusoidal voltage, Vin, is superimposed on VBB, causing the base current to vary sinusoidally 100 µA above and below its Q-point value of 300 µA.
This will causes the collector current to vary 10 mA above and below its Q-point value of 30 mA.
From the variation in collector current, the collector-to-emitter voltage varies above and below its Q-point value of 3.4 V.
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Point A on the load line: corresponds to the positive peak of the sinusoidal input voltage.
Point B on the load line: corresponds to the negative peak.
Point Q: corresponds to the zero value of the sine wave.
VCEQ, ICQ, & IBQ are dc Q-point values with no input sinusoidal voltage applied.Apr 10, 2023 15
Waveform DistortionUnder certain input signal conditions, the location of the Q-point on the load line can cause one peak of the VCE waveform to be limited or clipped (Figure (a) & (b).
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In each case, the input signal is too large for the Q-point location & is driving the transistor into cutoff or saturation during a portion of the input cycle.
When both peaks are limited as in (c), the transistor is being driven into both saturation and cutoff by an excessively large input signal.
When only the positive peak is limited, the transistor is being driven into cutoff but not saturation.
When only the negative peak is limited, the transistor is being driven into saturation but not cutoff.
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Example 5-1
Apr 10, 2023 18
Lecture 9-2: Lecture 9-2:
TRANSISTOR BIAS TRANSISTOR BIAS CIRCUITSCIRCUITS
Semester II2010/2011
Code: EEE2213
Apr 10, 2023 19
VOLTAGE-DIVIDER BIASA method of biasing a transistor for linear operation using a single-source resistive voltage divider.
Earlier, a separate dc source, VBB, was used to bias the base-emitter junction because it could be varied independently of VCC, & it helped to illustrate transistor operation.
More practical bias method: use VCC as the single bias source (refer next Figure).
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A dc bias voltage at the base of the transistor can be developed by a resistive voltage divider that consists of R1 & R2.
VCC: the dc collector supply voltage
2 current paths are between point A & ground;
(1)through R2, and
(2)through the base-emitter junction of the transistor & RE
Generally, voltage-divider bias circuits are designed so that the base current is much smaller than the current (I2) through R2.
For this case, the voltage-divider circuit is very straightforward to analyze because the loading effect of the base current can be ignored.
Stiff voltage divider: A voltage divider in which the base current is small compared to the current in R2 (the base voltage is relatively independent of different transistors & temperature effects).Apr 10, 2023 22
To analyze a voltage-divider circuit in which IB is small compared to R2, first calculate the voltage on the base;R1 and R2 are selected to establish VB. If the divider is stiff, IB is small compared to I2. Then,
+VCC
RCR1
RER2
2B CC
1 2
RV V
R R
+VCC
RCR1
RER2
βDC = 200
27 kW
12 kW
+15 V
680 W
1.2 kW
Determine the base voltage for the circuit.
2B CC
1 2
12 k15 V
27 k 12 k
RV V
R R
W W W 4.62 V
I2
IB
• Once we have the base voltage, we can find the voltages & currents in the circuit;
• and
• Then,
• From the VC & VE, we can determine VCE;
Apr 10, 2023 24
+VCC
RCR1
RER2
βDC = 200
27 kW
12 kW
+15 V
680 W
1.2 kW
4.62 V
What is the emitter voltage, VE, and current, IE?
VE is one diode drop less than VB:
VE = 4.62 V – 0.7 V =3.92 V
3.92 VApplying Ohm’s law:
EE
E
3.92 V
680
VI
R
W5.76 mA
Example 5-2
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Ideally, a voltage-divider circuit is stiff; where transistor does not appear as a significant load.To determine if the divider is stiff or not, then need to examine the dc input resistance looking in at the base.
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Loading Effects of Voltage-Divider Bias
(1) DC Input Resistance at the Transistor Base
(2) Stability of Voltage-Divider Bias
(3) Voltage-Divider Biased PNP Transistor
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DC Input Resistance at the Transistor Base
The dc input resistance of the transistor is proportional to βDC, thus it will change for different transistors.
When a transistor is operating in its linear region, the emitter current is βDC IB.
When the emitter resistor is viewed from the base circuit, the resistor appears to be larger than its actual value by a factor of is βDC because of the current gain in the transistor. Thus,
This is the effective load on the voltage divider illustrated in earlier Figure.
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We can estimate the loading effect by comparing RIN(BASE) to the resistor R2 in the voltage divider.
As long as RIN(BASE) is at least 10x larger than R2, the loading effect will be 10% or less & the voltage divider is stiff.
If RIN(BASE) is less than 10x R2, it should be combined in parallel with R2.
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Example 5-3
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Stability of Voltage-Divider Bias Thevenin’s theorem is applied when analyze a voltage-divider biased transistor circuit for base current loading effects.
1st, get an equivalent base-emitter circuit for this circuit using Thevenin’s theorem.
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Looking out from the base terminal, the bias circuit can be redrawn as shown in this figure.
Apply Thevenin’s theorem to the circuit left of point A, with VCC replaced by a short to ground & the transistor disconnected from the circuit.
The voltage at point A with respect to ground is,
and the resistance is,
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The Thevenin equivalent of the bias circuit, connected to the transistor base, is as shown in the grey box in the figure.
Applying Kirchhoff’s voltage law around the equivalent base-emitter loop gives,
Substituting, using Ohm’s law, & solving for VTH,
Substituting IE / βDC for IB,
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Solving for IE,
If RTH / βDC is small compared to RE, the result is the same as for unloaded voltage divider.
Reason of why a voltage-divider bias is widely used;
Reasonably good bias stability is achieved with a single supply voltage.
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The unloaded voltage divider approximation for VB gives reasonable results. A more exact solution is to Thevenize the input circuit.
+VCC
RCR1
RER2
βDC = 200
27 kW
12 kW
+15 V
680 W
1.2 kW
VTH = VB(no load)
= 4.62 VRTH = R1||R2 =
= 8.31 kWThe Thevenin input circuit can be drawn
R C
R TH
+VCC
R E
+V TH + –
IB
+
+
–
–IE
VBE
8.31 kW
680 W
1.2 kW
4.62 V
+15 V
βDC = 200
Now write KVL around the base emitter circuit and solve for IE.
R C
R TH
+VCC
R E
+V TH + –
IB
+
+
–
–IE
VBE
8.31 kW
680 W
1.2 kW
4.62 V
+15 V
βDC = 200
TH B TH BE E EV I R V I R
TH BEE
THE
DCβ
V VI
RR
Substituting and solving,
E
4.62 V 0.7 V8.31 k680 + 200
I
WW 5.43
mAand
VE = IERE = (5.43 mA)(0.68 kW
= 3.69 V
Voltage-Divider Biased PNP Transistor
pnp transistor requires bias polarities opposite to the npn.
This can be accomplished by using a negative collector supply voltage: (a), or with a positive emitter supply voltage (b). 3rd figure is same as (b), only that it is drawn upside down.
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Analysis procedure is the same as for an npn transistor circuit.
For a stiff voltage divider (ignoring loading effects),
By Ohm’s law,
Thus,
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Determine IE for the pnp circuit. Assume a stiff voltage divider (no loading effect).
1B EE
1 2
27 k15.0 V 10.4 V
27 k 12 k
RV V
R R
W W W
E B BE 10.4 V 0.7 V = 11.1 VV V V
EE EE
E
15.0 V 11.1 V
680
V VI
R
W5.74 mA
+VEE
R 2
1R RC1.2 kW
R E680 W
27 kW
12 kW
+15 V
10.4 V 11.1 V
Example 5-4 & 5-5
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EMITTER BIASProvides excellent bias stability in spite of changes in β or temperature.
Use both a positive & a negative supply voltage.
In an npn circuit, the small base current causes the base voltage to be slightly below ground.
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The emitter voltage is one diode drop less than this.
The combination of this small drop across RB & VBE forces the emitter to be at approximately -1 V.
Thus, emitter current is,
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Applying the approximation that
to calculate the collector voltage, thus
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Example 5-6
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• Approximation that & the neglect of βDC may not be accurate enough for design work or detailed analysis.
• Kirchhoff’s voltage law (KVL) can be applied to develop a more detailed formula for IE.
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• In (a): KVL applied around the base-emitter circuit
• In (b): (a) is redrawn for analysis
• Thus,
• Using Ohm’s law,
• Substitute & transposing VEE,
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• Thus,
• Voltages with respect to ground are indicated by a single subscript.
• Thus, the emitter voltage with respect to the ground is,
• The base voltage with respect to ground is,
• The collector with respect to the ground is,
Example 5-7
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BASE BIAS This method of biasing is common in switching circuits.
Analysis of this circuit for the linear region shows that it is directly dependent on βDC.
Starts with KVL around the base circuit,
Substitutes IBRB for VRB,
Thus,
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When KVL is applied around the collector circuit, we get,
Thus,
Substitute IC = βDCIB, we get,
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RC
R B
+VCC
Base bias is used in switching circuits because of its simplicity, but not widely used in linear applications because the Q-point is dependent.Base current is derived from the collector supply through a large base resistor.
What is IB?
CCB
B
0.7 V 15 V 0.7 V
560 k
VI
R
W25.5 A
RC
R B
+VCC
560 kW
+15 V
1.8 kW
Q-Point Stability of Base Bias Equation
shows that IC is dependent on βDC. Thus, a variation in βDC causes IC and, as a result, VCE to change, thus changing the Q-point of the transistor. Therefore, the base bias circuit is extremely beta-dependent & unpredictable.
βDC varies with temperature & collector current.
There is a large spread of βDC values from one transistor to another of the same type due to manufacturing variations.
Therefore, base bias is rarely used in linear circuits.Apr 10, 2023 53
Example 5-8
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EMITTER-FEEDBACK BIAS If an emitter resistor is added to the base-circuit, we get an emitter-feedback bias.
Help make base bias more predictable with negative feedback, which negates any attempted change in collector current with an opposing change in base voltage.
If the collector current tries to increase, the emitter voltage increases, causing an increase in base voltage due to VB = VE + VBE
This increase in base voltage reduces the voltage across RB, thus reducing the base current & keeping the collector current from increasing.Apr 10, 2023 55
The same scenario happens if the collector current tries to decrease.
This circuit is better for linear circuits than base bias, but still dependent on βDC & is not predictable as voltage-divider bias.
To calculate IE, write KVL around the base circuit.
Substitute IE/βDC for IB, can see that IE is still dependent on βDC.
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Example 5-9
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COLLECTOR-FEEDBACK BIAS The base resistor RB is connected to the collector rather than to VCC.
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The collector voltage provides the bias for the base-emitter junction.
The negative feedback creates an “offsetting” effect that tends to keep the Q-point stable.
If IC tries to increase, it drops more voltage across RC, and thus causing VC to decrease.
When VC decreases, there is a decrease in voltage across RB, which deecreases IB.
The decrease in IB produces less IC which, in turn, drops less voltage across RC & thus offsets the decrease in VC.
By Ohm’s law,
Assume that IC >> IB, thus the collector voltage,
Also,
Thus,
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Thus,
Since the emitter is ground, VCE = VC, then
Apr 10, 2023 60
Equation
shows that IC is dependent to some extent on βDC and VBE .
The dependency can be minimized by making RC >> RB/βDC & VCE >>VBE.
The collector-feedback bias is essentially eliminates the βDC & VBE dependency even if the stated conditions are met.
βDC varies directly with temperature, & VBE varies inversely with temperature. As the temperature goes up in a collector-feedback circuit, βDC goes up & VBE goes down.
Q-Point Stability Over Temperature
Apr 10, 2023 βDC 61
The increase in βDC acts to increase IC. The decrease in VBE acts to increase IB which, in turn also acts to increase IC. As IC tries to increase, the voltage drop across RC also tries to increase. This tends to reduce the collector voltage & therefore the voltage across RB, thus reducing IB & offsetting the attempted increase in IC & the attempted decrease in VC.
The result is that the collector-feedback circuit maintains a relatively stable Q-point. The reverse action occurs when the temperature decreases.Apr 10, 2023 βDC 62
When = 100,
CC BEC
BC
DC
15 V 0.7 V330 k1.8 k 100β
V VI
RR
WW
+VCC
RCR B
330 kW
1.8 kW
+ 15 V
Compare IC for the case when = 100 with the case when = 300.
2.80 mA
When = 300,
CC BEC
BC
DC
15 V 0.7 V330 k1.8 k 300β
V VI
RR
WW4.93 mA
Example 5-10
Apr 10, 2023 64
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