I/O Interfacing ECE 511: Digital System & Microprocessor.

I/O Interfacing

ECE 511: Digital System & Microprocessor

What we are going to learn in this session: M68230 Parallel Interface Timer. Registers in the M68230. Port initialization method. How M68230 interfaces with various

devices. Delay subroutine.

The M6230 Parallel Interface/Timer

M68230 Parallel Interface/Timer

Used by M68000 to communicate with external devices.

Parallel data transfer. Has three ports:

Port A, Port B, Port C. Each port is 8-bits long. Ports connect to devices. Ports need to be initialized before used.

M68230 Datasheet

M68230 Interfacing

Memory

M68230

Port A

Port B

Port C

Data BusCS* Device #1

Device #2

Device #3

(LED, Switches, Motor,7-Segment, Keypad, etc.)

How M68230 connects to M68k

D0-D7 D0-D7

DTACK*DTACK*

R/W*R/W*

RESET* RESET*

MAD CS*

A6-A23

A1-A5RS1-RS5

PA0-PA7

PB0-PB7

PC0-PC7

M68k M68230

(Register select pins)

M68230 Ports

Registers in M68230

M68230 contains 23 registers. Each of the registers have a unique address that

refers to them. To initialize ports, some registers need to be

configured. Port General Control Register. Port X Control Register (A, B). Port X Data Direction Register (A, B, C). Port X Data Register (A, B, C).

Port General Control Register. Used to set the operation of Port A & Port

B. You only need to know (and use) Mode 0. MOVE.B #$00,PGCR

PGCR Settings

PGCR= Description

$00 Unidirectional 8-bit transfer (Port A, Port B)

$40 Unidirectional 16-bit transfer (Port A + Port B)1

$80Bidirectional 8-bit transfer on

Port B, bit I/O on Port A.2

$C0 Bidirectional 16-bit transfer (Port A + Port B)3

Port X Control Register

Used to set buffering of input/output on PXDR.

Three modes:Mode 00.Mode 01.Mode 1X.

You only need to know (and use) mode 1X.

PXCR Settings

PXCR= Description

$00 Double-buffered input

Sub-mode

$40 Double-buffered output01

$80 Bit I/O1X

Port X Data Direction Register

Used to specify the direction of data transfer for each bit in the port.

Two states: If PXDDR bit = 0, will be set as input. If PXDDR bit = 1, will be set as output.

Port X Data Register

Contains the data sent/received to/from devices.

Each PXDR carries 8-bits of data. There are three data registers in the

M68230: PADR, PBDR, PCDR.

Port Initialization

To perform port initialization:Assign the register addresses to a unique

name.PGCR must be set to #$00.PXCR must be set to #$80.Set PXDDR to input or output.

Port Initialization Example

START ORG $XXXXXX

PGCR EQU $A00001

PACR EQU $A0000D

PBCR EQU $A0000F

PADDR EQU $A00005

PBDDR EQU $A00007

PCDDR EQU $A00009

PADR EQU $A00011

PBDR EQU $A00013

PCDR EQU $A00019

MOVE.B #$00,PGCR

MOVE.B #$80,PACR/PBCR

MOVE.B #$XX,PADDR/PBDDR/PCDDR

(DEPENDING ON THE H/W)

Port Address

PGCR $A00001

PACR $A0000D

PBCR $A0000F

PADDR $A00005

PBDDR $A00007

PCDDR $A00009

PADR $A00011

PBDR $A00013

PCDR $A00019

68230 Interfacing

M68230 Interfacing

M68230 interfacing is similar to memory interfacing in last chapter.

Instead of interfacing memory, M68230 is interfaced.

A1-A5 is reserved for M68230, the rest used for decoder.

Example: Full Decoding

Interface M68230 with M68k so that its base address is $A50000.

Discussion

For M68230 interfacing, 5 lines are automatically reserved for M68230.

Step 1: Allocate Address Line

A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5

UDS/LDS(reserved)

5 lines allocated

Step 2: Set Base Address

UDS/LDS(reserved)

A 5 0 0

Step 3: Find Lower Range

A 5 0 0 0 0

Step 4: Find Upper Range

A 5 0 0 3 F

Step 5: Design Decoder

A 5 0 0

A23 A16

A15 A8 A7 A6 AS*

SELIO*

Memory Block Diagram

unused

Interfaced with M68k (M68230 I/O)

unused

$FFFFFF

$000000

$A50000

$A5003F

(Lower Range)

(Upper Range)

Sample Programs

LEDs & Switches

Example 1

Example 1: Set LED

M68230A set of LEDs are connected toPort B in M68230. Write a program that turns on LED3 and LED4, and turns off the rest.

Port Address

PGCR $800001

PACR $800005

PBCR $800007

PADDR $800009

PBDDR $80000D

PCDDR $80000F

PADR $800011

PBDR $800013

PCDR $800019

Discussion

Port B should be initialized before being used.

To turn on LED, the voltage at Port B bits should be high.

To turn off LED, the voltage at Port B should be low.

LED Operation

A B LED

0 0 Zero biased (OFF)

0 1 Reverse biased (OFF)

1 0 Forward biased (ON)

1 1 Zero biased (OFF)

Solution

START ORG $1000PGCR EQU $800001PBCR EQU $800007 PBDDR EQU $80000DPBDR EQU $800013

INIT MOVE.B #$00,PGCRMOVE.B #$80,PBCRMOVE.B #$FF,PBDDR

ONLED MOVE.B #%00011000,PBDR

END START

Example 1: Set LED

M68230LED0

Example 2

Example 2: Read Switches & Output to LED A set of switches are connected to Port A,

and a set of LEDs are connected to Port B in M68230. Write a program that reads the value in the switches and turns on the respective LEDs.

Switch Operation+5V

Switch A

OPEN 0

CLOSE 1

Switch Operation+5V

RSwitch A

OPEN 1

CLOSE 0

Circuit Diagram

PA0 PB0

PA1 PB1

PA2 PB2

PA3 PB3

PA4 PB4

PA5 PB5

PA6 PB6

PA7 PB7

M68230LED0

Port Assignments

Port Address

PGCR $A00001

PACR $A0000D

PBCR $A0000F

PADDR $A00005

PBDDR $A00007

PCDDR $A00009

PADR $A00011

PBDR $A00013

PCDR $A00019

Discussion

Both Port A & B should be initialized before being used.

When the switch is OPEN, 5V is passed to M68230 (logic high).

When the switch is CLOSE, 0V is passed to M68230 (logic low).

Solution – Initialize Ports

INIT MOVE.B #$00,PGCR

MOVE.B #$80,PACR

MOVE.B #$80,PBCR

MOVE.B #$00,PADDR

MOVE.B #$FF,PBDDR

Solution – Solve Problem

LOOP MOVE.B PADR,D0

MOVE.B D0,PBDR

BRA LOOP

Solution – Complete Program

START ORG $1000PGCR EQU $A00001PACR EQU $A0000DPBCR EQU $A0000FPADDR EQU $A00005PBDDR EQU $A00007PADR EQU $A00011PADR EQU $A00013

INIT MOVE.B #$00,PGCRMOVE.B #$80,PACRMOVE.B #$80,PBCRMOVE.B #$00,PADDRMOVE.B #$FF,PBDDR

LOOP MOVE.B PADR,D0MOVE.B D0,PBDRBRA LOOP

END START

Sample Output

PA0 PB0

PA1 PB1

PA2 PB2

PA3 PB3

PA4 PB4

PA5 PB5

PA6 PB6

PA7 PB7

M68230LED0

PADR D0 PBDR

7-Segment

Consists of 7-LEDs arranged together.

Can display numbers and characters.

Each segment is marked with a letter (a to g).

To display characters, need to turn on/off certain segments.

Also has E (enable) pin to turn on/off 7-segment.

Interfacing 7-Segment with M68230

To interface with M68230, each segment (a to g) is connected to a port in M68230.

The E signal must also be connected to a port to enable/disable the 7-segment.

7-Segment Types

There are two types of 7-segment displays:Common cathode.Common anode.

Each type differs in how they behave with certain inputs.

Common Cathode 7-Segment

Input (from M68230)

E Input

Output

1 1 ON

Example: Interfacing CC 7-Segment with M68230 (No Transistor)

M68230

(Common cathode)

To turn on the 7-segment, E must be set to 0, and the input to be turned on must be set to 1.

Example: Interfacing CC 7-Segment with M68230 (With Transistor)

M68230

R (Common cathode)To turn on the 7-segment,

E must be set to 1, and the input to be turned on

must be set to 1.By setting E to 1, the transistor is

turned ON, providing a path to GND.

Displaying Numbers: CC7S (No Transistor)

b c d e f g NumberaE

X X X X X X NoneX1

1 0 0 0 0 0 110

1 0 1 1 0 1 210

1 1 1 0 0 1 310

1 1 0 0 1 1 400

0 1 1 0 1 1 510

0 1 1 1 1 1 600

1 1 0 0 0 0 710

1 1 1 1 1 1 810

1 1 0 0 1 1 910

1 1 1 1 1 0 010

Displaying Numbers: CC7S (with Transistor)

X X X X X X NoneX0

1 0 0 0 0 0 111

1 0 1 1 0 1 211

1 1 1 0 0 1 311

1 1 0 0 1 1 401

0 1 1 0 1 1 511

0 1 1 1 1 1 601

1 1 0 0 0 0 711

1 1 1 1 1 1 811

1 1 0 0 1 1 911

1 1 1 1 1 0 011

Common Anode 7-Segment

E Input

Output

1 1 OFF

Input (to M68230)

Example: Interfacing CA 7-Segment with M68230

M68230

(Common anode)

To turn on the 7-segment, E must be set to 1, and the input to be turned on must be set to 0.

Displaying Numbers: CA7S (No Transistor)

X X X X X X NoneX0

0 1 1 1 1 1 001

0 1 0 0 1 0 101

0 0 0 1 1 0 301

0 0 1 1 0 0 411

1 0 0 1 0 0 501

1 0 0 0 0 0 611

0 0 1 1 1 1 701

0 0 0 0 0 0 801

0 0 1 1 0 0 901

0 0 0 0 0 1 101

Example 1

Example: Displaying ‘C’ on 7-Seg

M68230

R (Common cathode)

MOVE.B #$00,PGCRMOVE.B #$80,PBCRMOVE.B #$FF,PBDDR

ULANG MOVE.B #$B9,PBDRBRA ULANG

Displaying More Numbers/Characters

7-Segments can also be grouped together to display multiple numbers/characters.

Usually done using a technique called multiplexing.

Interfacing 2 7-Segments with M68230

M68230

(Common cathode)

Example 2

Example: Displaying on Multiple 7-Segs

Write a program to display ‘12’ on 2 7-Segment displays. The circuit diagram is shown.

Example: Displaying 12 on 2 7-Segments

M68230

(Common cathode)

Step 1: Init Ports

MOVE.B #$00,PGCR

MOVE.B #$80,PACR

MOVE.B #$80,PBCR

MOVE.B #$FF,PADDR

MOVE.B #$FF,PBDDR

Step 2: Activate E2, Send First Number

MOVE.B #$01,PADR * activate E2

MOVE.B #$5B,PBDR * display 2

BSR DELAY * delay for a while to * allow 7-seg to

* turn on.

M68230

(Common cathode)

E1 = 1 (off)

E2 = 0 (on)

Step 2: Activate E1, Send Second Number

MOVE.B #$06,PBDR * display 1

* turn on.

M68230

(Common cathode)

E1 = 0 (on)

E2 = 1 (off)

Step 3: Activate E2 Back, Send First Number Again

MOVE.B #$5B,PBDR * display 2

* turn on.

M68230

(Common cathode)

E1 = 0 (off)

E2 = 1 (on)

Discussion

Using multiplexing, only one digit may be turned on at one time.

But, if the delay is fast enough (<100ms), our eyes won’t be able to catch the change.

M68230

(Common cathode)

Complete Program

ORG $080C00

DELAY MOVE.L #50,D7DELLOOP SUB.L #1,D7

CMP.L #0,D7BNE DELLOOPRTS

START ORG $080D00

PGCR EQU $100001PADDR EQU $100005PBDDR EQU $100007PCDDR EQU $100009PADR EQU $100011PBDR EQU $100013PCDR EQU $100019PACR EQU $10000DPBCR EQU $10000F

INIT MOVE.B #$00,PGCRMOVE.B #$80,PACRMOVE.B #$80,PBCRMOVE.B #$03,PADDRMOVE.B #$7F,PBDDR

BEGIN MOVE.B #$01,PADRMOVE.B #$5B,PBDR BSR DELAY

MOVE.B #$02,PADRMOVE.B #$06,PBDR BSR DELAY

BRA BEGIN

END START

Example 2

Example: Displaying on 5 7-Segs.

A set of 7-segment displays are connected on Port A and Port B in M68230. Write a program to display the message ‘HELLO’ on the 7-segment display.

Circuit DiagramM68230

A0A1A2A3A4A5A6A7

B0B1B2B3B4B5B6B7

E0E1E2E3E4

Algorithm Turn on E4,

Display ‘H’. Delay for a while.

Turn on E3, Display ‘E’. Delay for a while.

Turn on E2, Display ‘L’. Delay for a while.

Turn on E1, Display ‘L’. Delay for a while.

Turn on E0, Display ‘O’. Delay for a while.

Do E4 again.

Character H

A = 0B = 1C = 1D = 0E = 1F = 1G = 1

MOVE.B #%01110110,PBDR

MOVE.B #$76,PBDR

Character E

A = 1B = 0C = 0D = 1E = 1F = 1G = 1

MOVE.B #$79,PBDR

Character L

A = 1B = 0C = 0D = 1E = 1F = 1G = 0

MOVE.B #$39,PBDR

Character H

A = 1B = 1C = 1D = 1E = 1F = 1G = 0

MOVE.B #$3F,PBDR

ProgramORG $080C00

DELAY MOVE.L #50,D7 * 80 MS DELAY

DELLOOP SUB.L #1,D7CMP.L #0,D7BNE DELLOOPRTS

START ORG $080D00

PGCR EQU $100001

PADDR EQU $100005PBDDR EQU $100007PADR EQU $100011PBDR EQU $100013PACR EQU $10000DPBCR EQU $10000F

INIT MOVE.B #$00,PGCRMOVE.B #$80,PACRMOVE.B #$80,PBCRMOVE.B #$FF,PADDRMOVE.B #$FF,PBDDR

HELLO MOVE.B #$0F,PADR * ACTIVATE E4MOVE.B #$76,PBDR * DISPLAY HBSR DELAY

MOVE.B #$17,PADR * ACTIVATE E3MOVE.B #$79,PBDR * DISPLAY EBSR DELAY

MOVE.B #$1B,PADR * ACTIVATE E2MOVE.B #$39,PBDR * DISPLAY LBSR DELAY

MOVE.B #$1D,PADR * ACTIVATE E1MOVE.B #$39,PBDR * DISPLAY LBSR DELAY

MOVE.B #$1E,PADR * ACTIVATE E0MOVE.B #$3F,PBDR * DISPLAY OBSR DELAY

BRA HELLO

END START

7-Segment + BCD Decoder

A BCD 7-Segment decoder can be used to simplify the interface to M68230.

Just send a BCD number, and it will be automatically displayed at 7-segment.

Also reduces the number of connections required to display 7-segment values.

Example: 7-Segment + BCD Decoder

M68230

(Common cathode)

BCD 7-Seg

Decoder

BCD Decoder I/O

B1 B0 NumberB2B3

0 1 100

Example 3

Displaying 12 on 7-Segments

A circuit is wired as in the next figure. Write a program that displays ‘12’ on the 7-Segment.

Example: 7-Segment + BCD Decoder

M68230

(Common cathode)

BCD 7-Seg

Decoder

Step 1: Init Ports

MOVE.B #$00,PGCR

MOVE.B #$80,PACR

MOVE.B #$80,PBCR

MOVE.B #$FF,PADDR

MOVE.B #$FF,PBDDR

Step 2: Activate E2, Send First Number

MOVE.B #$02,PADR * display 2

BSR DELAY * delay for a

* while to allow 7-seg * to turn on.

M68230

(Common cathode)

E1 = 1 (off)

E2 = 0 (on)

BCD 7-Seg

Decoder

Step 2: Activate E1, Send Second Number

BSR DELAY * delay for a while

* to allow 7-seg * to turn on.

M68230

(Common cathode)

E1 = 0 (on)

E2 = 1 (off)

BCD 7-Seg

Decoder

Step 4: Activate E2 Back, Send First Number Again

BSR DELAY * delay for a

* while to allow 7-seg * to turn on.

M68230

(Common cathode)

E1 = 1 (off)

E2 = 0 (on)

BCD 7-Seg

Decoder

Discussion

Using multiplexing, only one digit may be turned on at one time.

But, if the delay is fast enough (<100ms), our eyes won’t be able to catch the change.

M68230

(Common cathode)

BCD 7-Seg

Decoder

Complete ProgramORG $080C00

CMP.L #0,D7BNE

DELLOOPRTS

START ORG $080D00

PGCR EQU $100001

PADDR EQU $100005PBDDR EQU $100007PCDDR EQU $100009PADR EQU $100011PBDR EQU $100013PCDR EQU $100019PACR EQU $10000DPBCR EQU $10000F

INIT MOVE.B#$00,PGCR

MOVE.B#$80,PACR

MOVE.B#$80,PBCR

MOVE.B#$FF,PADDR

MOVE.B#$FF,PBDDR

BEGIN MOVE.B#$01,PADR

MOVE.B#$02,PBDR

BSR DELAYMOVE.B

#$02,PADRMOVE.B

#$01,PBDRBSR DELAYBRA BEGIN

END START

DC Motor

Controlling DC Motors

Has two terminals (positive/negative), connected to DC voltage.

If positive voltage applied at positive terminal, motor moves clockwise.

If negative voltage applied at positive terminal, motor moves anti-clockwise.

DC Motor+12V

+ with + = clockwise

+ with - = anti-clockwise

Interfacing DC Motor with M68230 – Single Direction

M68230

MOVE.B #$00,PGCRMOVE.B #$80,PACRMOVE.B #$FF,PADDRMOVE.B #$10,PADR

Interfacing DC Motor with M68230 (Two Directions)

PNP transistors are turned on by 0 at base.NPN transistors are turned on by 1 at base.

Moving the Motor Clockwise

MOVE.B #$00,PGCR

MOVE.B #$80,PACR

MOVE.B #$FF,PADDR

MOVE.B #%00001100,PADR(Turn on T1 and T3)

Interfacing DC Motor with M68230 (Clockwise)

Positive meets positive, clockwise direction

Moving the Motor Anti-clockwise

MOVE.B #$00,PGCR

MOVE.B #$80,PACR

MOVE.B #$FF,PADDR

MOVE.B #%00000011,PADR(Turn on T2 and T4)

Interfacing DC Motor with M68230 (Anti-clockwise)

Positive meets negative, anti-clockwise direction

Keypad

A set of switches. CPU determines what button pressed by

scanning each column in turn. Need to be de-bounced after each key

press:Done using de-bouncing subroutine.

Keypad

P0 P1 P2

Step 1: Initialization

Lets say Port A is connected to keypad.

MOVE.B #$00,PGCR

MOVE.B #$80,PACR

MOVE.B #$0F,PADDR

Step 2 – Scan 1st Column

P0=1 P1 P2

Step 2: Scan 1st ColumnCOL1 BCLR.B #1,PBDR

BCLR.B #2,PBDRBSET.B #0,PBDR

MOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS1CMP.B #$20,D1BEQ IS4CMP.B #$40,D1BEQ IS7CMP.B #$80,D1BEQ ISSTARBNE COL2

IS1 MOVE.B #1,D0BSR WAITMOVE.B #9,D3TRAP #0BRA COL1

ISSTAR MOVE.B #$00,D0BSR WAITMOVE.B #9,D3TRAP #0BRA COL1

* MOVE.B #9,D3 and TRAP #0 are used as an example to displaythe output to screen. Replace it with your own code.

Step 3 – Scan 2nd Column

P0 P1=1 P2

Step 3: Scan 2nd ColumnCOL2 BCLR.B #0,PBDR

BCLR.B #2,PBDRBSET.B #1,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS2CMP.B #$20,D1BEQ IS5CMP.B #$40,D1BEQ IS8CMP.B #$80,D1BEQ IS0BNE COL3

Step 4 – Scan 3rd Column

P0 P1 P2=1

Step 4: Scan 3rd ColumnCOL3 BCLR.B #0,PBDR

BCLR.B #1,PBDRBSET.B #2,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS3CMP.B #$20,D1BEQ IS6CMP.B #$40,D1BEQ IS9CMP.B #$80,D1BEQ ISHASHBNE COL1

ISHASH MOVE.B #0,D0BSR WAITMOVE.B #9,D3TRAP #0BRA COL1

Complete ProgramORG $080C00

DELAY MOVE.B #$1F,D4NEXTDEL SUB.B #1,D4

BNE NEXTDEL

WAIT MOVE.B PBDR,D2AND.B #$F0,D2CMP.B #$00,D2BNE WAITRTS

START ORG $080D00

PGCR EQU $100001PACR EQU $10000DPBCR EQU $10000FPADDR EQU $100005PBDDR EQU $100007PCDDR EQU $100009PADR EQU $100011PBDR EQU $100013PCDR EQU $100019

INIT MOVE.B #$00,PGCRMOVE.B #$80,PACRMOVE.B #$80,PBCRMOVE.B #$0F,PBDDRMOVE.B #$00,PBDR

COL1BCLR.B #1,PBDRBCLR.B #2,PBDRBSET.B #0,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS1CMP.B #$20,D1BEQ IS4CMP.B #$40,D1BEQ IS7CMP.B #$80,D1BEQ ISSTARBNE COL2

ISSTAR MOVE.B#$00,D0

BSRWAIT

MOVE.B#9,D3

TRAP#0

BRACOL1

ENDSTART

COL2BCLR.B #0,PBDRBCLR.B #2,PBDRBSET.B #1,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS2CMP.B #$20,D1BEQ IS5CMP.B #$40,D1BEQ IS8CMP.B #$80,D1BEQ IS0BNE COL3

Complete ProgramIS3 MOVE.B #3,D0

BSR WAITMOVE.B #9,D3TRAP #0BRA COL1

COL3BCLR.B #0,PBDRBCLR.B #1,PBDRBSET.B #2,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS3CMP.B #$20,D1BEQ IS6CMP.B #$40,D1BEQ IS9CMP.B #$80,D1BEQ ISHASHBNE COL1

Example

Example – 4 Pressed

P0 P1 P2

Step 2: Scan 1st ColumnCOL1 BCLR.B #1,PBDR

BCLR.B #2,PBDRBSET.B #0,PBDR

MOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS1CMP.B #$20,D1BEQ IS4CMP.B #$40,D1BEQ IS7CMP.B #$80,D1BEQ ISSTARBNE COL2

ISSTAR MOVE.B #$00,D0BSR WAITMOVE.B #9,D3TRAP #0BRA COL1

P0 P1 P2

Step 3: Scan 2nd ColumnCOL2 BCLR.B #0,PBDR

BCLR.B #2,PBDRBSET.B #1,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS2CMP.B #$20,D1BEQ IS5CMP.B #$40,D1BEQ IS8CMP.B #$80,D1BEQ IS0BNE COL3

P0 P1 P2

Step 4: Scan 3rd ColumnCOL3 BCLR.B #0,PBDR

BCLR.B #1,PBDRBSET.B #2,PBDRMOVE.B PBDR,D1AND.B #$F0,D1CMP.B #$10,D1BEQ IS3CMP.B #$20,D1BEQ IS6CMP.B #$40,D1BEQ IS9CMP.B #$80,D1BEQ ISHASHBNE COL1

Delay Subroutine

In some applications, we may need to delay the output before executing next instruction.

Can be achieved using delay subroutine: Does some meaningless repetitive task over and

over. “Wastes” processing time of M68k. Can be set to repeat until desired delay is achieved.

Delay Subroutine Example

DELAY MOVE.L #xxx,Dn

LOOP SUB.L #1,Dn

CMP.L #0,Dn

BNE LOOP

Calculating The Delay

To calculate delay, you need to know the time required to execute each instruction:

Instruction Clock Cycles to Complete Time (M68k @10MHz)

MOVE.L 12 0.0000012s

SUB.L 16 0.0000016s

CMP.L 14 0.0000014s

BNE 10 0.0000010s

RTS 16 0.0000016s

M68k @ 10MHz T = 1/10MHz = 1x10-7secs.

Calculating the Delay – M68k 10MHz

For 1 sec., 10,000,000 clock cycles are required.

10,000,000 = 12 + 16 + (16 + 14 + 10)n

10,000,000 = 28 + 40n

n = (10,000,000 – 28)/40

n = (10,000,000 – 28)/40 = 249,999

Delay Subroutine Example – 1s

DELAY MOVE.L #249999,D6

LOOP SUB.L #1,D6

CMP.L #0,D6

BNE LOOP

Calculating The Delay – 0.25s

To calculate delay, you need to know the time required to execute each instruction:

Instruction Clock Cycles to Complete Time (M68k @10MHz)

MOVE.L 12 0.0000012s

SUB.L 16 0.0000016s

CMP.L 14 0.0000014s

BNE 10 0.0000010s

RTS 16 0.0000016s

M68k @ 10MHz T = 1/10MHz = 1x10-7secs.

Calculating the Delay

For 0.25 sec., 2,500,000 clock cycles are required.

2,500,000 = 12 + 16 + (16 + 14 + 10)n

2,500,000 = 28 + 40n

n = (2,500,000 – 28)/40

n = (2,500,000 – 28)/40 = 62,499

Delay Subroutine Example – 0.25s

DELAY MOVE.L #62499,D6

LOOP SUB.L #1,D6

CMP.L #0,D6

BNE LOOP

Implementing Delay

START ORG $090000INIT MOVEA.L #$100001,A6 * base address of pi/t MOVE.B #$80,$E(A6) * configure port B control reg to mode 1x MOVE.B #$FF,$6(A6) * configure port B data reg to o/p

LOOP MOVE.B #$FF,$100013 BSR DELAYMOVE.B #$00,$100013 BSR DELAYBRA LOOP

CMP.L #0,D7BNE DELLOOPRTS

END START

Turn on all LEDs,Wait 1 second,Turn off all LEDs,Wait 1 second.

Conclusion

The M68230 is a parallel interface used by M68k to connect with various devices.

The M68230 has three ports, which can be configured to interface with many devices.

To use the ports, it MUST be initialized first.

Conclusion

The delay subroutine is used to “waste” the CPU’s time by telling it to do repetitive tasks.

The delay format is basically the same, just adjust the counter to get the delay you want.

The End

Please read:Antonakos, pg. 352-366M68230 DatasheetAblelogic, Abitec, VTES Manuals

I/O Interfacing ECE 511: Digital System & Microprocessor.

port initializationto

operation of port

port x data registercontains

port initialization

data registers

m68230 interfaces

m68230 interfacingmadmemorycs

decodinginterface m68230

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