Design and Implementation of VLSI Systems (EN1600) lecture06

S. Reda EN160 SP’08

Design and Implementation of VLSI Systems(EN1600)lecture06

Prof. Sherief RedaDivision of Engineering, Brown University

Spring 2008

[sources: Weste/Addison Wesley – Rabaey/Pearson]

S. Reda EN160 SP’08

Computer-Aided Design (CAD) Tools

• Early days were easy. The first IC-based microprocessor 4004 from Intel had only 2300 transistors (manufactured in 10 micron technology). Almost manual design.

• Current chips has well about 1B transistors. To get the chip to market fast, CAD tools are needed.

S. Reda EN160 SP’08

A simple tool chain

Layout and routing Cell library

simulation

IC layout/area

if SEL == “00“ then Y = A;elseif SEL == “01“ then Y = B;elseif SEL == “10“ then Y = C;else Y = D;end if;

AB

C

D2:1 MUX

2:1 MUX2:1 MUX

SEL == 00SEL == 01

SEL == 10

Y

Verification and timing/ power results

Hardware Description Languages

synthesis

specifications

schematic entry

S. Reda EN160 SP’08

Design Layout using Tanner L-Edit

S. Reda EN160 SP’08

How to implement the layout for an inverter?

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1. First setup technology

Use AMI 0.5μ submicron technology(λ=0.3μ)

S. Reda EN160 SP’08

Design rules are a bit different than bookactive polysilicon

contactsmetal

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Adjust design in terms of lambda

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N well creation

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Active region

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P-Select

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N-select

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Active well/substrate tapsHad to adjust well

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Select for taps

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Polysilicon

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Metal 1

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Contacts (to active)

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Contacts to poly

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Contacts to poly

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Piece of metal1 for input pin

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Via1 from metal1 to metal2

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Add little metal2 for output pin

S. Reda EN160 SP’08

Design Rule Checker (DRC) verifies that your layout does not violate any rules

ignore density warnings if they show up

error

S. Reda EN160 SP’08

Design cosmetics

Translate your design to the origin

S. Reda EN160 SP’08

Label your inverter pinsMake sure you are on the right layer

When you label pin, you can select a region (not just point)