A Novel 2.4 GHz CMOS Class-E Power Amplifier with Efficient Power Control for Wireless Communications R. Meshkin, A. Saberkari*, and M. Niaboli International.

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A Novel 2.4 GHz CMOS Class-E Power Amplifier with Efficient Power Control for Wireless Communications

R. Meshkin, A. Saberkari*, and M. Niaboli

International Conference on Electronics, Circuits and Systems

Athens, Greece

Dec. 2010

Department of Electrical Engineering

University of Guilan

Rasht, Iran

Outline

• Introduction

• Baseline Class-E Power Amplifier Topology

• Expressions and Relationships

• Conventional Power Control Techniques

• Design Procedure

• Circuit Characterization

• ConclusionIntroduction CharacterizeBaseline Top. 2Expressions Design Proc. ConclusionConv. Power

Introduction

3Conclusion

• Power Amplifier (PA)

The Last Building Block of a Transmitter Chain in Transceiver ICs

The Most Power Consuming Block in any RF Transmitter

Linear and Nonlinear PAs

• Linearity is in conflict with Efficiency.

•Constant Envelope Modulation Scheme => Nonlinear PAs

• Class-E PA => Better Choice in Terms of

Circuit Simplicity

High Efficiency

Good Performance at Higher Frequencies

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroduction

Baseline Class-E PA Topology

4

Classical Class-E Power Amplifier Topology

Soft Switching Properties:

0

0

ON

ON

DS t

DSt

V

dV

dt

Introduction Baseline Top. Expressions Conv. Power Design Proc. Characterize Conclusion

Expressions and Relationships

5

2

0.732

10.685

1.365

opt

Popt

ddopt

out

RL

CR

VR

P

Load Network Components Value:

Ropt = Optimum Load Resistance

Pout = Desired Output Power

ω = Resonant Frequency

Vdd = Supply Voltage

Efficiency:

out in

dc

P PPAE

P

out

dc

PDE

P

Pdc = Supply Power

Pout = Output Power

Pin = Input Power

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroduction

Conventional Power Control Techniques

6

• Power Control with Variable Supply Voltage

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Conventional Power Control Techniques

7

• Power Control with Parallel Amplification

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Conventional Power Control Techniques

8

• Power Control with Array of Switches with Different Sizes

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Design Procedure

9

Proposed Class-E Power Amplifier

• Two-Stage Configuration (Driver Stage and Power Stage)

• Cascode Transistor:

High Isolation from the Input to the Output

Protect Switching Transistors (Breakdown)

• Class-E Driver Stage => More Efficiency & Closer to Optimum Driving Signal

• Matching Network => As Much as Possible Power from Source to the Load

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Design Procedure

10 Proposed Structure for Output Power Control

• Output Power Control:

Changing the Size of the Switching Devices, And

Suitable External Shunt Capacitors Calculated for Each Steps of Output Power

• Small Size Controlling Switches => located in the Gate Terminal due to the Low Current of Gate

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Design Procedure

11

M1,M2Lf0.71 nH

M3,M4L11.39 nH

M3΄,M4΄L21.1 nH

M3΄΄,M4΄΄RL50 Ω

M3΄΄΄,M4΄΄΄Vbias10.2 V

M3΄΄΄΄,M4΄΄΄΄Vbias20.65 V

Cm12.3 pFVdd1.8 V

Lm11.55 nHCP52 fF

Cm210 pFCP΄890 fF

Lm20.6 nHCP΄΄953 fF

Cm32.8 pFCP΄΄΄990 fF

Lm31.28 nHCP΄΄΄΄1 pF

Cf5 pF

m0.18

m270

2430 m

0.18 m

1320 m

0.18 m

1110 m

0.18 m

990 m

0.18 m

930 m

0.18 m

Circuit Elements Value

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Design Procedure

12

Chip Layout

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

1381 µm*1234 µm

Circuit Characterization

13

Drain Current and Voltage Waveforms of Cascode Transistor M4

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Circuit Characterization

14

Output Power and PAE Versus Supply Voltage

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Circuit Characterization

15

Output Power and PAE as a Function of Frequency

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Circuit Characterization

16

Output spectrum

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Circuit Characterization

17

ControlWord

Output Power(dBm)

PAE(%)

1000021.0957

010002047.5

001001941

000101836

000011733

PAE Values for Each Output Power Step

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Circuit Characterization

18

ReferencesTechnology

(µm)Frequency

(GHz)Supply

(V)

Output Power(dBm)

PAE(%)

[1]CMOS 0.252.42.52448

[2]CMOS 0.131.72.53158

[3]CMOS 0.132.4725.838.8

[4]CMOS 0.182.43.319.227.8

This workCMOS 0.182.41.821.0957

Performances in Comparison with Previous Works

[4] S.A.Z, Murad, R.K. Pokharel, H. Kanaya and K. Yoshida, 2010.

[3] H. Fouad, A.H. Zekry and K. Fawzy, 2009.

[2] R. Brama, L. Larcher, A. Mazzanti and F. Svelto, 2007.

[1] V. R. Vathulya, T. Sowlati and D. Leenaerts, 2001.

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Circuit Characterization

19

ReferencesControl MethodDrop(%)

[1]Parallel Amplification22%

[2]Change Driver Stage Size15%

[3]Bias Regulation10%

This workProposed Technique14.5%

Comparison of PAE Drop in Different Output power Control Method

[3] C. Wei, L.Wei and H. Shizhen, 2009.

[1] A. Sirvani, D. K. Su, B. A. Wooley, 2002.

[2] M. M. Hella and M. Ismail, 2002.

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

Conclusion

20

• Reviewed Concepts of Classical Class-E Power

Amplifiers

• Presented Topological Modifications that Improve

PAE and Circuit Integration Capability

• Presented New Efficiently Output Power Control

Technique Based on the Array of Switches and

Capacitors

Baseline Top. Expressions Conv. Power Design Proc. Characterize ConclusionIntroductionIntroduction

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