17 Sep 2002Embedded Seminar2 Outline The Big Picture Who’s got the Power? What’s in the bag of tricks?
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17 Sep 2002 Embedded Seminar 2
Outline
The Big Picture
Who’s got the Power?
What’s in the bag of tricks?
17 Sep 2002 Embedded Seminar 3
The Big Picture
Phenomenal increase in processor speed
3GHz Pentium 4 by the end of the year
Shrinkage in sizeMobility highly desiredBUT battery technology not improving at the same rate
17 Sep 2002 Embedded Seminar 4
Batteries Not Included
Nickel-based batteriesNickel-Iron
The first rechargeable, old technology
Nickel-cadmium and Nickel-Metal-HydrideHigh energy density – good for motors
Lithium-based batteriesPromising because lithium releases electrons easilyProblem with battery life, dangerous to handle
OthersZinc-air batteries – can work a laptop for 10 hours
17 Sep 2002 Embedded Seminar 5
Some Terminologies
Power is the rate of energy consumptionPower ≠ energy
Energy depends on how long you run the thing!
Optimizing for speed = optimizing for energy?
Some researchers look at average power
17 Sep 2002 6
Back to Basics
P- substrate
N+ source N+ drain
Gate
Gate oxide insulator
N-Channel Metallic Oxide Semiconductor Field Effect Transistor
17 Sep 2002 7
Back to Basics – ACTION!
P- substrate
N+ source N+ drain
Gate
Gate oxide insulator
+
-
+-
N-Channel Metallic Oxide Semiconductor Field Effect Transistor
17 Sep 2002 Embedded Seminar 8
P-channel MOSFET
N-channel MOSFET
CMOS
VDD
GND
Input: 0 = 0V 1 = +5V
Output
CMOS Inverter
17 Sep 2002 Embedded Seminar 9
P-channel MOSFET
N-channel MOSFET
CMOS
VDD
GND
Input: 0 = 0V
Output = 0
CMOS Inverter
17 Sep 2002 Embedded Seminar 10
P-channel MOSFET
N-channel MOSFET
CMOS
VDD
GND
Input: 1 = +5V
Output = 1
CMOS Inverter
17 Sep 2002 Embedded Seminar 11
Power in CMOS
21
2 DD SC DD leak DD static DDP C V f N Q V f N I V I V
P = total power VDD = supply voltage f = clock
frequency
N = switching (gate transition per clock cycle)
Ileak = leakage power Istatic = static power
QSC = quantity of charge carried by short-circuit current per
transistion
17 Sep 2002 Embedded Seminar 12
Power in CMOS
21
2 DD SC DD leak DD static DDP C V f N Q V f N I V I V
Switching power Short-circuit power Leakagepower
Staticpower
Dynamic power Static power
17 Sep 2002 Embedded Seminar 13
Switching Power
Accounts for most (90%) of power
Two major factor is supply voltage and frequency
Voltage scaling
Frequency scaling
17 Sep 2002 Embedded Seminar 14
Short Circuit Power
During switching, there is a short period of time when both gates are ON a path from VDD to ground
power dissipation
17 Sep 2002 Embedded Seminar 15
Leakage Power
Diode leakageSource (and drain) together with substrate forms a diodeAt times, this diode can be reverse-biased during which current can leak
Sub-threshold leakageEven when gate is not completely on, enough of a channel can form for some movement of charges from source to drain
17 Sep 2002 Embedded Seminar 16
Static Power
Reduced voltage feedingBoth gates can be “weakly on”
Weak current flow from VDD to ground
Other parasitic current flowsDue to imperfect manufacturing or operating conditions
17 Sep 2002 Embedded Seminar 17
A Digression – The Problems Of Scaling down
Latch-up effect
Short-channel effect
Punch-through effect
Hot electron effectGate erosion
17 Sep 2002 Embedded Seminar 18
Latch-up Effect
17 Sep 2002 Embedded Seminar 19
Tricks in the bag
Voltage Scaling
Frequency Scaling
Power Gating
17 Sep 2002 Embedded Seminar 20
Voltage Scaling
Lower VDD
For the same circuit and technology, this leads to higher gate delay
Total delay, , is made up of two components, = 1 + 2
1 is a constant
2 VDD
17 Sep 2002 Embedded Seminar 21
Frequency Scaling
Widely used in many processorsIntel SpeedStep on mobile processors
Leads to lower performanceObvious!
17 Sep 2002 Embedded Seminar 22
Power Gating
Turn off power to parts of the circuit
Can be problematic for circuits with memory
17 Sep 2002 Embedded Seminar 23
What About Memory?
SRAMImplemented using CMOS
DRAMEntirely different technology
Implemented using capacitors
17 Sep 2002 Embedded Seminar 24
SRAM
CMOS SRAM Cell
DRAM
Single Transistor DRAM cell
17 Sep 2002 Embedded Seminar 26
Model or Measure?
Hardware measurementMeasures the amount of current consumed
Depends on how the circuit is designed
Cannot get core CPU power breakdowns
17 Sep 2002 Embedded Seminar 27
Software Estimation
SPICE simulationVery slow
PowerMill from Synopsys
CAD ToolsPart of a lot of CAD tool chains, eg. Synopsys
Architectural based simulationEg: SimplePower, WATTCH etc.
17 Sep 2002 Embedded Seminar 28
Putting it Together – System Power
Reference:Marc A. Viredaz and Deborah A. Wallach, “Power Evaluation of a Handheld Computer: A Case Study”. Compaq Western Research Lab Technical Report 2001/1. May 2001.http://research.compaq.com/wrl/techreports/abstracts/2001.1.html
17 Sep 2002 Embedded Seminar 29
Dealing with it
System / OSAlgorithmsArchitectureCircuit/LogicTechnology
17 Sep 2002 Embedded Seminar 30
Technology
Low threshold, low voltage
Various technological issues as discussed
17 Sep 2002 Embedded Seminar 31
Circuit/Logic
Even within CMOS, there are different types of logic families that consumes different amount of energyTransistor sizeLayoutAsynchronous circuits
Clocking consumes a lot of power
Pipeline retiming
17 Sep 2002 Embedded Seminar 32
Architecture / Compiler
Trade off area for power
17 Sep 2002 Embedded Seminar 33
Architecture / Compiler
Trade off area for powerShorter wires less power
Parallelism and concurrency
Directives to allow compiler to doVoltage scalingFrequency scalingPower gatingOne more degree of freedom: activity
17 Sep 2002 Embedded Seminar 34
Algorithms
Low power algorithms
Parallelism and concurrency
A under-research area
17 Sep 2002 Embedded Seminar 35
System / OS
System level power managementHeuristics for transiting between various power modes
Operating environment sensitive power management
Battery or plugged-in?
Power-domain specific management schemes
17 Sep 2002 Embedded Seminar 36
Reducing Processor Power
Energy conscious code generationReduce switching
Instruction scheduling
Use of Gray code instead of binary
Low power modesInstruction compressionParallelism and concurrency
17 Sep 2002 Embedded Seminar 37
Reducing Memory Power
Reduce memory accessesAll compiler techniques for reducing cache misses
Use registers
Memory reference compactionPower aware page allocation
Group active pages together
17 Sep 2002 Embedded Seminar 38
Reducing Peripheral Power
CommunicationDifferent power modes for communicating devicesData compressionAdaptation in view of traffic and power
DiskSpin-down and different power modes (when?)
Display
17 Sep 2002 Embedded Seminar 39
Summary
Some research opportunities still exist
Especially in algorithms and operating systems
An integrated approach is neededAll levels of the system cooperating with one another
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