8-1 Laboratory of Reliable Computing Transistor-Transistor Logic and BiCMOS Dr. T.Y. Chang NTHU EE 2007.12.11_13
Feb 18, 2016
8-1Laboratory of Reliable Computing
Transistor-Transistor Logic and BiCMOS
Dr. T.Y. ChangNTHU EE
2007.12.11_13
8-2Laboratory of Reliable Computing
Introduction Diode-Transistor Logic Basic TTL NAND gate Schottky TTL BiCMOSText Book: D.A. Neamen, Electronic Circuits An
alysis And Design, 2nd ed. Chapters 17.
8-3Laboratory of Reliable Computing
Parameters
8-4Laboratory of Reliable Computing
Diode-Transistor Logic
Logic-1=5VLogic-0=0.1V
8-5Laboratory of Reliable Computing
Example 17.8 @p1137 Find Is and Vs in DTL as shown in Fig.
17.20 with =25.
8-6Laboratory of Reliable Computing
Evolution
8-7Laboratory of Reliable Computing
Multi-Emitter Cross Section
8-8Laboratory of Reliable Computing
TTL Inputs
8-9Laboratory of Reliable Computing
TTLEx 17.9 Find Is, Vs, and Max. Fanout of Fig. 17.24. R=0.1, =25.
• If No Rc CalledOpen-Collector TTL (OC TTL)• Wired-AND:Connects outputs of OC TTLsand adds an Rc
8-10Laboratory of Reliable Computing
TTL with Totem-Pole Output
8-11Laboratory of Reliable Computing
TTL Layout
8-12Laboratory of Reliable Computing
Fanout
8-13Laboratory of Reliable Computing
Modified Totem-Pole TTL
8-14Laboratory of Reliable Computing
Tristate Output
=0 switch open=1 switch on
8-15Laboratory of Reliable Computing
Schottky BJT
8-16Laboratory of Reliable Computing
Schottky TTL
8-17Laboratory of Reliable Computing
Low-Power Schottky TTL
8-18Laboratory of Reliable Computing
Example 17.12 @p1154 Calculate power dissipation in Fig. 17.34 with =25, V=0.7V, VCE(sat)=0.4V.
8-19Laboratory of Reliable Computing
Advanced Schottky TTL
8-20Laboratory of Reliable Computing
BiCMOS CMOS
Low Power Slower
BJT Faster High Power
Core: CMOS, Interface: BJT
8-21Laboratory of Reliable Computing
Basic BiCMOS Inverter Totem-Pole Configuration (Q1-Q2) Turn-off time VOH=VDD - VBE(ON) VOL=VBE(ON)
01
8-22Laboratory of Reliable Computing
BiCMOS Inverters
=VBE(ON)
or= VDD VBE(ON)
=0V or= VDD
8-23Laboratory of Reliable Computing
BiCMOS Inverter I Reduce Turn-off time “bleeder resistors” R1 and R2 are added VOH=VDD - VBE(ON) VOL=VBE(ON)
8-24Laboratory of Reliable Computing
BiCMOS Inverter II Reduce Turn-off time VOH=VDD and VOL=0
8-25Laboratory of Reliable Computing
BiCMOS NAND2 Gate
8-26Laboratory of Reliable Computing
BiCMOS NOR
8-27Laboratory of Reliable Computing
Problem (Not HW) Implement E=AB+CD in two-level TTL gates. Implement a BiCMOS NAND gate.
8-28Laboratory of Reliable Computing
Solutions E=AB+CD =((AB)’ (CD)’)’