Timers

Copyright © 2012 Embedded Systems

Committee

Timer Module

Eman Aboelatta


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Atmega16Timer Modules:

8-bit Timer/Counters with Separate Prescalers and Compare Modes

TWO ONE

16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode


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The timer of the AVR can be monitor three Events:

Timer Overflow.

Compare Match.

Input Capture(in timer1)

Also, Timer use in PWM Generation.

Atmega32Timer Modules:


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A timer overflow means that the counter has counted up to its maximum

value and is reset to zero in the next timer clock cycle.

The resolution of the timer determines the maximum value of that timer.

The timer overflow event causes the Timer Overflow Flag (TOVx) to be set

in the Timer Interrupt Flag Register (TIFR).

There are two timers with 8-bit resolution and one timer with 16-bit

resolution on the ATmega16

Timer Overflow


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Compare Match

In cases where it is not sufficient to monitor a timer overflow.

the compare match interrupt can be used. The Output Compare Register (OCRx) can be loaded with a value [0..

MaxVal] which the timer will be checked against every timer cycle.

When the timer reaches the compare value, the corresponding Output Compare Flag (OCFx) in the TIFR register is set.

The Timer can be configured to clear the count register to “0” on a

compare match.


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Input Capture

The AVR has an input pin to trigger the input capture event.

A signal change at this pin causes the timer value to be read and saved in the Input Capture Register (ICRx).

At the same time the Input Capture Flag (ICFx) in the TIFR will be set.

This is useful to measure the width of external pulses.


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Timer / Counter0

Timer0 is an 8 bit timer/counter which can count from 0 to 0xFF.

In the timer mode this peripheral uses an internal clock signal.

in the counter mode an external signal on PORTB.0.

the timer can be operated either in the polling mode or in the interrupt

mode.


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Timer / Counter0 „cont

Used registers: • Timer registers:

TCCR0 (Timer/Counter 0 Control Register)

TCNT0 (Timer/Counter 0 Value)

• Interrupt registers: TIFR (Timer Interrupt Flag Register). TIMSK (Timer Interrupt Mask Register) SREG (I bit - General Interrupt Enable)


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Define module ON/OFF

Define module T/C

Prescaler



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TCNT0 (Timer / Counter 0 Register):

The initial value of the counter is set by writing it .

Output Compare Register –OCR0


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TIMSK (Timer / Counter Interrupt Mask)

TOIE0: Timer Overflow Interrupt Enable OCIE0: Output Compare Match Interrupt Enable


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TIFR (Timer / Counter Interrupt Flag Register)

TOV0: Timer/Counter0 Overflow Flag OCF0: Output Compare Flag 0


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Initializations example : // Timer/Counter 0 initialization with clock = oscillator / 1024 // Timer initial value is 0xf0;

TCCR0=0x05; TCNT0=0xf0;

// Timer/Counter 0 initialization // Clock source: T0 pin Rising Edge

TCCR0=0x07;


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Wave Generation Mode


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Timer / Counter0 „cont Clear Timer on Compare Match (CTC) Mode (WGM01:0 = 2): the OCR0 Register is used to manipulate the counter resolution. In CTC mode the counter is cleared to zero when the counter value (TCNT0) matches the OCR0.

Note To be able to generate an output from the PWM, the Output Compare Pin of Timer (OCn) is set up as output.


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Note

that the Data Direction Register (DDR) bit corresponding to the OC0 pin must be set in order to enable the output driver.


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The PWM is used to generate a pulse train with varying duty-cycle.

An analog filter can be used to shape the digital PWM output to obtain

an analog signal such as a sine wave. In the AVR, the timer/counters are used to generate PWM signals. To change the PWM base frequency, the timer clock frequency and top

counter value is changed. Faster clock and/or lower top value will increase the PWM base frequency, or timer overflow frequency.

PWM


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Fast PWM Mode

The fast Pulse Width Modulation or fast PWM mode (WGM01:0 = 3)

provides a high frequency.

PWM waveform generation option.

The fast PWM differs from the other PWM option by its single-slope

operation.

The counter counts from BOTTOM to MAX then restarts from

BOTTOM.


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8bit counter counting from 0-255 and the goes to 0 and so on.

We can store any value between 0-255 in OCR0,

say we store 64 in OCR0 then it would appear in the graph as follows

(the RED line).

TIMER0 for PWM generation


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TIMER0 for PWM generation When the TIMER0 is configured for fast PWM mode,

while up counting whenever the value of TIMER0 counter (TCNT0 register) matches

OCR0 register an output PIN is pulled low (0)

when counting sequence begin again from 0 it is SET again (pulled high=VCC).

This PIN is named OC0 and you can find it in the PIN configuration .

http://extremeelectronics.co.in/avr-tutorials/avr-timers-an-introduction/

http://extremeelectronics.co.in/avr-tutorials/avr-timers-an-introduction/


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TIMER0 for PWM generation


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TIMER0 for PWM generation In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC0 pin.

Setting the COM01:0 bits to 2 will produce a non-inverted PWM .

Inverted PWM output can be generated by setting the COM01:0 to 3.


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The phase correct PWM mode (WGM01:0 = 1) provides a high resolution phase correct PWM

waveform generation option. The phase correct PWM mode is based on a dual slope operation. The counter counts repeatedly from BOTTOM to MAX and then from

MAX to BOTTOM.

Phase Correct PWM mode


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The dual-slope operation has lower maximum operation frequency than single slope operation.

However, due to the symmetric feature of the dual-slope PWM modes,

these modes are preferred for motor control applications.



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The PWM resolution for the phase correct PWM mode is fixed to eight bits.

In phase correct PWM mode the counter is incremented until the

counter value matches MAX. When the counter reaches MAX, it changes the count direction.

The TCNT0 value will be equal to MAX for one timer clock cycle


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Note To be able to generate an output from the PWM, the Output Compare Pin

of Timer (OCn) is set up as output.


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Initializations example :

// Timer/Counter 0 initialization // Clock source: System Clock / 1024 // Mode: Non-Inverted Fast PWM TCCR0=0x6D; TCNT0=0x00; OCR0=0x00; TIMSK=0x02; OCR0 = x; // x is a variable which change the duty cycle.


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References

Atmega16 datasheet

http://www.avrfreaks.net/

http://www.avrfreaks.net/


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[email protected]

Timers

Technology

timer value

timer overflow timer

timer mode

timer registers

timer cycle

timer use

timer overflow interrupt

embedded systems committee