The Revolution from Transistor to Digital Electronics

The Revolution from Transistor to Digital Electronics

PROJECT SUBMITTED BY:-

SAUPARNA DATTASAUPARNA DATTASUBHAJIT BHATTACHARJEESUBHAJIT BHATTACHARJEE

Table of Contents………

Bipolar Junction Transistor.Field Effect Transistor.MOSFET.E-type MOSFET.D-type MOSFET.C-type MOSFET.Entering into Digital ElectronicsLogic Implementation.

History of transistors

In 1906, an American inventor and physicist, Lee De Forest, made

the vacuum tube triode or audion as he called it.

Used in radios Used in early computers

In 1947, John Bardeen and Walter Brattain deviced - the first "point contact" transistor.

Basic construction of Transistor

Transistor operation

force – voltage/currentwater flow – current - amplification

Field Effect Transistor

Field effect Transistor is a semiconductor device which depends for its operation on the control of current by an Electric Field.

Classification of Field Effect Transistors

7

7

Construction

Drain

Source

GATE

For a N Channel FET

an N type silicon Bar is

used

Heavily doped P type

material is deposited on either side of

the bar to form GATE

The two ends of the bar are

known as Source and

Drain

Fig 3. Construction of N Channel FET EC-302.31 t0 32

AEI302.31 TO 33

Fig3116_new.swf

9

9

Drain Characteristics 9 Drain characteristics show the relation between the

drain to source voltage and VDS and drain current ID

AB

Avalanche BreakdownID

VDS

- VGS

OHMIC Region Pinch Off

Region Breakdown Region

VGS= 0

AEI302.31 TO 33

MOSFET

How does a MOSFET work?

Structure: Device formed on lightly

doped p-type substrate. Source and drain are

heavily doped with n-type. Oxide layer separates gate

from Si surface. Result: N-P-N type, nMOS.

nMOS device in enhancement mode

Equilibrium energyband diagram

Operation: VGS > Vth

MOSFETThere are basically two types of MosfetEnhancement type Mosfet

Depletion type Mosfet

HELLO EVERY ONE LET’S HELLO EVERY ONE LET’S LEARN VLSI BASIC BUILDING LEARN VLSI BASIC BUILDING

BLOCK…BLOCK…

Fundamental of MOS Fundamental of MOS Theory and Theory and

CMOS TransistorsCMOS Transistors

CMOS Transistor

Gate

Source

Drain

Gate

Drain

Source

Complementary MOS P-channel MOS (pMOS) N-channel MOS (nMOS)

pMOS P-type source and drain

diffusions N substrate Mobility by holes

nMOS N-type source and drain

diffusions P substrate Mobility by electrons

pMOS

nMOS

CMOS Transmission Gate

Transmit signal from INPUT to OUTPUT when Gate is closed

Drain

Gate

INPUT

Gate (complementary of Gatecomplementary of Gate)

Gate

pMOS nMOS OUTPUT

0 OFF OFF ZZ1 ON ON INPUT

ZZ : High-Impedance State, consider the terminal is “floating”

CMOS Inverter

Connect the following terminals of a PMOS and an NMOS Gates Drains

Vdd

PMOSVin Vout

Ground

NMOS

Vdd

Gnd

Vout

Vin

Vin

Vin = HIGHVout = LOW (Gnd)

ONON

OFFOFF

Vdd

Gnd

Vout

Vin

Vin

Vin = LOWVout = HIGH (Vdd)

ONON

OFFOFF

PUN/PDN of a CMOS Inverter

A B0 11 Z

A B0 Z1 0

A B0 11 0

Pull-UpNetwork

Pull-DownNetwork

CombinedCMOSNetwork

A

Gnd

B

CMOS Inverter

PUN/PDN of a NAND Gate A B C

0 0 10 1 11 0 11 1 Z

A B C0 0 Z0 1 Z1 0 Z1 1 0

A B C0 0 10 1 11 0 11 1 0

Pull-UpNetwork

Pull-DownNetwork

CombinedCMOSNetwork

A

B

A B

C

Vdd

PUN/PDN of a NOR Gate

A B C0 0 10 1 Z1 0 Z1 1 Z

A B C0 0 Z0 1 01 0 01 1 0

Pull-UpNetwork

Pull-DownNetwork

CombinedCMOSNetwork

A

C

B

A B

Vdd

A B C0 0 10 1 01 0 01 1 0

PUN/PDN of a XOR GateVdd

A

B

A A

A

B

BB

C

A B C0 0 Z0 1 11 0 11 1 Z

A B C0 0 00 1 Z1 0 Z1 1 0

A B C0 0 00 1 11 0 11 1 0

Pull-UpNetwork

Pull-DownNetwork

CombinedCMOSNetwork

Function = XORXOR

A Systematic ApproachEach variable in the given Boolean eqn

corresponds to a PMOS transistor in PUN and an NMOS transistor in PDN

Draw PUNPUN using PMOS based on the Boolean eqn ANDAND operation drawn in seriesseries OROR operation drawn in parallelparallel

Invert each variablevariable of the Boolean eqn as the gate input for each PMOS in the PUN

Draw PDNPDN using NMOS in complementary form Parallel (PUN) to series (PDN) Series (PUN) to parallel (PDN)

Label with the same inputs of PUNLabel the output

Example

BCAF In series

In parallelVdd

(1) Draw the Pull-Up Network

Example

BCAF In series

In parallelVdd

(2) Assign the complemented input

A

C

B

Example

BCAF In series

In parallelVdd

(3) Draw the Pull-Down Network in the complementary form

A

C

B

A C

Example

BCAF In series

In parallelVdd

(3) Draw the Pull-Down Network in the complementary form

A

C

B

A C

B

Example

BCAF In series

In parallelVdd

Label the output F

A

C

B

A C

B

F

Example

BCAF In series

In parallelVdd

A

C

B

A C

B

FA B C F0 0 0 00 0 1 00 1 0 10 1 1 11 0 0 11 0 1 01 1 0 11 1 1 1

Truth Table

BIBLIOGRAPHY

Wikipedia.com

Google.com

Mahesh Naidu (B.E. in Electrical & Electronics, BITS-Pilani Hyderabad

Campus)