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Author: Terry Nelms, Mustaque Ahamad Publisher: ANCS 2010 Presenter: Li-Hsien, Hsu Data: 4/11/2012 1
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Packet Scheduling for Deep Packet Inspection on Multi-Core Architectures

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Packet Scheduling for Deep Packet Inspection on Multi-Core Architectures. Author : Terry Nelms, Mustaque Ahamad Publisher: ANCS 2010 Presenter: Li-Hsien, Hsu Data: 4/11/2012. packet scheduler. The ideal packet scheduler has the following properties: Load Balancing: - PowerPoint PPT Presentation
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Page 1: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Author: Terry Nelms, Mustaque AhamadPublisher: ANCS 2010Presenter: Li-Hsien, HsuData: 4/11/2012

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Page 2: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

packet scheduler The ideal packet scheduler has the following properties:

Load Balancing: Work is evenly distributed across all threads.

Low Scheduling Overhead: The cost of scheduling packets (in terms of memory and CPU cycles) is very small in comparison to the work performed on the packet.

Per-Flow Ordering: Packets on the same flow at egress are in their arrival order.

Cache Affinity: Packets are scheduled on threads that have their associated data

structures already in cache. Minimal Packet Delay Variation:

Minimal variation in the latency added to packets on the same flow.

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Page 3: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

packet scheduler The ideal packet scheduler has the following properties:

Load Balancing: Work is evenly distributed across all threads.

Low Scheduling Overhead: The cost of scheduling packets (in terms of memory and CPU cycles) is very small in comparison to the work performed on the packet.

Per-Flow Ordering: Packets on the same flow at egress are in their arrival order.

Cache Affinity: Packets are scheduled on threads that have their associated data

structures already in cache. Minimal Packet Delay Variation:

Minimal variation in the latency added to packets on the same flow.

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Page 4: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

DPI Packet schedulersDirect Hash (DH)(for comparison purpose)Packet Handoff (PH)(maximize load balancing)Last Flow Bundle (LFB)(maximize cache affinity)

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Page 5: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Direct Hash (DH)

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Flow identifier(FID) Hash function

: thread

(the source and destination IP

addresses)

(mod)

Page 6: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Direct Hash (DH)The advantages of DH is:

Cache Affinity:Packets on a flow are always processed by the same

thread.

The disadvantages of DH is: Load Imbalance

There is no control over how packets are distributed.

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Page 7: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Packet Handoff (PH)

7

Connection table

Connection entry

Connection entry

connection queue

Receive queue

1

0

: packe

t : thread

Page 8: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Packet Handoff (PH)The advantages of PH is:

Load Balancing:Threads pull packets from a queue (i.e. from the RQ) when they are not busy. If n threads are processing packets and there are at least n packets in the receive queue that map to different connection entries, no threads will be idle.

The disadvantages of PH is: Cache Affinity:

There is no mapping of packets that are part of the same flow to the same thread.

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Page 9: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Last Flow Bundle (LFB)

9

FBQ table

FBQ

FBQ

Receive queue

: packe

t : thread

flow bundle queue = FBQ

Flow identifier(FID)

Hash function

(the source and destination IP

addresses)

Page 10: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Last Flow Bundle (LFB)The advantages of LFB are:

Cache Affinity:Packets that map to the same FBQ and are in the system at the same time are processed by a single thread.

The disadvantages of LFB are: Increased Packet Delay Variation:

Packets on the same flow are intentionally processed together for improved efficiency. However, this causes packets in a packet train to jump ahead of older packets in the queue resulting in higher latency for those packets.

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Page 11: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Network Captures

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Page 12: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

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Page 13: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

Latency Results

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Page 14: Packet Scheduling for Deep Packet  Inspection on Multi-Core  Architectures

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