Noise reduction techniques

Designing Mixed Signal Systems with Noise Reduction Techniques in Mind

Javier Ortega

Bonnie BakerSenior Applications [email protected]

Special Thanks for Inputs fromRick Downs

Bill Klein

Reactive Design Troubleshooting

• Implement the Circuit on PCB

• Check the Performance

• Ship it !!!

PowerSupply SVS

PowerDistribution

SENSOR DSP/µCADCAMP

The Analog Signal Chain

VDD = 5V

ADS7829

LCL- 816G

+

-

VDD

+

-

R3

R3

RG

R4

R4

R1 R2

R1R2

VDD

to T

MS

320C

6713

DS

K

VDD

1/2 ofOPA2337

REF2925

A1

A2

A4

Two-op amp Instrumentation Amplifier

Wall Wart

9V DC out

uLM78

A52.5V

Reference

A6

DCLOCK

DOUT

CS/SHDN

Analog Section Schematic #1

Component Values

• Resistors around Instrumentation Amplifier– R1, R3 = 400 k– R2, R4 = 100 k– RG = 5.33k

• OPA2337 = Single Supply, CMOS, dual OPA

• ADS7829 = 12-bit, A/D SAR Converter

Analog Layout #1

Analog Layout #1

Sensor

Op AmpCircuit

ADC

Board #1 Bottom

Nu

mb

er o

f O

ccu

rren

ces

70

60

50

40

30

20

10

0

80

90

Output Code of 12-bit A/D Converter2960 2970 2980 2990

Code Width of Noise = 44

(total samples = 1024)

1st Pass Test Results

How many bits?

6.54-bits

Proactive Design Approach• Define Required Accuracy up Front

– Maximum weight – 2 lb (32 oz, 896 gm)– Resolution – 0.01 oz, 0.28 gm (~11.65-bits)– Accuracy – 0.02 oz, 1.4gm (~10.65-bits)

• Where Did all the Noise Come From?– Devices?– Emission or Radiation?– Poor PCB Layout?

• No More Revisions!!!!!!!

• Right the First Time

Where to Look - Overview

• Device Noise - Created by the devices

• Emitted Noise - Externally Injected

• Conducted Noise – In the Circuit Traces

Where to Look – Device Noise

• Passive Devices– Resistor – Capacitors – Inductors– Ferrite Beads

• Active Devices– Operational Amplifiers – A/D and D/A Converters– Voltage References– Voltage Regulators – Switching Power Supply DCLOCK

DOUT

VDD

CS/SHDN

Device Noise for our Circuit

• Device Noise - Created by the devices

– Resistors - Reduce Values were possible– Op amps - Use Lower-Noise Amplifiers

Resistors and OpAMP Noise

• Resistors– All Resistors Generate Noise– Resistor Noise Called Johnson or Thermal Noise

– Ideal Noise = VRN = 4KTR(BW) {Vrms}

Ideal 1 k 4 nV / Hz

Resistors and OpAMP Noise

• Amplifiers– OPA2337 Specification

6 VP-P (f = 0.1 Hz to 10 Hz)

– OPA2335 Specification1.4 VP-P (f = 0.01 Hz to 10 Hz)

nV/ Hz(log)

Frequency (log)

1 / f noise

BroadbandNoise

Resistors around Instrumentation Amplifier

R1, R3 = 400k 40 kR2, R4 = 100k 10 kRG = 5330 533

OPA2337OPA2335 6 VP-P 1.4 VP-P (f = 0.01 Hz to 10 Hz)

ADS7829 = 12-bit, A/D SAR Converter

Schematic #2 Device Changes

Radiated Noise: B-Field

• Sources (Transmitters)– On Board Transformers– Switching Regulators– External Noise

• Victims (Receivers)– Single-ended, High Impedance Inputs– Traces that a Form Circle

• Classic Example : Ground Loop• Signal Loop

– Long Traces (acts like an antenna)

Traces That Form a Loop

Ground

Signal Path

Incorrect Ground Connection

Radiated Noise: Long Traces

• Trace going into 10-bit or 12-bit ADC input is longer than a few inches

Emitted Noise

w(typ 0.003mm)

PCB Trace

d

L

PCBCross-Section

C = pFw • L • eo • er

d

w Ldeo

er

= thickness of PCB trace= length of PCB trace= distance between the two PCB traces= dielectric constant of air = 8.85 X 10-12 F/m= dielectric constant of substrate coating relative to air

PCB Capacitance : E-Field

I = C ampsdV

dt

• Decrease “L” or Increase “d”• Put Ground Guard Between Traces

PCB Coupling Noise Reduction

C = pFw • L • eo • er

d

Voltage IN PCB Trace

d

L

Guard Trace

CoupledCurrent

I = C (amps)dV

dt

VDD = 5V

ADS7829

LCL- 816G

+

-

VDD

+

-

R3

R3

RG

R4

R4

R1 R2

R1R2

VDD

VDD

1/2 ofOPA2335

REF2925

A1

A2

A4

Two-op amp Instrumentation Amplifier

Wall Wart

9V DC out

uLM78

A52.5V

Reference

A6

DCLOCK

DOUT

CS/SHDN

to T

MS

320C

6713

DS

K

Analog Section Schematic #2

Analog Layout #2

ADC

REF

OPA

Sensor

System #2 Changes

• Device issues– Reduced resistors by 10 X– Replaced amplifier with lower noise version, OPA2335

• Radiation issues– Extra Circuits Removed– Loops Removed– Eliminated digital to analog trace coupling– Traces shorter

Board #2 Test Results

Code Width of Noise = 6

(total samples = 1024)

Where to Look – Conducted Noise

• Conducted Noise is in the Circuit Traces– Ground and Power

• 50 Hz or 60 Hz• Ground and Supply Current Return Paths

– Signal Path• Digital Switching • Noise generated by previous device

• Solutions to Conducted Noise– Replace noisy devices– Reorient emitters– Use a Continuous Ground Plane– Filter Signal traces– Filter Supply traces

Discontinuous Ground Plane

• Example of an Interrupted Ground Plane on the Back Side of the Board

topbottom

Bypass Capacitor Types

• Filters Noise at High Frequency– Ceramic - Small Case size, Inexpensive, – Good Stability, Low Inductance

• C0G

• X7R

• Acts as a Charge Reservoir for Fast Changes– Tantalum Electrolytic - Small size, – Large Values, – Medium Inductance

ESR

ESL

C

Bypass Capacitors for Analog

• Assume: Supply = 5V ± 20 mV (all white noise)– To bring the noise to ± 1/4 LSB (± 0.61 mV)– PSR < - 30.3 dB

10

1

100

1k

10k

100k

1M

100 1k 10k 100k 1M 10MIm

ped

ance

(

)Frequency (Hz)

1nfCeramic

0.01fCeramic

0

-20

-40

-60

-80

1k 10k 100k 1M 10M

Frequency (Hz)

PS

R (

dB

)

Capacitor Response12-bit A/D Converter

0.1fCeramic

Low-Pass Filter Missing

ADC

C1

C2

R5

R6

TM

S32

0C67

13

OPA340

2nd orderLow-Pass Filter

R2

R1VIN

VOUT

C1

C2

Sallen-Key

Noise Reduction with Low-Pass Filter

0 dB

20 dB

40 dB

60 dB

80 dB10 Hz 1 kHz 10 MHz

2nd Order,10 Hz Filter

Sampling Frequency of A/D Converter

Noise Bandwidthof IA

74 dB

VDD = 5V

ADS7829LCL-

816G

+

-

VDD

+

- C1

C2R7

R8

+

-OPA340

A3

2nd orderLow-Pass Filter

R3

R3

RG

R4

R4

R1 R2

R1R2

VDD

to T

MS

320C

6713

DS

K

VDD

1/2 ofOPA2335

REF2925

A1

A2

A4

Two-op amp Instrumentation Amplifier

Wall Wart

9V DC out

uLM78

A52.5V

Reference

A6

Analog Section Schematic Final

Analog Layout Final

OPA ADC

Sensor

REF

System #3 Changes

• 2nd Order Analog Filter Added• Bypass capacitors included• Has a Ground Plane• Signal Path more Stream-lined• Length of traces further reduced

Code Width of Noise = 1

(total samples = 1024)

Board #3 Test Results

Noise in the Analog World

• The Noise will NEVER be Equal to Zero– Wise Layout Implementation– Devices Selection– Analysis of Environment

• Noise Reduction Rules of Thumb– Bypass all Components– Always use a Ground Plane– Current Return Path Evaluation

References

• A Baker’s Dozen: Real Analog Solutions for Digital Designers, by Bonnie Baker, Elsevier, 2005

• High-speed Digital Design: A Handbook of Black Magic, Howard Johnson and Martin Graham, Prentice Hall, 1993.

• Noise Reduction Techniques in Electronic Systems, Henry Ott, John Wiley, N.Y., 1998.

• The RF Capacitor Handbook, from American Technical Ceramics Inc.

• The Circuit Designer’s Companion, by Tim Williams

• Reference Data for Engineers, 7th edition Edward C. Jordan, Editor in chief

• Design Software

• FilterPro Active Filter Design Software, www.ti.com

• TINA , SPICE software, www.ti.com

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