New Lab Manual (ECA)

EC LAB MANUAL ECE DEPARTMENT

1 SPHOORTHY Engg.College.

SPHOORTHY ENGINEERING COLLEGENadargul (V), Saroornagar (M), R.R. (Dist.), A.P.

LABORATORY MANUAL

For

Electronic circuits(FOR II ECE-REGULATION –R07)

Department Of

ELECTRONICS & COMMUNICATION ENGINEERING

Academic Year: 2009-2010.



INDEX

Principal Head of the Department(Dr.SYED S BASHA, M.E., Ph.D.) (Mr.T.RAVICHANDRA BABU)

S.NO.SOFTWARE

NAME OF THE EXPERIMENTPAGE NO.

1. COMMON EMITTER AND COMMON SOURCE AMPLIFIER

3

2.TWO STAGE RC COUPLED AMPLIFIER

7

3. RC PHASE SHIFT OSCILLATOR USING TRANSISTORS

11

4. CLASS A POWER AMPLIFIER(TRANSFORMERLESS)

15

5. CLASS B COMPLEMENTARY SYMMETRY AMPLIFIER

18

6. HIGH FREQUENCY COMMON BASE(BJT) AND COMMON GATE (JFET)AMPLIFIER

21

.

S.NO.

HARDWARE NAME OF THE EXPERIMENT PAGE NO

7. COMMON EMITTER AND COMMON SOURCE AMPLIFIER

24

8.TWO STAGE RC COUPLED AMPLIFIER

30

9. RC PHASE SHIFT OSCILLATOR USING TRANSISTORS

36

10. SINGLE TUNED VOLTAGE AMPLIFIER 39

11 SERIES VOLTAGE REGULATOR 41

12SHUNT VOLTAGE REGULATOR

44



EXP . NO. 1

COMMON EMITTER AMPLIFIER AND COMMON SOURCE AMPLIFIER

COMMON EMITTER AMPLIFIER:

AIM

To design and simulate the frequency response of common emitter amplifier by using multisim software and calculate the band width.

SPECIFICATIONS

1. 1kΩ Resistor – 1 No.2. 33kΩ Resistor – 3 No.3. 3.3KΩ Resistor – 1 No4. 4.7kΩ Resistor – 1 No5. 470Ω Resistor – 1 No6. 10 μ F/ 25 V Electrolytic Capacitor – 2 No.7. 100 μ F/ 25 V Electrolytic Capacitor – 1 No.8. Transistors – BC107 –1No9. Function generator10. CRO11. Regulated power supply

APPARATUS

1. Multisim software2. Personal computer

CIRCUIT DIAGRAM

V1

14.14mVrms 100 Hz 0°

VCC12V

R1

1kΩ

R2470ΩR3

4.7kΩ

R433kΩ

R5

3.3kΩ

C1

10uF

C2100uF

C3

10uFQ1

BC107BP2

XSC1

A B

Ext Trig+

+

_

_ + _

1

0

3

7

VCC

4

5



THEORY

The CE amplifier provides high gain & wide frequency response. The emitter lead is common to both input and output circuits and is grounded. The emitter base circuit is forward biased. The collector current is controlled by the base current rather than emitter current. The input signal is applied to base terminal of the transistor and amplifier output is taken across collector terminal. A very small change in base current produces a much larger change in collector current.Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range.

PROCEDURE

1. Open multisim software to design the circuit.2. Select on new editor window and place the required component on the circuit window.3. Make the connections using wire and check the connections of power supply and oscillator.4. Go for simulation using run key and observe the output waveforms on oscillator.5. Indicate the node names and go for AC analysis with output node.6. Observe the AC analysis and draw the magnitude and phase response curves.7. Calculate the bandwidth of the amplifier.

Bandwidth f2-f1 Where f1 is Lower cutoff frequency f2 is Upper cutoff frequency

OBSERVATIONS

Maximum gain in dB =3dB gain =Lower cutoff frequency f1 =Upper cutoff frequency f2 =Bandwidth f2-f1 =



OUTPUT WAVE FORM

EXPECTED GRAPH



RESULT

Thus the frequency response of a common emitter amplifier is verified and band width is calculated .

VIVA QUESTIONS

1. What are the advantages and disadvantages of single-stage amplifiers?2. Why gain falls at HF and LF?3. Why the gain remains constant at MF?4. Explain the function of emitter bypass capacitor, Ce?5. How the band width will effect as more number of stages are cascaded?6. Define frequency response?7. What is the phase difference between input and output waveforms of a CE amplifier?8. What is early effect?



COMMON SOURCE AMPLIFIER

AIM

To design and simulate the frequency response of common source amplifier by using multisim software and calculate the band width.

SPECIFICATIONS

1. 1kΩ Resistor – 1 No.2. 1MΩ Resistor – 3 No.3. 10KΩ Resistor – 1 No.4. 4.7kΩ Resistor – 1 No.5. 10 μ F/ 25 V Electrolytic Capacitor – 2 No.6. 100 μ F/ 25 V Electrolytic Capacitor – 1 No.7. FET 2N4392 –1No.8. Function generator.9. CRO.10. Regulated power supply.

APPARATUS

1. Multisim software.2. Personal computer.

CIRCUIT DIAGRAM

V1

14.14mVrms 100 Hz 0°

VDD12V

Q1 2N4392C1

10uF

C2

10uF

C3100uF

R1

1kΩ

R31MΩ

R44.7kΩ

R510kΩ

2

VDD

5

3

4

XSC1

A B

Ext Trig+

+

_

_ + _1

6

0



THEORY

The FET is a type of transistor commonly used for weak signal amplification. The device can amplify analog or digital signals. It can also switch DC or function as an oscillator. In the FET current flows along a semiconductor path called the channel. At one end of the channel, there is an electrode called source. At the other end of the channel there is an electrode called the drain. Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases. At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies. At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range

PROCEDURE



OBSERVATIONS




OUTPUTWAVEFORM

EXPECTED GRAPH



RESULT

Thus the frequency response of a common source amplifier is verified and band width is calculated .

VIVA QUESTIONS

1. What is the difference between FET and BJT?2. FET is unipolar or bipolar?3. Draw the symbol of FET?4. What are the applications of FET?5. FET is voltage controlled or current controlled?



EXP . NO. 2TWO STAGE RC-COUPLED AMPLIFIER

AIM

To design and simulate the frequency response of a two stage RC-coupled amplifier and calculate its band width

SPECIFICATIONS

1. 2.2kΩ Resistor – 1 No.2. 150kΩ Resistor – 1No.3. 22kΩ Resistor – 1 No4. 10kΩ Resistor – 1 No5. 560Ω Resistor – 1 No6. 4.7kΩ Resistor – 3No.7. 47kΩ Resistor – 1 No.8. 33kΩ Resistor – 1 No9. 220Ω Resistor – 1 No10. 10 μ F/ 25 V Electrolytic Capacitor – 5 No.11. Transistors – BC107 – 2 No.12. CRO (Dual channel)13. Regulated power supply14. Function generator

APPARATUS


CIRCUIT DIAGRAM

V1

14.14mVrms 100 Hz 0°

VCC12V

C110uF

R1

2.2kΩ

R222kΩ

R3150kΩ R4

10kΩ R547kΩ

R64.7kΩ

R733kΩ

R8560Ω

R94.7kΩ

C2

10uF

C310uF

C4

10uF

C5

10uFQ1

BC107BP

Q2

BC107BP

R10220Ω

R114.7kΩ

XSC1

A B

Ext Trig+

+

_

_ + _

1

3

6

7

4

9

10

8

VCC

11

5

0

2



THEORY

As the gain provided by a single stage amplifier is usually not sufficient to drive the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage amplifiers output of one-stage is coupled to the input of the next stage. The coupling of one stage to another is done with the help of some coupling devices. If it is coupled by RC then the amplifier is called RC-coupled amplifier.

Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.

At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.

At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.

At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range.

PROCEDURE

1. Open multisim software to design the circuit.2. Select on new editor window and place the required component on the circuit window.3. Make the connections using wire and check the connections of power supply and

oscillator.4. Go for simulation using run key and observe the output waveforms on oscillator.5. Indicate the node names and go for AC analysis with output node.6. Observe the AC analysis and draw the magnitude and phase response curves.7. Calculate the bandwidth of the amplifier.


OBSERVATIONS




OUTPUTWAVEFORM

EXPECTED GRAPH

RESULT

Thus the frequency response of a two stage RC coupled amplifier is verified and band width is calculated .



VIVA QUESTIONS

1. What are the advantages and disadvantages of multi-stage amplifiers?2. Why gain falls at HF and LF?3. Why the gain remains constant at MF?4. Explain the function of emitter bypass capacitor, Ce?5. How the band width will effect as more number of stages are cascaded?6. Define frequency response?7. Give the formula for effective lower cut-off frequency, when N-number of stages are

cascaded.8. Explain the effect of coupling capacitors and inter-electrode capacitances on overall gain.9. By how many times effective upper cut-off frequency will be reduced, if three identical stages

are cascaded?10. Mention the applications of two-stage RC-coupled amplifiers.



EXP . NO. 3RC PHASE SHIFT OSCILLATOR

AIM

To design an RC phase shift oscillator and compare theoritical and practical frequency of oscillations.

SPECIFICATIONS

1. 10kΩ Resistor – 3No.2. 47kΩ Resistor – 1No.3. 2.2kΩ Resistor – 1 No4. 1kΩ Resistor – 1 No5. 100 μ F/ 25 V Electrolytic Capacitor – 1 No.6. 1nF/47nF Capacitors – 3 each.7. Transistors – BC107 – 1 No.8. CRO (Dual channel)9. Regulated power supply

APPARATUS


CIRCUIT DIAGRAM

XSC1

A B

Ext Trig+

+

_

_ + _

V1 12 V 0

Q1

BC107BP

R1

1kΩ

R210kΩ R3

10kΩ

R410kΩ

R547kΩ

R62.2kΩ

C1

1nF

C2

1nF

C3

1nF

C4100uF

2

4

35 6

0

1



THEORY

RC – phase shift oscillator has a CE amplifier followed by three sections of RC phase shift feedback networks. The output of the last stage is return to the input of the amplifier.the values of R and C are chosen such that the phase shift of each RC section is 600.thus,the RC ladder network produces a total phase shift of 1800 between its input and output voltage for the given frequencies.since CE amplifier produces 1800 phase shift the total phase shift from the base of the transistor around the circuit and back to the transistor will be exactly 3600 or 00.The frequency of oscillation is given byF = 1/2∏RC√6

PROCEDURE

1. Open multisim software to design the circuit.2. Select on new editor window and place the required component on the circuit window.3. Make the connections using wire and check the connections properly.4. Go for simulation key and observe waveform on CRO.5. Note the frequency of oscillation and compare theoretical and practical values of oscillations.

Theoritical Frequency ,FTH = 1/2∏RC√6

OBSERVATIONS

S.No RESISTOR(ohm) CAPACITOR(F) THEORETICALFREQUENCY(Hz)

PRACTICALFREQUENCY(Hz)

OUTPUTWAVEFORM

RESULT

Thus, design of RC phase shift oscillator is verified and frequencies are compared.



VIVA QUESTIONS

1. What are the conditions of oscillations?2. Give the formula for frequency of oscillations?3. What is the total phase shift produced by RC ladder network?4. What are the types of oscillators?5. What is the gain of RC phase shift oscillator?



EXP. NO. 4 CLASS-A POWER AMPLIFIER(TRANSFORMERLESS)

AIM

To design a class-A power amplifier and to calculate the bandwidth by using multisim software.

SPECIFICATIONS

1. 220Ω Resistor – No.2. 30kΩ Resistor – 1No.3. 100Ω Resistor – 1 No4. 50kΩ variable Resistor – 1 No5. 10 μ F/ 25 V Capacitor – 1 No..6. Transistors – BC107 – 1 No.7. CRO (Dual channel)8. Regulated power supply9. Function generator

APPARATUS


CIRCUIT DIAGRAM

V1 120mVpk 1kHz 0°

Q1

TIP31A

R1

220Ω

C1

10uF

R230kΩ

R350kΩKey=A

50%

2

3

VCC12V

R4100Ω

VCC

XSC1

A B

Ext Trig+

+

_

_ + _

0

5

1



THEORY

Power amplifiers are mainly used to deliver more power to the load. To deliver more power it requires large input signals, so generally power amplifiers are preceded by a series of voltage amplifiers. In class-A power amplifiers, Q-point is located in the middle of DC-load line. So output current flows for complete cycle of input signal. Under zero signal condition, maximum power dissipation occurs across the transistor. As the input signal amplitude increases power dissipation reduces.The maximum theoretical efficiency is 25%.

PROCEDURE



OBSERVATIONS


OUTPUTWAVEFORM



EXPECTEDGRAPH

RESULT

Thus the frequency response of a class A power amplifier is designed and band width is calculated .

VIVA QUESTIONS

1. Differentiate between voltage amplifier and power amplifier2. Why power amplifiers are considered as large signal amplifier?3. When does maximum power dissipation happen in this circuit ?.4. What is the maximum theoretical efficiency?5. Sketch wave form of output current with respective input signal.6. What are the different types of class-A power amplifiers available?7. What is the theoretical efficiency of the transformer coupled class-A power amplifier?8. What is difference in AC, DC load line?.9. How do you locate the Q-point ?10. What are the applications of class-A power amplifier?



EXP. NO. 5CLASS-B COMPLEMENTARY-SYMMETRY POWER AMPLIFIER

AIM

To design a complementary-symmetry class-B push-pull power amplifier in order to achieve maximum out put AC power and efficiency and calculate its bandwidth.

SPECIFICATIONS

1. 1kΩ Resistor – 1No.2. 220kΩ Resistor – 2No.3. 18kΩ Resistor – 2 No4. 1Ω Resistor – 2 No5. 470Ω Resistor – 1No.6. 10 μ F/ 25 V Capacitor – 2 No..7. Transistors – BD 237(npn) – 1 No.8. Transistors – BD 242C(pnp) – 1 No9. CRO (Dual channel)10. Regulated power supply11. Function generator

APPARATUS


CIRCUIT DIAGRAM

V1

12 V

V2

12 V

V3

14.5 Vpk 10kHz 0°

Q1

BD237

Q2

BD242C

R1

1Ω

R2

1Ω

1

2

R3470ΩR4

1kΩ

C1

10uF

C2

10uF

4

0

R5220kΩ

R6220kΩ

0

R718kΩ

R818kΩ

5

6

0

9 0

8

XSC1

A B

Ext Trig+

+

_

_ + _

70

3



THEORY

Power amplifiers are designed using different circuit configuration with the sole purpose of delivering maximum undistorted output power to load. Push-pull amplifiers operating either in class-B are class-AB are used in high power audio system with high efficiency.In complementary-symmetry class-B power amplifier two types of transistors, NPN and PNP are used. These transistors acts as emitter follower with both emitters connected together.

In class-B power amplifier Q-point is located either in cut-off region or in saturation region. So, that only 180o of the input signal is flowing in the output.

In complementary-symmetry power amplifier, during the positive half cycle of input signal NPN transistor conducts and during the negative half cycle PNP transistor conducts. Since, the two transistors are complement of each other and they are connected symmetrically so, the name complementary symmetry has come

Theoretically efficiency of complementary symmetry power amplifier is 78.5%.

PROCEDURE



OBSERVATIONS


OUTPUTWAVEFORM



EXPECTED GRAPH

RESULT

Thus the frequency response of a class B complementary symmetry power amplifier is designed and band width is calculated .

VIVA QUESTIONS

1. Differentiate between voltage amplifier and power amplifier?2. Explain impedance matching provided by transformer?3. Under what condition power dissipation is maximum for transistor in this circuit?4. What is the maximum theoretical efficiency?5. Sketch current waveform in each transistor with respective input signal?6. How do you test matched transistors required for this circuit with DMM?.7. What is the theoretical efficiency of the complementary stage amplifier.8. How do you measure DC and AC out put of this amplifier?9. Is this amplifier working in class A or B. ?10. How can you reduce cross over distortion?



EXP . NO. 6

HIGH FREQUENCY COMMON BASE(BJT) AND COMMON GATE(JFET)AMPLIFIER

COMMON BASE AMPLIFIER

AIM

To design and simulate the frequency response of common base amplifier by using multisim software and note down the maximum gain.

SPECIFICATIONS

1. 1kΩ Resistor – 2 No.2. 10kΩ Resistor – 2 No.3. 5KΩ Resistor – 1 No4. 10 μ F/ 25 V Electrolytic Capacitor – 3 No.5. Transistors – BC107BP –1No6. Function generator7. CRO8. Regulated power supply

APPARATUS


CIRCUIT DIAGRAM

XSC1

A B

Ext Trig+

+

_

_ + _

V110 V

V210 V

V3

50mVpk 100 Hz 0°

R1

1kΩ

R210kΩ R3

5kΩ

R4100kΩ

R51kΩ

Q1BC107BP

C1

10uF

C210uF

C3

10uF1

2

5

6

4

3

7

8

0



THEORY

In common base amplifier the base lead is common to both input and output circuits and is grounded. The base emitter circuit is forward biased. The input signal is applied to emitter terminal of the transistor and amplifier output is taken across collector terminal.Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases..PROCEDURE



OBSERVATIONS

Maximum gain in dB =

OUTPUTWAVEFORM



EXPECTED GRAPH

RESULT

Thus the frequency response of common base amplifier is verified and gain is analysed.

VIVA QUESTIONS

1. What are the advantages and disadvantages of common base amplifier?2. Why the gain remains constant at MF?3. Define frequency response?4. What is the phase difference between input and output waveforms of a CB amplifier?5. What are the applications of CB amplifier?



COMMON GATE AMPLIFIER

AIM

To design and simulate the frequency response of common gate amplifier by using multisim software and note down the maximum gain.

SPECIFICATIONS

1. 4.7kΩ Resistor – 2 No.2. 5kΩ Resistor – 1 No.3. 2.2kΩ Resistor – 1 No4. 10 μ F/ 25 V Electrolytic Capacitor – 3 No.5. FET(npn) – 2N4392 –1No6. Function generator7. CRO8. Regulated power supply

APPARATUS


CIRCUIT DIAGRAM

V1

50mVpk 100 Hz 0°

C1

10uF

C2

10uF

C310uF

R14.7kΩ

V25 V V3

5 V

R22.2kΩ

R34.7kΩ

R456kΩ

Q12N43922

34

5

6

XSC1

A B

Ext Trig+

+

_

_ + _

7

1

0



THEORY

The FET is a type of transistor commonly used for weak signal amplification. The device can amplify analog or digital signals. It can also switch DC or function as an oscillator. In the FET current flows along a semiconductor path called the channel. At one end of the channel, there is an electrode called source. At the other end of the channel there is an electrode called the drain. Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.

PROCEDURE



OBSERVATIONS

Maximum gain in dB =

OUTPUTWAVEFORM



EXPECTED GRAPH

RESULT

Thus the frequency response of common base amplifier is verified and gain is analysed.

VIVA QUESTIONS

1. What is the difference between FET and BJT?2. FET is unipolar or bipolar?3. Draw the symbol of FET?4. What are the applications of FET?5. FET is voltage controlled or current controlled?



EXP . NO. 7

COMMON EMITTER AMPLIFIER AND COMMON SOURCE AMPLIFIER

COMMON EMITTER AMPLIFIER

AIM

To study and plot the frequency response of common emitter amplifier and calculate the band width.

APPARATUS

1. 1kΩ Resistor – 1 No.2. 33kΩ Resistor – 3 No.3. 3.3KΩ Resistor – 1 No4. 4.7kΩ Resistor – 1 No5. 470Ω Resistor – 1 No6. 10 μ F/ 25 V Electrolytic Capacitor – 2 No.7. 100 μ F/ 25 V Electrolytic Capacitor – 1 No.8. Transistors – BC107 –1No9. Function generator10. CRO11. Regulated power supply

CIRCUIT DIAGRAM

V1

14.14mVrms 100 Hz 0°

VCC12V

R1

1kΩ

R2470ΩR3

4.7kΩ

R433kΩ

R5

3.3kΩ

C1

10uF

C2100uF

C3

10uFQ1

BC107BP2

XSC1

A B

Ext Trig+

+

_

_ + _

1

0

3

7

VCC

4

5



THEORY

The CE amplifier provides high gain & wide frequency response. The emitter lead is common to both input and output circuits and is grounded. The emitter base circuit is forward biased. The collector current is controlled by the base current rather than emitter current. The input signal is applied to base terminal of the transistor and amplifier output is taken across collector terminal. A very small change in base current produces a much larger change in collector current.Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range.

PROCEDURE

1. Connect the circuit as per the circuit diagram.2. By keeping the amplitude of the input signal constant at 40mv(p-p), vary the frequency from

100Hz to 1 MHz.3. Note down the amplitude of the output signal for corresponding values of input frequencies.4. Calculate the voltage gain in decibels.5. Plot in semi-log graph between gain vs frequency and calculate the band width.

OBSERVATIONS

S.NOFREQUENCY VOUT GAIN= VOUT /VIN

GAIN in dB= 20log(Vo/Vi)

CALCULATIONS

i. Determine lower cut-off frequency and upper cut-off frequency from the graph.ii. Calculate Band width.



EXPECTED GRAPH

RESULT

Thus, the frequency response of ce amplifier is obtained and Lower cut-off frequency = Upper cut-off frequency =Band width =



COMMON SOURCE AMPLIFIER

AIM

To study and plot the frequency response of common source amplifier and calculate the band width.

APPARATUS

1. 1kΩ Resistor – 1 No.2. 1MΩ Resistor – 3 No.3. 10KΩ Resistor – 1 No.4. 4.7kΩ Resistor – 1 No.5. 10 μ F/ 25 V Electrolytic Capacitor – 2 No.6. 100 μ F/ 25 V Electrolytic Capacitor – 1 No.7. FET 2N4392 –1No8. Function generator9. CRO10. Regulated power supply

CIRCUIT DIAGRAM

V1

14.14mVrms 100 Hz 0°

VDD12V

Q1 2N4392C1

10uF

C2

10uF

C3100uF

R1

1kΩ

R31MΩ

R44.7kΩ

R510kΩ

2

VDD

5

3

4

XSC1

A B

Ext Trig+

+

_

_ + _1

6

0



THEORY

The FET is a type of transistor commonly used for weak signal amplification. The device can amplify analog or digital signals. It can also switch DC or function as an oscillator. In the FET current flows along a semiconductor path called the channel. At one end of the channel, there is an electrode called source. At the other end of the channel there is an electrode called the drain. Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases. At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies. At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range

PROCEDURE

1. Connect the circuit as per the circuit diagram.2. By keeping the amplitude of the input signal constant at 40mv(p-p), vary the frequency from

100Hz to 1 MHz.3. Note down the amplitude of the output signal for corresponding values of input frequencies.4. Calculate the voltage gain in decibels.5. Plot in semi-log graph between gain vs frequency and calculate the band width.

OBSERVATIONS



CALCULATIONS

1. Determine lower cut-off frequency and upper cut-off frequency from the graph.2. Calculate Band width.



EXPECTED GRAPH

RESULT




EXP . NO. 8TWO STAGE RC-COUPLED AMPLIFIER

AIM

To study the frequency response of a two stage RC-coupled amplifier and calculation of gain and band width.

APPARATUS

1. 2.2kΩ Resistor – 1 No.2. 150kΩ Resistor – 1No.3. 22kΩ Resistor – 1 No4. 10kΩ Resistor – 1 No5. 560Ω Resistor – 1 No6. 4.7kΩ Resistor – 3No.7. 47kΩ Resistor – 1 No.8. 33kΩ Resistor – 1 No9. 220Ω Resistor – 1 No10. 10 μ F/ 25 V Electrolytic Capacitor – 5 No.11. Transistors – BC107 – 2 No.12. CRO (Dual channel)13. Regulated power supply14. Function generator

CIRCUIT DIAGRAM

V1

14.14mVrms 100 Hz 0°

VCC12V

C110uF

R1

2.2kΩ

R222kΩ

R3150kΩ R4

10kΩ R547kΩ

R64.7kΩ

R733kΩ

R8560Ω

R94.7kΩ

C2

10uF

C310uF

C4

10uF

C5

10uFQ1

BC107BP

Q2

BC107BP

R10220Ω

R114.7kΩ

XSC1

A B

Ext T rig+

+

_

_ + _

1

3

6

7

4

9

10

8

VCC

11

5

0

2



THEORY

As the gain provided by a single stage amplifier is usually not sufficient to drive the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage amplifiers output of one-stage is coupled to the input of the next stage. The coupling of one stage to another is done with the help of some coupling devices. If it is coupled by RC then the amplifier is called RC-coupled amplifier.

Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.

At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.

At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.

At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range.

PROCEDURE

1. Connect the circuit as per the circuit diagram.2. By keeping the amplitude of the input signal constant, vary the frequency from zero to 1

MHz.3. Note down the amplitude of the output signal for corresponding values of input frequencies.4. Calculate the voltage gain in decibels.5. Plot in semi-log graph between gain vs frequency and calculate the band width.

OBSERVATIONS



CALCULATIONS

1. Determine lower cut-off frequency and upper cut-off frequency from the graph.2. Calculate Band width.



EXPECTED-GRAPH

RESULT




EXP . NO. 9RC PHASE SHIFT OSCILLATOR

AIM

To design an RC phase shift oscillator and compare theoritical and practical frequency of oscillations.

APPARATUS

1. 10kΩ Resistor – 3No.2. 47kΩ Resistor – 1No.3. 2.2kΩ Resistor – 1 No4. 1kΩ Resistor – 1 No5. 100 μ F/ 25 V Electrolytic Capacitor – 1 No.6. 1nF/47nF Capacitors – 3 each.7. Transistors – BC107 – 1 No.8. CRO (Dual channel)9. Regulated power supply

CIRCUIT DIAGRAM

XSC1

A B

Ext Trig+

+

_

_ + _

V1 12 V 0

Q1

BC107BP

R1

1kΩ

R210kΩ R3

10kΩ

R410kΩ

R547kΩ

R62.2kΩ

C1

1nF

C2

1nF

C3

1nF

C4100uF

2

4

35 6

0

1



THEORY

RC – phase shift oscillator has a CE amplifier followed by three sections of RC phase shift feedback networks. The output of the last stage is return to the input of the amplifier.the values of R and C are chosen such that the phase shift of each RC section is 600.thus,the RC ladder network produces a total phase shift of 1800 between its input and output voltage for the given frequencies.since CE amplifier produces 1800 phase shift the total phase shift from the base of the transistor around the circuit and back to the transistor will be exactly 3600 or 00.The frequency of oscillation is given byF = 1/2∏RC√6

PROCEDURE

1. Connect the circuit as per the circuit diagram.2. Observe the output signal and note down the output amplitude and time period.3. Calculate the frequency of oscillations theoretically and verify it practically.

Theoretical Frequency FTH = 1/2∏RC√6.

OBSERVATIONS

S.No RESISTOR(ohm) CAPACITOR(F) THEORETICALFREQUENCY(Hz)

PRACTICALFREQUENCY(Hz)

RESULT

Thus, theoretical and practical frequencies of RC phase shift oscillator are compared.



EXP. NO. 10TUNED VOLTAGE AMPLIFIER

AIM

To Obtain the Frequency Response of Single Tuned Voltage Amplifier.

APPARATUS

1.Trainer Kit FT 1812- 1 No2.CRO 20 MHz 1 No3.Function generator ! MHz 1 No.4.Connecting Wires

CIRCUIT DIAGRAM

V1

35.36mVrms 1.5kHz 0°

VCC12V

L1140mH

C1

100nF

C21uF

C3

10uF

C4100nF

R14.7kΩ

R210kΩ

R310kΩ

Q1

BC107BP1

2

VCC

4 XSC1

A B

Ext Trig+

+

_

_ + _

5

0

3

THEORY Single tuned Amplifier uses one parallel Tuned Circuit as a load in each stage with Tuned circuit s in all stages tuned the same frequency .Ass shown in the fig.Tuned circuit formed by L and C elements acts as collector load and resonates at frequency of operation.Resistors R1 R2 and Re along with Capacitor Ce provides self bias for the circuit.The function of resonant circuits are:

1. To provide correct load impedance to the amplifier.2. To reject unwanted harmonics.



3.To couple the power to loadThe resonant circuits in tuned power amplifier are called tank circuits.

PROCEDURE

1. Connect the circuit as shown in diagram.2. The input signal of 50mv(p-p) at 1kHz is applied from function generator and output

terminals are connected to CRO.3. Adjust the input frequency such that output voltage is a perfect since sinusoidal waveform at a

fixed frequency..4. Note down corresponding output voltages at different frequencies.5. Plot the waveforms of both input and output6. The frequency at which the voltage is max , should be compared with theoretical values.

Theoretical Resonant frequency F=1/2∏√LC

OBSERVATIONS



The value of Resonant frequency at which maximum gain occurred is _________.

CALCULATIONS

Theoretical value of resonant frequency =____________________

EXPECTED GRAPH



RESULT

Thus, the frequency response of tuned voltage amplifier is obtained and the maximum resonant frequency is _________.



EXP.NO. 11SERIES VOLTAGE REGULATOR

AIM

To design a transistorized series voltage regulator and study the regulation action for i. Different values of input voltages

ii. Different values of load resistors and also to find percentage regulation.

APPARATUS

1. Bread Board- 1 No. .2. Regulated power supply- (0-30)V -1 No.3. DVM (0-20)V - 1No4. 1kΩ Resistor - 1 No.5. Zener diode(BZ8V2) - 1 No6. Transistor ( SL100 ) - 1 No7. DRB. -1 No

CIRCUIT DIAGRAM

THEORY

Voltage regulator is a device designed to maintain the output voltage as nearly constant as possible. It monitors the output voltage and generates feed back that automatically increases are decreases the supply voltage to compensate for any changes in output voltage that might occur because of change in load are changes in load voltages.

In transistorized series voltage regulator the control element is a transistor which is in series with load. must be operated in reverse break down region, where it provides constant voltage irrespective of changes in applied voltages.The output voltage of the series voltage regulator is Vo = Vz – Vbe. Since, Vz is constant, any change in Vo must cause a change in Vbe in order to maintain the above equation. So, when Vo decreases Vbe increases, which causes the transistor to conduct



more and to produce more load current, this increase in load causes an increase in Vo and makes Vo as constant. Similarly, the regulation action happens when Vo increases.

PROCEDURE

1. Connect the circuit as shown in the circuit diagram.2. Apply the input voltage from power supply.3. For a specific value of load resistor, vary the input voltage from 10 to a maximum of 20 volts

and not the values of output voltage.4. Change the load resistor and repeat steps 2 and 3.5. Remove the load resistor and note down the voltage at no load.

6. Find percentage regulation.Percentage regulation = 100xV

VV

FL

FLNL

7. Plot the graph for load regulation and line regulation.

OBSERVATIONS

Load Regulation Line Regulation

CALCULATIONS

Percentage load regulation = 100xV

VV

FL

FLNL =

Percentage Line Regulation = (change in output ) / (change in input) X 100

Load resistance RL(kohm)

Output Voltage,V0(V)

Line Voltage,Vin(V)




GRAPH

RESULT

For RL = ----------------, Regulation range is____________For VL = ----------------, Regulation range is____________

VIVA QUESTIONS

1. Define voltage regulator.2. Give the advantages of series voltage regulator. .3. Explain the feed back mechanism in series voltage regulator.4. In series voltage regulator which is control element and explain its function.5. Define load and line regulation. What is ideal value ?.6. Which element determines output ripple ?7. What determines maximum load current allowed in this circuit ?8. Mention the applications of series voltage regulator.9. Define no load voltage and full load voltage.10. Explain the term percentage regulation.



EXP .NO. 12

SHUNT VOLTAGE REGULATOR

AIM

To design a transistorized shunt voltage regulator and observing the regulation action for1. Different values of input voltages2. Different values of load resistors and also to find percentage regulation.

APPARATUS

1. Bread Board - 1 No. .2. Regulated power supply- 0-30v - 1 No.3. DVM(0-20)V - 1No4. 1kΩ Resistor - 1 No.5. Zener diode – BZ8V2 - 1No.6. Transistor – SL100 – 1No.7. DRB -1No

CIRCUIT DIAGRAM



THEORY

A voltage regulator is a device or a combination of devices, design to maintain the output voltage of a power supply as nearly constant as possible even if there are changes in load or in input voltage. In shunt voltage regulator transistor Q1 acts as control element, which is in shunt with load voltage.The output voltage is given as Vo = Vz + VR1 = Vz + Vbe1 + Vbe2The regulation action of the circuit is explained below :

Since Vz is constant, any changes in output voltage reflects a propositional change in R1. If the output voltage decreases, voltage across R1 decreases which in turn decreases the base voltage of Q2. As a result the base current of Q1 decreases which allows the load voltage to rise and makes it constant the same regulation action follows even if the output voltage increases.

PROCEDURE

1. Connect the circuit as shown in the circuit diagram.2. Apply the input voltage from power supply.3. For a specific value of load resistor, vary the input voltage from zero to a maximum of 20

volts and note the values of output voltage.4. Change the load resistor and repeat steps 2 and 3.5. Remove the load resistor and note down the voltage at no load.6. Find percentage regulation.

7. Percentage regulation = 100xV

VV

FL

FLNL

8. Plot the graph for load regulation and line regulation.

OBSERVATIONS

Line Regulation Load Regulation

Line Voltage,Vin(V)




CALCULATIONS

Percentage regulation = 100xV

VV

FL

FLNL

Line Regulation = Change in Vo Change in Vi

GRAPH

RESULT

For RL = ----------------, Regulation range is____________For VL = ----------------, Regulation range is____________

VIVA QUESTIONS

1. Mention the differences between shunt and series voltage regulators.2. What is the function of Q1 and Q2 in the shunt regulator .circuit ?3. Define the line regulation. And load regulation.4. What is current through zener in this circuit ?5. When is dissipation maximum in this circuit ?6. In the circuit of shunt voltage regulator which element is considered control 7. element and explain its function.8. Can you do the experiment without Q2 ?.9. How can you increase current range of regulator ?10. If output is 1.4 v for input of 20v what was the wrongly connected ?11. Mention the applications of shunt voltage regulator.

Load resistance RL(kohm)




New Lab Manual (ECA)

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