MPC5744P Motor Controller Board User Manual · MPC5744P Motor Controller Board User Manual ... The MPC5744P Motor Controller Board is designed to drive up to two 3-phase BLDC / PMSM

MPC5744P Motor Controller BoardUser Manual

Devices Supported:MPC5744P

Document Number: MPC5744PMCBUM1.0

June 2015

2 Freescale Semiconductor

Bretislav Zuczek

Freescale Semiconductor

Roznov Czech System Center

About This BookThis document describes the design of the MPC5744P Controller Board, which is targeted for rapid development of motor control applications.

To locate any published updates for this document, refer to the world-wide web at: http://www.freescale.com/.

Revision History

DocumentationThe MPC5744P documentation is available at the web site, http://www.freescale.com. as follows:

• Reference manuals — MPC5744P modules in detail• Data sheets — information mainly on the device’s AC, DC, thermal characteristics and packages

pin-out• Product briefs — device overview• Application notes — address specific design issues

Table i. Revision History Table

Date Revision level Description Page

number(s)

June 2015 1.0 Initial release 50

MPC5744P Controller Board, 1.0

Freescale Semiconductor 3

http://www.freescale.com

http://www.freescale.com/coldfire/

MPC5744P Controller Board, 1.0


Chapter 1 Introduction1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41.2 MPC5744P Board Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51.3 Board Jumper Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71.4 Board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

Chapter 2 Interface Description2.1 Power Supply J6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.2 PCIE Interfaces J1, J200 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.3 CAN connector J8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .142.4 USB Connectivity J19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .142.5 Boot modes selection J2, J3 & J4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152.6 PWM monitoring Header’s J5 & J24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152.7 ADC Inputs & Header J15 & J20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

2.7.1 ADC signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .162.7.2 Jumper J11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182.7.3 Analog Header’s J15 & J20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

2.8 SPI Header J23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Chapter 3 Design Consideration3.1 MPC5744P Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .233.2 Clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .263.3 Power Supplies and Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .273.4 Analog Signal Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .283.5 Brake Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .283.6 CAN Bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .293.7 SENT Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Chapter 4 Electrical Characteristics

Chapter 5 Board Set-up Guide

Appendix A References

Appendix B Abbreviations

Appendix C MPC5744P Controller Board Schematic

Freescale Semiconductor 1


Introduction

Chapter 1 IntroductionThe MPC5744P Motor Controller Board is designed to drive up to two 3-phase BLDC / PMSM motors, enabling implemetation of motor control techniques:

• Sensorless:— Back-EMF signal sensing using an MCU ADC module— Back-EMF zero-cross signal monitoring

• Sensor based:— Hall sensor signal monitoring— Encoder sensor signal monitoring

The two on-board PCI-Express interfaces enable control of the BLDC / PMSM motor power stages.

The CAN and SENT communication interfaces connect the board to the other automotive network nodes.

The USB interface is targeted at FreeMASTER PC-based application control.

The Controller Board is assembled with MPC5744P in 257 MAPBGA package.

MPC5744P Motor Controller Board, Draft

Freescale Semiconductor 1-3

Introduction

1.1 FeaturesThe MPC5744P Controller Board features are as follows:

• MPC5744P microcontroller, 257 MAPBGA package (14 x 14 mm)• JTAG & NEXUS interface for MCU code download and debugging• System-basis chip MC33908 • Motor control interfaces:

— 2x PCI-Express• Connectivity interfaces:

— 1x CAN— 2x SENT + 2x SENT SPC— USB interface

• LEDs:— Power-on indicators— SBC safe mode indicator— 6x user free indicators

• Controls:— Reset button

• Pin headers for MCU peripheral access.• Power plug universal 2.1/2.5mm connector.


1-4 Freescale Semiconductor

Introduction

1.2 MPC5744P Board ArchitectureThe MPC5744P Controller Board contains the basic building blocks are depicted in (see Figure 1-1): The block colour differentiates a block function:

• Blue - MCU and application software download, and the debug interface• Green - Motor control related hardware• Red - Board power supply and connectivity• Violet - Application control

Figure 1-1. MPC5744P Controller Board Block Diagram

The board is supplied by VBAT voltage in the range of 8V to 18V. The MC33907 provides 5V to the Encoder / HALL interface. The MCU and on-board logic are supplied by MCU_3.3V. The MCU generates two independent PWM signals for each phase. The user can control the application using the I/O signals from PCI-Express interface, USB interface (RS232), CAN and SENT buses.

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Introduction

The JTAG, NEXUS interfaces are present on-board to enable the download and debugging of MCU code. For the on-board block location, see Figure 1-2.

Figure 1-2. MPC5744P Controller Board - Block Location

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Introduction

1.3 Board Jumper ConfigurationSee Table 1-1, Table 1-2 and Figure 1-3 for proper jumper configuration.

Table 1-1. MPC5744P Board Configuration

Jumper Selector Function Connections

J4 BOOT selectionBoot Mode Selection:- Single chip (default)- Serial Boot Loader

1-2 closed2-3 open

J2J3

ABS_1ABS_2

Alternate Boot Mode Selector 1 & 2:for detail description see

1-2 open3-4 open

J11 AMUX Analog signal from SBC 1-2 close

J12 SBC MODESBC MODE selection- DUBUG, (default)- NORMAL,

1-2 closed1-2 open

J13 IGNITION Emulation of the IGNITION signal for SBC open

J14 RESETSBC RESET signal for MCU- RESET enable, closed- RESET disable, open

closed

J25J27

PCI-Express interface selection

Serial communication - interface selector- M1_PCI-Express- M2_PCI-Express

1-2 closed2-3 closed

J26 SIN-WAVE signalinterface selection

Sinusoidal signal - interface selector- M1_PCI-Express- M2_PCI-Express

1-2 closed2-3 closed



Introduction

Figure 1-3. MPC5744P Controller Board Jumper Position and Default Setting



Introduction

1.4 Board LEDsThe Table 1-2 displays the on-board LEDs. For on-board LED locations, see Figure 1-2.

Table 1-2. On-board LEDs

LED Signal Name Description

D1 APP_LED_1 Application LED_1



D6 /FS0 MC33908 safe pin state (ON - SBC in safe mode)

D7 MCU_3.3V +3.3V MCU and peripheral power supply

D8 VCCA Analog power supply

D9 +5VDC +5V power supply

D10 VCAN CAN driver voltage regulator

D11 +1.2VDC +1.2V MCU core supply

D15 M1_PWM_A0 Phase A0 top switch signal (ON - High Level)

D17 M1_PWM_B0 Phase B0 bottom switch signal (ON - High Level)






Introduction



Interface Description

Chapter 2 Interface DescriptionThe following chapters summarize the on-board connectors and headers pin-outs, signal meanings and MCU pin assignments.

2.1 Power Supply J6The MPC5744P Controller Board can be supplied either by using the univesal 2.1/2.5 mm DC power plug J6 or the PCIE connector (J1, J200, pin# B31). see Table 1-1

The controller board provides MCU_3.3V for MCU and on-board logic, 5V for the exrenal interfaces and 5V for analog peripheral supply. Supply 1.2V for MCU core is derivated from MCU_3.3V. All supply voltages and its proper operation is monitored by LEDs (see Table 1-2).

The board is designed to operate in the voltage range from 8V to 18V. The board is protected against a reverse polarity supply voltage.

2.2 PCI-Express Interfaces J1, J200The PCIE Motor controll interface defines the interface between the MPC5744P Motor Controller Board and the BLDC / PMSM motor power stage.The list of PCI-Express signals is as follows:

• Control signals:— PWM phase A, B, C top and bottom switches control— Brake signal control— Power Factor Correction (PFC)

• Monitor signals— DC-bus voltage— DC-bus current— Phase A, B, C current— Zero-cross signals— Back-EMF phase A, B, C— Temperature monitoring

• Power Supply 12V• Serial line - a bidirectional communication line between the Controller Board and Power Stage

The Table 2-1defines the PCI-Express motor control interface pin-out and pin assignment to the MCU.




Table 2-1. PCI-E MC Interface Signal Description

J1 & J200 Interface Pin Signal Name J1 PCIE#1

MCU SignalJ200 PCIE#2MCU Signal Description Direction

A1 VDDA - - Positive Analog power supply Power out

A2 GND_A - - Analog power supply ground Analog GND

A3 I_A / BEMF_A ADC0/1_AN11 ADC2/3_AN0 Phase A current / Phase A BEMF signal Analog input

A4 I_B / BEMF_B ADC0/1_AN12 ADC2/3_AN1 Phase B current / Phase B BEMF signal Analog input

A5 I_C / BEMF_C ADC0/1_AN13 ADC1/3_AN5 Phase Ccurrent / Phase C BEMF signal Analog input

A6 ADC1/3_AN6 ADC0/1_AN12 Analog input

A7 ADC1_AN1 ADC1_AN1 Analog input

A8 RES_SIN ADC0_AN0 ADC2/3_AN2 Resolver SIN Analog input

A9 RES_COS ADC1_AN0 ADC1/3_AN4 Resolver COS Analog input

A10 RES_EXT_SIG SWG_OUT SWG_OUT Resolver excitation analog signal Analog outout

A11 GND_A Analog power supply ground Analog GND

A12 +5VDC Digital peripheral +5V power supply Power out

A13 GND Digital peripheral ground Digital GND

A14 PWM0 FLEXPWM0_A0 FLEXPWM1_A0 Phase A top switch control (H -> Turn OFF) Digital output

A15 PWM1 FLEXPWM0_B0 FLEXPWM1_B0 Phase A bottom switch control (H -> Turn ON) Digital output

A16 PWM2 FLEXPWM0_A1 FLEXPWM1_A1 Phase B top switch control (H -> Turn OFF) Digital output

A17 PWM3 FLEXPWM0_B1 FLEXPWM1_B1 Phase B bottom switch control (H -> Turn ON) Digital output

A18 PWM4 FLEXPWM0_A2 FLEXPWM1_A2 Phase C top switch control (H -> Turn OFF) Digital output

A19 PWM5 FLEXPWM0_B2 FLEXPWM1_B2 Phase C bottom switch control (H -> Turn ON) Digital output

A20 Mx_PWM_A3 FLEXPWM0_A3 FLEXPWM1_A3 Digital output

A21 Mx_PWM_B3 SIUL_GPIO[103] SIUL_GPIO[107] DC Link brake signal Digital output

A22 Mx_PWM_X0 FLEXPWM0_X0 FLEXPWM1_X0 Phase A auxiliary PWM / Phase A zero-cross signal Dig. bidirectional

A23 Mx_PWM_X1 FLEXPWM0_X1 FLEXPWM1_X1 Phase B auxiliary PWM / Phase B zero-cross signal Dig. bidirectional

A24 Mx_PWM_X2 FLEXPWM0_X2 FLEXPWM1_X2 Phase C auxiliary PWM / Phase C zero-cross signal Dig. bidirectional

A25 Mx_PWM_X3 FLEXPWM0_X3 FLEXPWM1_X3 Dig. bidirectional

A26 Mx_FLT0 FLEXPWM0_FAULT0

FLEXPWM1_FAULT0

Over-current fault signal Digital input


FLEXPWM1_FAULT1

Over-voltage fault signal Digital input


FLEXPWM1_FAULT2


FLEXPWM1_FAULT3

A30 Mx_IO_6 SIUL_GPIO[133] SIUL_GPIO[134]

A31 Mx_SW_UP SIUL_GPIO[148] SIUL_GPIO[77] Application push button UP Digital input




A32 Mx_SW_DOWN SIUL_GPIO[92] SIUL_GPIO[42] Application push button DOWN Digital input

B1 VREF - - Positive analog reference voltage Power out

B2 GND_A - - Analog power supply ground Analog GND

B3 DCBI ADC0_AN1 ADC1/3_AN7 DC Link current signal Analog input

B4 DCBV ADC0/1_AN14 ADC1/3_AN6 DC Link voltage Analog input

B5 - ADC0_AN2 ADC0_AN2 -





B10 TEMP ADC0_AN8 ADC1/3_AN8 Temperature of the power stage

B11 GND_A - - Analog power supply ground Analog GND

B12 +3.3VDC +3.3V MCU power supply Power out

B13 GND Digital peripheral ground Digital GND

B14 ENCx_PHA ETIMER0_ETC0 ETIMER1_ETC0 Encoder A / HALL phase A / Phase Azero-cross signal

Digital input

B15 ENCx_PHB ETIMER0_ETC1 ETIMER1_ETC1 Encoder B / HALL phase B / Phase Bzero-cross signal

Digital input

B16 ENCx_INDEX ETIMER0_ETC2 ETIMER1_ETC2 Encoder C / HALL phase C / Phase Czero-cross signal

Digital input

B17 - ETIMER0_ETC3 ETIMER1_ETC3

B18 - ETIMER0_ETC4 ETIMER1_ETC4

B19 RES REF ETIMER0_ETC5 ETIMER1_ETC5 Resolver excitation digital signal Digital output

B20 Mx_SW_RUN SIUL_GPIO[12] SIUL_GPIO[15] Application switch RUN / STOP Digital input

B21 33937 SOUT DSPI[0]_SIN DSPI[0]_SIN SPI input data Digital input

B22 33937_SIN DSPI[0]_SOUT DSPI[0]_SOUT SPI output data Digital output

B23 33937 SCK DSPI[0]_SCK DSPI[0]_SCK SPI clock Digital output

B24 33937 CS DSPI[0]_CS1 DSPI[0]_CS2 SPI Chip-select Digital output

B25 - - - -

B26 USB TxD LIN[1]_RxD LIN[1]_RxD Isolated USB periph. TxD Digital input

B27 USB RxD LIN[1]_TxD LIN[1]_TxD Isolated USB periph. RxD Digital output

B28 33937 EN SIUL_GPIO[11] SIUL_GPIO[132] Device enable signal Digital output

B29 33937 RST SIUL_GPIO[10] SIUL_GPIO[49] Device RESET signal Digital output

B30 33937 INT REQ[12] REQ[13] Device Interrupt signal Digital input






2.3 CAN connector J8The system basis chip MC33908 provide CAN physical layer transceiver which is used as the CAN hardware interface. A Table 2-2 show the CAN connector pin-out and pin assignment to the MCU.

Table 2-2. CAN J8 Signal Description

2.4 USB Connectivity J19The USB line is used for board communication with the PC, when using e.g. the Freescale FreeMASTER tool [3] to control the user application. The interface uses a 5 pin mini USB B-type connector and it is isolated from the board environment. See Table 2-3 for the pin description and pin assignment to the MCU.

Table 2-3. J206 USB Signal Description

B31 +12V POWER - - Controller board power supply Power in

B32 GND_POWER Contrller board power ground Power GND

Interface Pin Signal Name MCU Signal Description Direction

1 CANH CAN[0]RX CAN[0]TX CAN bus H Diff. bidirectional

2 CANL CAN[0]RX CAN[0]TX CAN bus L Diff. bidirectional

3 +5VDC - Supply voltage -

4 GND - Ground -


1 VBUS - USB Power Supply -

2 D- LINFlex[0]RX LINFlex[0]TX Data – Dig. bidirectional

3 D+ LINFlex[0]RX LINFlex[0]TX Data + Dig. bidirectional

4 ID Not connected

5 GND_USB - USB Ground -






2.5 Boot modes selection J2, J3 & J4The MPC5744P supports the following boot modes:

• Single Chip (SC) mode—the microcontroller boots from the first bootable section of the flash memory main array.

• Serial Boot Loader (SBL) mode—the microcontroller downloads boot code from either theLINFlexD or FlexCAN interface and then executes it. Serial boot can be performed with or without autobaud.

Details see in Table 2-4.Table 2-4. J4, J3 & J2 Hardwarer configuration

2.6 PWM monitoring Header’s J5 & J24Monitoring the PWM signal is possible using J5 resp. J24. The Table 2-5 , Table 2-6 summarizes the header pin-out.

Table 2-5. J5 Motor 1 PWM Header Signal Description

FAB [J24] ABS2 [J3] ABS1 [J2] Description

1-2 closed - - Boot from internal Flash

1-2 open 1-2 closed 1-2 closed Serial boot from LINFlexD

1-2 open 1-2 closed 2-3 closed Serial boot from FlexCAN


1 M1_PWM_A0 FlexPWM0_A[0] Phase A top switch control Digital output

2 M1_PWM_B0 FlexPWM0_B[0] Phase A bottom switch control Digital output

3 M1_PWM_A1 FlexPWM0_A[1] Phase B top switch control Digital output

4 M1_PWM_B1 FlexPWM0_B[1] Phase B bottom switch control Digital output

5 M1_PWM_A2 FlexPWM0_A[2] Phase C top switch control Digital output

6 M1_PWM_B2 FlexPWM0_B[2] Phase C bottom switch control Digital output

7 M1_PWM_A3 FlexPWM0_A[3] Phase D top switch control Digital output

8 M1_PWM_B3 FlexPWM0_B[3] Phase D bottom switch control Digital output

9 CLKOUT

10 GPIO_15




Table 2-6. J24 Motor 2 PWM Header Signal Description

2.7 ADC Inputs & Header J15 & J20The MPC5744P device has four ADC instances: ADC_0, ADC_1, ADC_2, and ADC_3. All ADC modules are with 12-bit resolution with 0 ÷ Vref common mode conversion range (see Chapter 3.3, “Power Supplies and Voltage Reference"). ADC modules are supplied from the voltage reference.The MPC5744P (257 MAPBGA) ADC modules provide the following external inputs:

• Internally multiplexed channels 25 chanels— 9 channels on ADC_0— 4 channels on ADC_1— 4 channels shared between ADC_0 and ADC_1— 5 channels shared between ADC_1 and ADC_3— 3 channels shared between ADC_2 and ADC_3

2.7.1 ADC signal description


1 M2_PWM_A0 FlexPWM1_A[0] Phase A top switch control Digital output

2 M2_PWM_B0 FlexPWM1_B[0] Phase A bottom switch control Digital output

3 M2_PWM_A1 FlexPWM1_A[1] Phase B top switch control Digital output

4 M2_PWM_B1 FlexPWM1_B[1] Phase B bottom switch control Digital output

5 M2_PWM_A2 FlexPWM1_A[2] Phase C top switch control Digital output

6 M2_PWM_B2 FlexPWM1_B[2] Phase C bottom switch control Digital output

7 M2_PWM_A3 FlexPWM1_A[3] Phase D top switch control Digital output

8 M2_PWM_B3 FlexPWM1_B[3] Phase D bottom switch control Digital output

9

10

Table 2-7. ADC0 Signal Description

Interface Signal Name Channels Description Direction

MOTOR1 AN0_0 ADC0_AN0 POS_SIN_RESOLVER_1 Analog input

MOTOR1 AN0_1 ADC0_AN1 PCIE#1_DCBI Analog input

MOTOR1 AN0_2 ADC0_AN2 PCIE#1_Vsup_meas Analog input

MOTOR1 AN0_3 ADC0_AN3 M1_RES_GEN_POS_TST Analog input

Free for use AN0_4 ADC0_AN4 ANALOG HEADER #1 [J15] PIN_9 Analog input




Table 2-10. ADC2/ADC3 Signal Description

AMUX AN0_5 ADC0_AN5 SBC analog parameters meas. or free analog input Analog input



MOTOR1 AN0_8 ADC0_AN8 PCIE#1_TEMP Analog input

Table 2-8. ADC1 & ADC0/ADC1 Signal Description


MOTOR1 AN1_0 ADC1_AN0 POS_COS_RESOLVER_1 Analog input


MOTOR2 AN1_2 ADC1_AN2 PCIE#2_Vsup_meas Analog input

MOTOR1 AN1_3 ADC1_AN3 M1_RES_GEN_NEG_TST Analog input

MOTOR1 AN01_11 ADC01_AN11 PCIE#1 BEMFA voltage / PHASE_A current Analog input

MOTOR1 AN01_12 ADC01_AN12 PCIE#1 BEMFB voltage / PHASE_B current Analog input

MOTOR1 AN01_13 ADC01_AN13 PCIE#1 BEMFC voltage / PHASE_C current Analog input

MOTOR1 AN01_14 ADC01_AN14 PCIE#_1_DCBV Analog input

Table 2-9. ADC1/ADC3 Signal Description


MOTOR_2 AN13_4 ADC13_AN4 POS_COS_RESOLVER_2 Analog input

MOTOR_2 AN13_5 ADC13_AN5 PCIE#2 BEMFC voltage / PHASE_C current Analog input

MOTOR_2 AN13_6 ADC13_AN6 PCIE#2_DCBV Analog input

MOTOR_2 AN13_7 ADC13_AN7 PCIE#2_DCBI Analog input

MOTOR_2 AN13_8 ADC13_AN8 PCIE#2_TEMP Analog input

Motor Interface Signal Name MCU Signal Description Direction

MOTOR_2 AN23_0 ADC23_AN0 PCIE#2 BEMFA voltage / PHASE_A current Analog input

Table 2-7. ADC0 Signal Description





2.7.2 Jumper J11Header J11 is primarily dedicated to connect the external analog signal from MC33908 to ADC for measurement the internal analog parameters of the MC33908. The ouptut pararameters of the MC33908 are selectable thru the SPI. In any case Pin[1] of the J11 could be used as independent analog input. See a detailed description in Table 2-11.

Table 2-11. J204 Signal Description

Note: For MC33908 analog parameters measurement the J11 pins 1 & 2 must be shorted.

2.7.3 Analog Header’s J15 & J20Either of analog headers J15 & J20 could be used for connection of the external analog signals to the MCU or could be used as testpoint for measurement of the analog values from PCIE#1 and PCIE#2.

Detail description see in Table 2-12 & Table 2-13.

MOTOR_2 AN23_1 ADC23_AN1 PCIE#2 BEMFB voltage / PHASE_B current Analog input

MOTOR_2 AN23_2 ADC23_AN2 POS_SIN_RESOLVER_2 Analog input


1 AN0_5 ADC0_AN5 ADC0_AN5 Analog input with filter

2 AMUX - Analog output from SBC MC33908

3 TP5

Table 2-12. Analog Header J15 Description


1 HDR_AN0_0 ADC0_AN0 Analog digital converter module 0 channel 0 Analog input





6 HDR_AN01_11 ADC0/1_AN11 Analog digital converter module 0/1 channel 11 Analog input


Motor Interface Signal Name MCU Signal Description Direction










14 GND - Ground -






2.8 SPI Header J23SPI header J23 allows connect others SPI devices such as sensors, external EEPROM etc. or could be used as GPIO pin header. See Table 2-14.














12 - - - -


14 GND - Ground -

Table 2-14. SPI Header J23 Signal Description


1 HDR_DSPI3_CS0 DSPI[3]_CS0 Serial Peripheral Interface Chip Select 0 Digital output

2 HDR_DSPI3_SIN DSPI[3]_SIN Serial Peripheral Interface Input Digital input


4 HDR_DSPI3_SCK DSPI[3]_SCK Serial Peripheral Interface Clock Digital ouput


6 HDR_DSPI3_SOUT DSPI[3]_SOUT Serial Peripheral Interface Output Digital output


8 HDR_ET2_CH2/4 ETIMER2_ETC_2/4




9 HDR_ET1_CH5 ETIMER1_ETC_5

10 GND Ground –

Table 2-14. SPI Header J23 Signal Description







Design Consideration

Chapter 3 Design ConsiderationThis chapter provides additional information on the functional blocks of the MPC5744P Motor controller board.

3.1 MPC5744P FeaturesThe Qorivva MPC5744P microcontroller, a SafeAssure solution, is a 32-bit embedded controller designed for advanced driver assistance systems with RADAR, CMOS imaging, LIDAR and ultrasonic sensors, and multiple 3-phase motor control applications as in hybrid electric vehicles (HEV) in automotive and high temperature industrial applications.

The availability of up to three FlexPWM modules with a four 12bit Analog-to-Digital Converters (ADC) modules, and a Cross Triggering Unit (CTU) makes the MPC5744P microcontrollers suitable for 3-phase PMSM and BLDC motor control applications.

Table 3-1. MPC5744P device features (257 MAPBGA package)

FeatureDevice

MPC5744P

Process C55

CPU e200z4201n3 and e200z419 (cut 1)e200z4251n3 and e200z424 (cut 2)

Execution speed Up to 180MHz

Code Flash/ Data Flash 2.5 MB

RAM 384 KB

eTimer 3 modules, 6 channels

PIT 1 Module x 4 Channels

ADC 4 x 12-bit (25 external channels)

CTU 2 Modules

eDMA 32 channels in delayed lock-step

LINFlex 2 Modules

SPI (DSPI) 3 Modules

FlexRay 1 Module x 64 message buffers

SENT 2 Modules x 2 Channels

FlexCAN 3 Modules x 64 message buffers

FlexPWM 2 Modules x 4 Channels

Sine - wave generator 32 Point

Debug JTAG; NEXUS Class 3+; AURORA




The device block diagram is shown in Figure 3-1. A detailed description of the MCU can be found in the datasheet or reference manual.




Figure 3-1. Family Block Diagram




3.2 Clock sourceThe MPC5744P uses an external 40.00 MHz crystal oscillator mounted on the board and internal PLL0 to multiply the input frequency and achieve its 180 MHz maximum operating frequency. The second PLL1 is used to achieve suitable frequency for internal Motor control and communication modules. The MPC5744P can also use internal 16 MHz RC oscillator as a clock source. For detailed clock distribution architecture see Figure 3-2.

Figure 3-2. MPC5744P clock distribution

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3.3 Power Supplies and Voltage ReferenceThe MPC5744P Dual Motor Controller Board can be supplied from two different power supply inputs. The first one uses a 2.1/2.5 mm DC power plug and the second option is to use a one of the PCIE connectors. Which one is more suitable depends on the application type. The controller board provides a +5VDC voltage regulation for the SENT interface, MCU_3.3V for the MCU, MCU supporting logic and LED indicators, Vdda to supply external analog modules and Vref to provide the reference voltage for the ADC module. Power applied to the MPC5744P Controller Board is indicated by a power-on LEDs. The block diagram is shown in Figure 3-3.

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3.4 Analog Signal SensingThe analog input signals listed in Table 2-1, Table , and Table 2-10 are connected to the analog to digital converters through the RC filters. The time constant of RC filter is set with respect to the input signal bandwidth.

Figure 3-4. Analog Sensing Circuit example

3.5 Brake SignalThe brake signal output is used to control the DC-bus resistor switch. See Table 3-2 .

Table 3-2. UNI3 Brake Signals

Interface Pin Signal J600 UNI3_1 to

MCU SignalJ700 UNI3_1 to

MCU Signal Direction

A21 Mx_PWM_B3 SIUL_GPIO[103] SIUL_GPIO[107] Digital output

ANC_1

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3.6 CAN Bus interfaceThe FlexCAN module is a communication controller implementing the CAN protocol according to the CAN 2.0B protocol specification, which supports both standard and extended message frames. A number of Message Buffers (32) is also supported. Please refer to the MPC5744P reference manual for a detailed description. The Freescale system basis chip MC33908 with CAN physical layer is used as the CAN hardware interface.

3.7 SENT InterfacesThe Single Edge Nibble Transmission (SENT) Receiver (SRX) module is a multichannel receiver for receiving serial data frames which are being transmitted by a sensor implementing the SENT encoding scheme and present them to the CPU for further processing.This module is based on the SAE J2716. As per this standard, the SENT protocol is intended for use in applications where high resolution sensor data needs to be communicated from a sensor to an Engine Control Unit (ECU). It is intended as a replacement for the lower resolution methods of 10 bit A/Ds and PWM and as a simpler low-cost alternative to CAN or LIN. The implementation assumes that the sensor is a smart sensor containing a microprocessor or dedicated logic device (ASIC) to create the signal. Please refer to the MPC5744P reference manual for a detailed description.






Electrical Characteristics

Chapter 4 Electrical CharacteristicsThe electrical characteristics in Table 4-1 apply to an operation at 25 °C.

1—12V power supply, MCU without software

Table 4-1. Electrical Characteristics

Characteristic Symbol Min Typ Max Units

Power supply Voltage VDC 8 12 18 V

Current consumption(1) ICC 40 mA

Input Voltage Range VIN 0 – 5 V



Electrical Characteristics



Board Set-up Guide

Chapter 5 Board Set-up GuideThe board is designed to be supplied either by the PCIE#1 or PCIE#2 interface or by using the on-board J6 connector, with a power supply voltage from 8 to 18V. When using the board as a stand-alone EVB, connect the power supply to J6. In the case of board operation with the power stage, it is recommended to supply the board using the PCIE interface.

The MPC5744P PCIE Controller Board is designed for operation with up to two the Freescale MC33937A based 3-Phase low-voltage power stages, see Figure 5-1. The complete 3-phase PMSM / BLDC Development Kit can be ordered at http://www.freescale.com/AutoMCDevKits.

Figure 5-1. 3-Phase PMSM Sensor / Sensorless Development Kit



http://www.freescale.com/AutoMCDevKits


Board Set-up Guide



References

Appendix A References1. 3-phase Low-Voltage Power Stage, www.freescale.com/AutoMCDevKits2. MPC5744P Family Reference Manual, MPC5744PRM Rev. 1, 02/20133. FreeMASTER Run-time Debugging Tool, www.freescale.com/FREEMASTER


Freescale Semiconductor A-35



http://www.freescale.com/FREEMASTER

References


A-36 Freescale Semiconductor

Abbreviations

Appendix B AbbreviationsADC ......... Analog to Digital Converter

BEMF........ Back Electromotive Force

BLDC........ Brushless DC Motor

CAN .......... Controller Area Network

EVB .......... Evaluation Board

LIN............ Local Interconnect Network

MCU ......... Microcontroller Unit

PC.............. Personal Computer

PCI-E ........PCI Express

PMSM....... Permanent Magnet Sychronous Motor

PWM......... Pulse Width Modulation

SBC........... System Basis Chip

SENT ........ Single Edge Nibble Trasmission

SMPS ........ Switch Mode Power Supply

USB........... Universal Serial Bus


Freescale Semiconductor B-37

Abbreviations


B-38 Freescale Semiconductor

MPC5744P Controller Board Schematic

Appendix C MPC5744P Controller Board Schematic


Freescale Semiconductor C-39


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MOTOR INTERFACE #2

04

Table of Contents

MOTOR INTERFACE #1

02

BLOCK DIAGRAM

03

MCU MPC5744P ADC

0506

MCU MPC5744P

0708

MCU MPC5744P HEADERS

MCU MPC5744P PWR + GND

0910

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8735-8

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6501 W

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X 7

8735-8

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This

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rmation p

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hall

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6501 W

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X 7

8735-8

598

This

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rmation p

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hall

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6501 W

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This

docum

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rmation p

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hall

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ICA

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FIU

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PU

BI:

market

So

luti

on

s G

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up

SC

H-2

8531 P

DF

: S

PF

-28531

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MP

C5

74

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6501 W

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8735-8

598

This

docum

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rmation p

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hall

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ial &

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6501 W

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X 7

8735-8

598

This

docum

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rmation p

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and s

hall

not be u

sed for

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M1_P

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M1_P

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M1_IO

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M2_S

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M1_S

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N

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M2_IO

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MC

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DI

MC

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MS

MC

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CK

MC

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P

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EX

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L

BC

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TA

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NM

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NM

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MC

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MC

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MC

U_T

CK

MC

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MS

MC

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OM

P

MC

U_E

VT

I

MC

U_R

DY

MC

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1M

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2

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T

HD

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T1_C

H5

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UT

SW

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UT

M1_S

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M2_S

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RxD

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Dra

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Appro

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Au

tom

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du

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Mu

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6501 W

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X 7

8735-8

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This

docum

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ins info

rmation p

roprieta

ry to F

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and s

hall

not be u

sed for

engin

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esig

n,

pro

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ment or

manufa

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art

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Desig

ner:

Dra

wn b

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Appro

ved:

Au

tom

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ial &

Mu

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6501 W

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Austin, T

X 7

8735-8

598

This

docum

ent conta

ins info

rmation p

roprieta

ry to F

reescale

and s

hall

not be u

sed for

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n,

pro

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R212

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R36

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PP

C5744P

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1A

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M8

U2A

A0/G

PIO

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TIM

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TC

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SP

I2_S

CK

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Q0

P12

A1/G

PIO

1/E

TIM

ER

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TC

1/D

SP

I2_S

OU

T/R

EQ

1T

14

A2/G

PIO

2/E

TIM

ER

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TC

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LE

XP

WM

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3/M

C_R

GM

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BS

1/D

SP

I2_S

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EQ

2L14

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PIO

3/E

TIM

ER

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TC

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SP

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LE

XP

WM

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3/M

C_R

GM

_A

BS

2/R

EQ

3G

15

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PIO

4/E

TIM

ER

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TC

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SP

I2_C

S1/E

TIM

ER

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TC

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LE

XP

WM

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EQ

4/M

C_R

GM

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AB

D16

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PIO

5/D

SP

I1_C

S0/E

TIM

ER

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TC

5/D

SP

I0_C

S7/R

EQ

5H

4

A6/G

PIO

6/D

SP

I1_S

CK

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IME

R_2_E

TC

2/R

EQ

6D

1

A7/G

PIO

7/D

SP

I1_S

OU

T/E

TIM

ER

_2_E

TC

3/R

EQ

7G

4

A8/G

PIO

8/E

TIM

ER

_2_E

TC

4/D

SP

I1_S

IN/R

EQ

8H

1

A9/G

PIO

9/D

SP

I2_C

S1/E

TIM

ER

_2_E

TC

5/F

LE

XP

WM

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3/F

LE

XP

WM

_0_F

AU

LT

0A

4

A10/G

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10/D

SP

I2_C

S0/F

LE

XP

WM

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0/F

LE

XP

WM

_0_X

2/R

EQ

9B

11

A11/G

PIO

11/D

SP

I2_S

CK

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XP

WM

_0_A

0/F

LE

XP

WM

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2/R

EQ

10

D10

A12/G

PIO

12/D

SP

I2_S

OU

T/F

LE

XP

WM

_0_A

2/F

LE

XP

WM

_0_B

2/R

EQ

11

D7

A13/G

PIO

13/F

LE

XP

WM

_0_B

2/F

LE

XP

WM

_0_F

AU

LT

0/D

SP

I2_S

IN/R

EQ

12

C5

A14/G

PIO

14/C

AN

1_T

XD

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IME

R_1_E

TC

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EQ

13

A3

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15/E

TIM

ER

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TC

5/C

AN

0_R

XD

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XD

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Q14

D3

B0/G

PIO

16/C

AN

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XD

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IME

R_1_E

TC

2/S

SC

M_D

EB

UG

0/R

EQ

15

C16

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PIO

17/E

TIM

ER

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TC

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SC

M_D

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UG

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AN

0_R

XD

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N1_R

XD

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Q16

C14

B2/G

PIO

18/L

IN0_T

XD

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CM

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EB

UG

2/R

EQ

17

C12

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PIO

19/S

SC

M_D

EB

UG

3/L

IN0_R

XD

B12

B4/G

PIO

20/T

DO

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UX

G14

B5/G

PIO

21/T

DI

J17

B6/G

PIO

22/M

C_R

GM

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LK

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UT

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PI2

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S2/R

EQ

18

B5

C4/G

PIO

36/D

SP

I0_C

S0/F

LE

XP

WM

_0_X

1/S

SC

M_D

EB

UG

4/R

EQ

22

H3

C5/G

PIO

37/D

SP

I0_S

CK

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CM

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EB

UG

5/F

LE

XP

WM

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AU

LT

3/R

EQ

23

G3

C6/G

PIO

38/D

SP

I0_S

OU

T/F

LE

XP

WM

_0_B

1/S

SC

M_D

EB

UG

6/R

EQ

24

D4

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PIO

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LE

XP

WM

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SC

M_D

EB

UG

7/D

SP

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PIO

42/D

SP

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LE

XP

WM

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LE

XP

WM

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AU

LT

1B

14

C11/G

PIO

43/E

TIM

ER

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TC

4/D

SP

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S2

P16

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PIO

44/E

TIM

ER

_0_E

TC

5/D

SP

I2_C

S3/S

IPI_

TX

PM

14

C13/G

PIO

45/E

TIM

ER

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TC

1/F

LE

XP

WM

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0/C

TU

_0_E

XT

_IN

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XP

WM

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XT

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YN

CE

15

C14/G

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TIM

ER

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TC

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TU

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XT

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GR

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PI1

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LE

XP

WM

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0F

14

C15/G

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R_A

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N/E

TIM

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TC

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LE

XP

WM

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TU

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XT

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XP

WM

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YN

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XT

AL

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TIM

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LE

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1B

8

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PIO

49/E

TIM

ER

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TC

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TU

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XT

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GR

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XE

3

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PIO

50/E

TIM

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TC

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LE

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3/F

R_B

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4

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PIO

51/F

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X/E

TIM

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LE

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3A

5

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52/F

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TIM

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7

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SP

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SP

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SP

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SP

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TIM

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LE

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TIM

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TIM

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LE

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SP

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LE

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TIM

ER

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TC

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TIM

ER

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TC

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SP

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25

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TIM

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XP

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26

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SP

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27

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LE

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TIM

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28

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TIM

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30

D17

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TIM

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R

M1 P

WM

TE

ST

HE

AD

ER

M2 P

WM

TE

ST

HE

AD

ER

BO

OT

CO

NF

IG

J201 Default:

Across pin 1 & pin 2

J202 Default:


J200 Default:


Isola

tion B

arr

ier

1 -

22

- 3

BO

OT

MO

DE

UART

CAN

FAB

ABS2

ABS1

OPEN

OPEN

1 -

21

- 2

MODE

CLOS

E--

--SC

*SC Single Chip Mode

AP

PLIC

AT

ION

ST

AT

US

IN

DIC

AT

OR

S

FR

EE

MA

ST

ER

IN

TE

RF

AC

E

US

B_D

-

V+

D-

US

B_D

+D

+

AM

UX

GN

DG

NDM

CU

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3

GN

DA

MC

U_3V

3

GN

D

GN

DG

ND

MC

U_3V

3M

CU

_3V

3M

CU

_3V

3

VC

C_IO

VC

C_IO

VC

C_IO

GN

D

MC

U_3.3

V

GN

DB

GN

DG

ND

B

VC

C

VC

C

VC

C_IO G

ND

B

GN

DA

GN

D

MC

U_3V

3

MC

U_3V

3

GN

D

MC

U_3V

3

MC

U_3V

3

MC

U_3V

3

MC

U_3V

3

MC

U_3V

3

GN

D

HD

R_A

N23_1

HD

R_A

N23_2

/RE

SE

T

CLK

_O

UT

HD

R_A

N1_1

HD

R_A

N1_2

HD

R_A

N1_3

HD

R_A

N0_2

HD

R_A

N0_3

HD

R_A

N0_4

HD

R_A

N0_6

HD

R_C

TU

1_T

RG

HD

R_E

T2_C

H2/4

M2_P

WM

_A

3M

2_P

WM

_B

3

M1_P

WM

_A

3M

1_P

WM

_B

3

HD

R_A

N0_5

/RE

SE

T

MC

RG

M_F

AB

HD

R_D

SP

I3_S

IN

HD

R_D

SP

I3_S

OU

TH

DR

_D

SP

I3_S

CK

HD

R_D

SP

I3_C

S0

HD

R_D

SP

I3_C

S1

HD

R_D

SP

I3_C

S2

HD

R_D

SP

I3_C

S3

LIN

0_R

XD

MC

RG

M_A

BS

1M

CR

GM

_A

BS

2

M1_P

WM

_A

0M

1_P

WM

_A

1M

1_P

WM

_A

2

M1_P

WM

_B

0M

1_P

WM

_B

1M

1_P

WM

_B

2

M2_P

WM

_A

0M

2_P

WM

_A

1M

2_P

WM

_A

2

M2_P

WM

_B

0

M2_P

WM

_B

2M

2_P

WM

_B

1

LIN

0_T

XD

HD

R_E

T1_C

H5

HD

R_A

N0_1

HD

R_A

N0_0

HD

R_A

N0_5

HD

R_A

N0_7

HD

R_A

N0_8

HD

R_A

N01_11

HD

R_A

N01_12

HD

R_A

N01_13

HD

R_A

N01_14

HD

R_A

N1_0

HD

R_A

N13_4

HD

R_A

N13_5

HD

R_A

N13_6

HD

R_A

N13_7

HD

R_A

N13_8

HD

R_A

N23_0

AP

P_LE

D_2

AP

P_LE

D_3

AP

P_LE

D_4

AP

P_LE

D_5

AP

P_LE

D_6

AP

P_LE

D_1

HD

R_G

PIO

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HD

R_C

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Rev

Date

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heet

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ner:

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ved:

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X 7

8735-8

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This

docum

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rmation p

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and s

hall

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sed for

engin

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n,

pro

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ment or

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art

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SC

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:

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ner:

Dra

wn b

y:

Appro

ved:

Au

tom

oti

ve, In

du

str

ial &

Mu

lti-

6501 W

illia

m C

annon D

rive W

est

Austin, T

X 7

8735-8

598

This

docum

ent conta

ins info

rmation p

roprieta

ry to F

reescale

and s

hall

not be u

sed for

engin

eering d

esig

n,

pro

cure

ment or

manufa

ctu

re in w

hole

or

in p

art

without th

e e

xpre

ss w

ritten p

erm

issio

n o

f F

reescale

.

ICA

P C

lassific

ation:

FC

P:

FIU

O:

PU

BI:

market

So

luti

on

s G

ro

up

SC

H-2

8531 P

DF

: S

PF

-28531

A

MP

C5

74

4P

-CO

NT

RO

LE

R B

OA

RD

A3

Tuesday, June 2

3, 2015

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Rev

Date

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Page T

itle

:

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ner:

Dra

wn b

y:

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ved:

Au

tom

oti

ve, In

du

str

ial &

Mu

lti-

6501 W

illia

m C

annon D

rive W

est

Austin, T

X 7

8735-8

598

This

docum

ent conta

ins info

rmation p

roprieta

ry to F

reescale

and s

hall

not be u

sed for

engin

eering d

esig

n,

pro

cure

ment or

manufa

ctu

re in w

hole

or

in p

art

without th

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ICA

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FIU

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PU

BI:

market

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luti

on

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SC

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DF

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NT

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OA

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Tuesday, June 2

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D19

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D_Y

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W

AC

R203

4.7

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FT

R-1

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3-G

-D

12

34 6

5 78

910

11

12

13

14

R102

4.7

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L209

330O

HM

12

J4

HD

R1X

3

1 2 3

R205

4.7

0K

D3

LE

D_Y

ELLO

W

AC

U3C

SN

74LV

C04A

PW

E4

56

D20

LE

D_Y

ELLO

W

AC

J24

12

34 6

5 78

910

Q1

FD

G6301N

S1

1

G1

2

D2

3

D1

6

G2

5

S2

4

C56

0.1

UF

R211

120.0

R208

680

DN

P

U3F

SN

74LV

C04A

PW

E4

13

12

C253

4.7

uF

R105

680

R93

680

R109

24.0

R106

680

J23

12

34 6

5 78

910

C57

0.1

UF

R104

4.7

0K

C254

0.1

UF

U3E

SN

74LV

C04A

PW

E4

11

10

D17

LE

D_Y

ELLO

WAC

VBUS

D-D+

IDG

US

B_M

INI_

BJ19

1

2

3

4

S2

5

S1

S3

S4

R209

120.0

R70

4.7

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C244

0.1

UF

R207

4.7

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R100

680

SW

1

12

J2

HD

R1X

3

123

U3D

SN

74LV

C04A

PW

E4

98

R101

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C201

0.1

UF

TP

5

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D15

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D_Y

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W

AC

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3-G

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12

34 6

5 78

910

11

12

13

14

R210

4.7

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U5

AD

UM

1201

VDD11

VDD28

VIA

7

VIB

3

VO

A2

VO

B6

GND14

GND25

R206

4.7

0K

C252

0.1

UF

D1

LE

D_Y

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W

AC

VC

C

GN

DU3A

SN

74LV

C04A

PW

E4

12

14 7

J11

HD

R1X

3

123

D18

LE

D_Y

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W

AC

C256

0.1

UF

R110

24.0

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4.7

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R108

680

D2

LE

D_Y

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W

AC

U3B

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34

J3

HD

R1X

3

123

R103

680

FT

230X

U4

TX

D1

RT

S2

VCCIO3

RX

D4

GND15C

TS

6

CB

US

27

US

BD

P8

US

BD

M9

3V

3O

UT

10

RE

SE

T11

VCC12

GND213

CB

US

114

CB

US

015

CB

US

316

TP

1

J5

12

34 6

5 78

910




5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

Place caps as close to the corresponding VDD and VSS pin pair

VD

D_

PM

U

GN

DA

GN

D

GN

D

MC

U_

3V

3

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

MC

U_

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3

VD

D_

FL

A

MC

U_

3V

3

VD

D_

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MC

U_

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3

AD

C_

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F

MC

U_

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3

VD

D_

AD

V

VD

D_

CO

RE

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V2

VD

D_

PL

L

GN

DGN

DG

ND

GN

D

GN

DG

ND

VD

D_

CO

RE

_1

V2

GN

D

GN

DA

GN

DG

ND

MC

U_

3V

3

VD

D_

CO

RE

_1

V2

VD

D_

NE

XU

S

GN

D

VD

D_

CO

RE

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VD

D_

LF

AS

T

GN

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GN

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VD

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MP

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HV

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VD

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HV

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VD

D_

HV

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6

VD

D_

HV

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VD

D_

HV

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LV

_1

3G

12

VD

D_

LV

_1

4H

6

VD

D_

LV

_1

5H

12

VD

D_

LV

_1

6K

6

VD

D_

LV

_1

7K

12

VD

D_

LV

_1

8L

6

VD

D_

LV

_1

9L

12

VD

D_

LV

_2

0M

7

VD

D_

LV

_2

1M

8

VD

D_

LV

_2

2M

9

VD

D_

LV

_2

3M

10

VD

D_

LV

_2

4M

11

VD

D_

LV

_L

FA

ST

N1

6

VD

D_

LV

_N

EX

US

J1

6

C2

27

2.2

uF

C2

15

2.2

uF

C2

28

0.1

uF

C2

07

0.1

uF

C2

45

47

0P

F

EB

CQ

4B

CP

68

1

324

C2

18

2.2

uF

C2

48

0.1

uF

C2

05

2.2

uF

C2

26

0.0

1U

F

C2

21

0.1

uF

PP

C5

74

4P

FK

1A

MM

M8

U2

C

VS

S_

HV

_O

SC

0P

1

VS

S_

HV

_A

DV

0/1

U9

VS

S_

HV

_A

D0

_V

SS

E/V

SS

_H

V_

AD

RE

0/V

SS

_H

V_

AD

SW

0T

7

VS

S_

HV

_A

D1

_V

SS

E/V

SS

_H

V_

AD

RE

1/V

SS

_H

V_

AD

SW

1T

9

VS

S_

HV

_IO

_1

B1

VS

S_

HV

_IO

_2

H2

VS

S_

HV

_IO

_3

R1

5

VS

S_

HV

_IO

_4

B9

VS

S_

HV

_IO

_5

A1

VS

S_

HV

_IO

_6

A2

VS

S_

HV

_IO

_7

A1

6

VS

S_

HV

_IO

_8

A1

7

VS

S_

HV

_IO

_9

B1

7

VS

S_

HV

_IO

_1

0C

3

VS

S_

HV

_IO

_1

1C

15

VS

S_

HV

_IO

_1

2D

9

VS

S_

HV

_IO

_1

3N

2

VS

S_

HV

_IO

_1

4R

3

VS

S_

HV

_IO

_1

5T

1

VS

S_

HV

_IO

_1

6T

17

VS

S_

HV

_IO

_1

7U

1

VS

S_

HV

_IO

_1

8U

2

VS

S_

HV

_IO

_1

9U

16

VS

S_

HV

_IO

_2

0U

17

VS

S_

LV

_P

LL

N4

VS

S_

LV

_1

J7

VS

S_

LV

_2

G9

VS

S_

LV

_3

L7

VS

S_

LV

_4

L1

1

VS

S_

LV

_5

J1

1

VS

S_

LV

_6

H1

1

VS

S_

LV

_7

G8

VS

S_

LV

_8

G7

VS

S_

LV

_9

G1

0

VS

S_

LV

_1

0G

11

VS

S_

LV

_1

1H

7

VS

S_

LV

_1

2H

8

VS

S_

LV

_1

3H

9

VS

S_

LV

_1

4H

10

VS

S_

LV

_1

5J8

VS

S_

LV

_1

6J9

VS

S_

LV

_1

7J1

0

VS

S_

LV

_1

8K

7

VS

S_

LV

_1

9K

8

VS

S_

LV

_2

0K

9

VS

S_

LV

_2

1K

10

VS

S_

LV

_2

2K

11

VS

S_

LV

_2

3L

8

VS

S_

LV

_2

4L

9

VS

S_

LV

_2

5L

10

VS

S_

LV

_N

EX

US

K1

6

VS

S_

LV

_L

FA

ST

N1

7

C2

14

0.0

1U

F

C2

46

0.1

uF

C2

19

0.0

1U

F

C2

23

2.2

uF

C2

29

47

0P

F

L2

01

33

0O

HM

12

C2

39

47

0P

FC

24

94

70

PF

L2

07

33

0O

HM

12

C2

08

0.0

1U

F

C2

37

2.2

uF

R2

15

0

C2

34

47

0P

F

L2

03

33

0O

HM

12

C2

32

2.2

uF

C2

12

47

0P

F

C2

25

0.1

uF

C2

41

47

0P

F

L2

08

33

0O

HM

12

C2

40

0.1

uF

L2

02

33

0O

HM

12

C2

35

2.2

uF

C2

24

47

0P

F

C2

13

47

0P

F




5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

CLOSE

OPEN

SBC MODE J?

DEBUG

NORMAL

Div

ide

r o

utp

ut

vo

lta

ge

fo

r n

om

ina

l M

CU

_3

.3V

0.8

V +

/-1

%

Close to

D403

Preregulator

SNUBBER <2

1.6K;26.4K>

<45.9K;56.1K>

Vcca/Vaux volt. selection

Vcca [V]

Vaux [V]

R422[Ohm]

3.3

53.3

5

53.3

3.3

5

< 7K

<10.8K;13.2K>

SMPS Buck-Boost Fsw=440kHz

Close to

Vsup pins

MCU voltage 3.3V Fsw=2.4MHz

Close to

D401

Vcore

SNUBBER

Close to

Vpre pin

Close to

FB_Core pin

Recommended value [Ohm]

5.1K

12K (DEFAULT)

24K

51K

/FS

0

DE

BU

G

DE

BU

G

CA

N_

LO

CO

MP

_C

OR

E

/FS

0

SB

C_

RS

T

FB

_C

OR

E

CA

N_

HI

GN

D

+5

VD

C

VD

DA

33

90

7_

IO2

33

90

7_

IO3

GN

D_

A

AM

UX

_O

UT

33

90

7_

MO

SI

33

90

7_

MIS

O3

39

07

_S

CL

K3

39

07

_/C

S

33

90

7_

/IN

T

33

90

7_

/RS

T

CA

N_

TX

CA

N_

RX

MC

U_

3.3

V

+1

.2V

DC

PW

R_

BR

D_

SU

P VR

EF

GN

D_

PO

WE

R

+5

VD

C

GND

MC

U_

3.3

V

PG

ND

GN

D

GN

DG

ND

MC

U_

3.3

V

GN

D

PG

ND

Vp

re

Vp

re

Vca

n

GN

DG

ND

GN

DG

ND

_A

Vcca

VD

DA

Vsu

p

GND

Vcca

PG

ND

PG

ND

PG

ND

GN

D

MC

U_

3.3

V

PG

ND

GND GND

GN

DG

ND

GN

D

Vp

re

Vp

re

+1

.2V

DC

Vsu

p

VC

AN

GND

GN

D

PG

ND

PG

ND

PG

ND

Vsu

p

PG

ND

GN

D

GN

DG

ND

GN

D

GND

GN

D

VD

DA

GN

D_

A

Vco

re_

mo

n

Vco

re_

mo

n

Dra

win

g T

itle

:

Siz

eD

ocu

me

nt

Nu

mb

er

Re

v

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te:

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ee

to

f

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ge

Title

:

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sig

ne

r:

Dra

wn

by:

Ap

pro

ve

d:

Au

tom

oti

ve

, In

du

str

ial

& M

ult

i-

65

01

Will

iam

Ca

nn

on

Drive

We

st

Au

stin

, T

X 7

87

35

-85

98

Th

is d

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me

nt

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nta

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form

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rie

tary

to

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esca

le

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ot

be

use

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ee

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art

with

ou

t th

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ritt

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pe

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n o

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ree

sca

le.

ICA

P C

lassific

atio

n:

FC

P:

FIU

O:

PU

BI:

ma

rk

et

So

luti

on

s G

ro

up

SC

H-2

85

31

PD

F:

SP

F-2

85

31

A

MP

C5744P

-CO

NT

RO

LE

R B

OA

RD

A3

Th

urs

da

y,

Ju

ne

25

, 2

01

5

SB

C M

C3

39

08

B.

ZU

CZ

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P.

KO

NV

ICN

Y

B.

ZU

CZ

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91

0

X_

__

__

__

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raw

ing

Title

:

Siz

eD

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me

nt

Nu

mb

er

Re

v

Da

te:

Sh

ee

to

f

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ge

Title

:

De

sig

ne

r:

Dra

wn

by:

Ap

pro

ve

d:

Au

tom

oti

ve

, In

du

str

ial

& M

ult

i-

65

01

Will

iam

Ca

nn

on

Drive

We

st

Au

stin

, T

X 7

87

35

-85

98

Th

is d

ocu

me

nt

co

nta

ins in

form

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n p

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rie

tary

to

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be

use

d f

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pro

cu

rem

en

t o

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an

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ole

or

in p

art

with

ou

t th

e e

xp

ress w

ritt

en

pe

rmis

sio

n o

f F

ree

sca

le.

ICA

P C

lassific

atio

n:

FC

P:

FIU

O:

PU

BI:

ma

rk

et

So

luti

on

s G

ro

up

SC

H-2

85

31

PD

F:

SP

F-2

85

31

A

MP

C5744P

-CO

NT

RO

LE

R B

OA

RD

A3

Th

urs

da

y,

Ju

ne

25

, 2

01

5

SB

C M

C3

39

08

B.

ZU

CZ

EK

P.

KO

NV

ICN

Y

B.

ZU

CZ

EK

91

0

X_

__

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Title

:

Siz

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me

nt

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mb

er

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v

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te:

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ee

to

f

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ge

Title

:

De

sig

ne

r:

Dra

wn

by:

Ap

pro

ve

d:

Au

tom

oti

ve

, In

du

str

ial

& M

ult

i-

65

01

Will

iam

Ca

nn

on

Drive

We

st

Au

stin

, T

X 7

87

35

-85

98

Th

is d

ocu

me

nt

co

nta

ins in

form

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n p

rop

rie

tary

to

Fre

esca

le

an

d s

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ll n

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be

use

d f

or

en

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rin

g d

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n,

pro

cu

rem

en

t o

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an

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re in

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ole

or

in p

art

with

ou

t th

e e

xp

ress w

ritt

en

pe

rmis

sio

n o

f F

ree

sca

le.

ICA

P C

lassific

atio

n:

FC

P:

FIU

O:

PU

BI:

ma

rk

et

So

luti

on

s G

ro

up

SC

H-2

85

31

PD

F:

SP

F-2

85

31

A

MP

C5744P

-CO

NT

RO

LE

R B

OA

RD

A3

Th

urs

da

y,

Ju

ne

25

, 2

01

5

SB

C M

C3

39

08

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ZU

CZ

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P.

KO

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91

0

X_

__

__

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_

C2

03

0.1

UF

R9

92

.0K

J1

2 12

J2

1 1

R4

65

.1K

+C

9

33

0U

F

C3

50

.1U

FC

47

22

UF

R5

2

1.0

K

R6

91

.0D

NP

R4

55

.1K

J8

1 2 3 4

R5

9

1.0

K

J1

6 1

U1

MC

33

90

8A

E

NC

_2

22

2N

C_

23

23

VA

UX

_E

40

VA

UX

_B

39

RS

T2

4

SE

LE

CT

31

CS

28

MU

X_

OU

T1

7

MO

SI

26

DE

BU

G1

5

INT

29

SC

LK

27

MIS

O2

5

FS

01

4

CA

NL

9

GND_COM6

CA

N_

5V

7

CA

NH

8

VD

DIO

30

VS

EN

SE

3

VA

UX

38

BOOT_PRE46

VPRE37

GATE_LS44

BOOT_CORE36

VC

OR

E_

SN

S3

4

VC

CA

_E

41

VC

CA

43

IO_

01

2

IO_

11

3

IO_

21

8

IO_

31

9

IO_

41

0

IO_

51

1

NC

_5

5

VSUP11

VSUP22

VS

UP

34

RX

D2

1

TX

D2

0

AGND16

EP49

VSW148

VSW247

VSW_CORE35

COMP_CORE33

FB_CORE32

VC

CA

_B

42

DGND45

C3

43

00

pF

C2

01

uF

R6

0

1.0

K

D1

0

AC

C5

01

00

0P

F

Q2

MM

BT

39

04

LT

1G

23

1

R7

7

68

0

R9

01

8K

D6

AC

EB

C

Q2

00

BC

P5

2-1

6

1

324

C2

20

0.1

UF

C2

02

22

UF

C2

30

.1U

F

TP

7

C5

22

2U

F

TP

4

C4

64

70

0 P

FD

NP

R9

83

.3K

FL

1

70

0 O

HM

@1

00

MH

Z

1 234

R3

8

68

0

C2

43

00

pF

R2

3

1.0

K

C1

94

.7u

F

C4

20

.1U

F

C4

94

70

PF

R4

4

1.0

K

C1

54

.7u

F

R5

4

12

.0K

C4

52

2U

F

R8

5

5.1

K

L2

22

uH

12

R8

81

2.0

K

D1

2B

34

0A

AC

C5

30

.1U

F

EB

C

Q2

01

BC

P5

2-1

6

1

324

R9

22

.0K

R9

76

.2K

R9

4

68

0

L3

2.2

uH

12

C5

44

.7u

FC1

00

.1U

F

C4

32

2U

F

C4

44

70

PF

C3

82

2U

F

R7

8

10

.0K

C2

54

70

0 P

FD

NP

TP

11

R5

35

.1K

L1

1u

H1

2

C5

12

2U

F

TP

10

J6

CO

N_

1_

PW

R

DN

P

1 23

C1

84

.7u

F

D1

4

B3

40

A

AC

D1

1

HS

MG

-C1

70

AC

R9

56

.2K

TP

9

Q3

ND

T3

05

5

1

324

C2

22

22

UF

C2

80

.1U

F

D7

AC

J1

0 1

D5

MB

R2

30

LS

FT

1G

DN

P

AC

J1

4

12

Cathode

FB

AnodeD1

6

LM

40

41

1

2 3

D1

3 MBR230LSFT1G

AC

R4

75

.1K

BA

R1

Sh

ort

ing

Ba

r12

06

BA

R2

Sh

ort

ing

Ba

r12

06

C4

02

2P

F

D8

AC

J1

3 12

TP

13

J1

8 1

D9

AC

J9 1

R8

74

.7D

NP

C4

10

.1U

F

TP

3

R9

12

.0K

TP

8

TP

12

R9

65

10




5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

+5V

dc

GN

D_D

SE

NT

0_R

X0

SE

NT

0_R

X1

SE

NT

1_R

X0

SE

NT

1_R

X1

PC

0

PC

1

+3V

3dc

+5V

dc

GN

D

GN

D

GN

D

GN

D

GN

D

+5V

dc

GN

D

+5V

dc

GN

D

+3V

3dc

+3V

3dc

+3V

3dc

+3V

3dc

+3V

3dc

Dra

win

g T

itle

:

Siz

eD

ocum

ent N

um

ber

Rev

Date

:S

heet

of

Page T

itle

:

Desig

ner:

Dra

wn b

y:

Appro

ved:

Au

tom

oti

ve, In

du

str

ial &

Mu

lti-

6501 W

illia

m C

annon D

rive W

est

Austin, T

X 7

8735-8

598

This

docum

ent conta

ins info

rmation p

roprieta

ry to F

reescale

and s

hall

not be u

sed for

engin

eering d

esig

n,

pro

cure

ment or

manufa

ctu

re in w

hole

or

in p

art

without th

e e

xpre

ss w

ritten p

erm

issio

n o

f F

reescale

.

ICA

P C

lassific

ation:

FC

P:

FIU

O:

PU

BI:

market

So

luti

on

s G

ro

up

SC

H-2

8531 P

DF

: S

PF

-28531

A

MP

C5

74

4P

-CO

NT

RO

LE

R B

OA

RD

A3

Friday, M

ay 2

2, 2015

SE

NT

IN

ET

RF

AC

E

B. Z

UC

ZE

K

P. K

ON

VIC

NY

B. Z

UC

ZE

K

10

10

X____

____

Dra

win

g T

itle

:

Siz

eD

ocum

ent N

um

ber

Rev

Date

:S

heet

of

Page T

itle

:

Desig

ner:

Dra

wn b

y:

Appro

ved:

Au

tom

oti

ve, In

du

str

ial &

Mu

lti-

6501 W

illia

m C

annon D

rive W

est

Austin, T

X 7

8735-8

598

This

docum

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MPC5744PDMCBUMRev. 106/2012


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