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Modeling Read-Out for Solid-State Quantum Computers in Silicon Vincent Conrad Supervisors: C.Pakes & L. Hollenberg
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Modeling Read-Out for Solid-State Quantum Computers in Silicon

Jan 03, 2016

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Modeling Read-Out for Solid-State Quantum Computers in Silicon. Modeling Read-Out for Solid-State Quantum Computers in Silicon. Vincent Conrad Supervisors: C.Pakes & L. Hollenberg. Introduction. Solid-State Quantum Computers in Silicon. Single Electron Transistors. Modeling Read-Out. - PowerPoint PPT Presentation
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Page 1: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Modeling Read-Out for Solid-State Quantum Computers in Silicon

Vincent Conrad

Supervisors:C.Pakes & L. Hollenberg

Page 2: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Introduction

Solid-State Quantum Computers in Silicon

Modeling Read-Out

Results & Conclusion

Further Work

Single Electron Transistors

Page 3: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Hard QubitsScalable

Solid-State Quantum Computers in Silicon

Kane Quantum Computer

Buried Donor Charge Qubit Quantum Computer

Spin-Qubit

Charge-Qubit

Page 4: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Kane Quantum Computer

Page 5: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Kane Quantum Computer

spin-qubit

Page 6: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Buried Donor Charge-Qubit Quantum Computer

Charge-qubit

Page 7: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Single Electron Tunneling

Energy spacing must be greater then thermal smearing

Quantised energy levelsPotential Barriers

TkE B

{

Fermi Level of Source is lower then first unoccupied level of dot

Page 8: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Single Electron Tunneling Applying a potential shifts

the dot’s energy levels.Fermi energy of source now higher then dot’s 1st unoccupied energy level.

An electron can now occupy the dot.Coulomb blockade prevents others.

Page 9: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Single-Electron Transistor

Including a control gate allows us to manipulate

the island’s energy levels. source

drain

dot (island)

control

controlled single electron tunneling

S E T

Page 10: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Orthodox SET theoryThe only quantized energy levels occur in the island.

The time of electron tunneling through the barrier is assumed to be negligibly small.

Coherent quantum processes consisting of several simultaneous tunneling events("co-tunneling") are ignored.

C

eCn

C

eCn

C

qnF oe 1221

2

2

)(

Energy stored in a capacitorWork done by tunneling events

Page 11: Modeling Read-Out for Solid-State Quantum Computers in Silicon

SET Sensitivity

conductance

control gate voltage

electron motion

extremely sensitive to voltage variations on the island

Page 12: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Read-Out

Single electron’s motion between dopants.

Induced island charge.

Vary potential on the island (control gate).

Require induced charge > SET sensitivity.

drain

islandsource

electron

hole

Page 13: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Spin-Qubit Read-Out

Q = CV

)()( ihhiee VVCVVCq

Page 14: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Charge Qubit Read-Out

Q = CV

)()( ''ihhihh VVCVVCq

Page 15: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Results

N.B. For charge qubit q is difference between two points.

= 2.49x10-2 e q = 2.14x10-2 e q

Page 16: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Conclusions

26min /102.3 qet

Induced island charge >> SET Sensitivity

Need an answer before information lossElectron-spin relaxation time (spin-qubit)

Charge dissipation time (charge-qubit)

Time given by shot-noise limit Well inside estimated times for both information loss mechanisms

Both qubit types should produce measurable results using current technology made by the

SRCQCT

2 x 10-2 e >> 3.2 x 10-6 e

Page 17: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Further Work

Full type3 simulation ISE-TCAD input files prepared.

Accounts and ISE-TCAD setup at HPC.Beowulf in-house cluster under construction.

Estimate 100 000 node points required.

More complete architecture simulations.

Matching simulations to experiment.Convert type3 simulation to replicate macroscopic charge-qubit experiment.

Page 18: Modeling Read-Out for Solid-State Quantum Computers in Silicon
Page 19: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Type3 Device

electron and hole (spin-qubit)

A circuitry interlude:

holeelectron

Nano-circuits are pretty darn small.

Page 20: Modeling Read-Out for Solid-State Quantum Computers in Silicon

Integrated Systems Engineering – Technology Computer Aided Design

I S E – T C A D

Software package designed for microchip industry.

Orthodox approach to single-electron tunneling.

Extend ISE-TCAD to nanotech/mesoscopic devices.

MESH DESSIS PICASSOUser specifies mesh spacing to vary over regions of interest.

coarse

fine

)()( 2

0

rVr

VCjVAI

Poisson’s Equation

AC analysisGraphical user interface for visual analysis of simulations.