Memory Technologies EE 454 Embedded Architectures.

Memory TechnologiesMemory Technologies

EE 454 Embedded Architectures

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ROMROM

ROM – values in bits of words “programmed” at ROM – values in bits of words “programmed” at construction timeconstruction time

PROM – programmable ROM values in bits can be PROM – programmable ROM values in bits can be programmed by zapping components (e.g. diodes) programmed by zapping components (e.g. diodes) after construction with a high voltageafter construction with a high voltage

EPROM – electrically programmable ROMEPROM – electrically programmable ROM

EEPROM – Electrically erasable programmable ROMEEPROM – Electrically erasable programmable ROM

Flash memories – EEPROM in which erasing is done in Flash memories – EEPROM in which erasing is done in large blocks (blocks are erased in a flash) large blocks (blocks are erased in a flash)

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ROM structureROM structure

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Two-dimension DecodingTwo-dimension Decoding

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EPROMEPROM

• Programmed by an electronic device that supplies higher voltages than those normally used in digital circuits.

• Erased only by exposing it to strong ultraviolet light

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EPROM with floating gate EPROM with floating gate MOS transistorMOS transistor

Floating-gateFloating-gate Not connected Surrounded by high-

impedance material Program it

Put high-voltage on non-floating gate

Negative charge leaks to floating gate (hot carriers injection)

Change of threshold voltage

Guaranteed to retain 70% of charge for ten years (non-volatile!)

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EPROM packagesEPROM packages

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Static RAM CellStatic RAM CellRAM – Random Access MemoryRAM – Random Access Memory Sequential access devices??Sequential access devices?? ROMS are random access alsoROMS are random access also

Static RAM CellStatic RAM Cell D flip-flop with control logic fig 9-20D flip-flop with control logic fig 9-20

SEL_L=0, WR_L=1 Read

SEL_L=0 & WR_L=0 Write

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8x4 static RAM8x4 static RAM

NotesNotes

SRAM – SRAM – static RAMstatic RAM

3 addr lines 3 addr lines ___ words___ words

__ bits per word__ bits per word

WE_LWE_L

CS_LCS_L

OE_LOE_L

DINDIN33 - -

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Static RAM timing - READStatic RAM timing - READ

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Static RAM timing - WRITEStatic RAM timing - WRITE

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Bidirectional BusBidirectional Bus

Bidirectional bus – read and write on same linesBidirectional bus – read and write on same lines

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Synchronous Static RAM - SSRAMSynchronous Static RAM - SSRAM

Clocked interface for Clocked interface for control, address, and control, address, and datadata

Synchronized with Synchronized with clock signal on busclock signal on bus

Latches save addr, Latches save addr, control, data lines control, data lines on rising edgeon rising edge AREG, CREG, INREG

Operation performed Operation performed during subsequent during subsequent cyclecycle

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Timing of SSRAMTiming of SSRAM

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Dynamic RAMDynamic RAM

Static RAM CellStatic RAM Cell

D flip-flop + control D flip-flop + control = 6 transitors= 6 transitors

Dynamic RAMDynamic RAM

1 transistor1 transistor

1 capacitor1 capacitor

OperationOperation

ReadingReading

WritingWriting

Capacitor leaks Capacitor leaks refreshing requiredrefreshing required

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Synchronous DRAM StructureSynchronous DRAM Structure

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RefreshingRefreshing

Charge stored in the Charge stored in the capacitor leaks outcapacitor leaks out

Needs to be refreshedNeeds to be refreshed

Refresh Cycle ~ 64 Refresh Cycle ~ 64 millisecondsmilliseconds

Refresh an entire row at a Refresh an entire row at a timetime

E.g. newer RAMs haveE.g. newer RAMs have 4096 rows Refreshed once every 64

ms 64ms/4096 = one row every

15.6 μs

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Varieties of RAMSVarieties of RAMS

Static – fastest most expensive used for cachesStatic – fastest most expensive used for caches

Dynamic RAMDynamic RAM

SDRAM – synchronous DRAM (clock from bus/CPU)SDRAM – synchronous DRAM (clock from bus/CPU)

DDR SDRAMs - Double data rate – transfers data on DDR SDRAMs - Double data rate – transfers data on both edges of the clockboth edges of the clock

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Embedded Systems Memory Types

(http://www.netrino.com/Embedded-Systems/How-To/Memory-Types-RAM-ROM-Flash)

SRAM or DRAM? EEPROM or flash? What types of memory will you use in your next embedded systems design?

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• As memory technology has matured in recent years, the line between RAM and ROM has blurred.

• Referred to as hybrid memory devices. Read and written as desired, like RAM, but Maintain their contents without electrical power, just like

ROM.

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• Two of the hybrid devices, EEPROM and flash, are descendants of ROM devices. These are typically used to store code.

• The third hybrid, NVRAM, is a modified version of SRAM. NVRAM usually holds persistent data.

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EEPROMsEEPROMs

• electrically-erasable-and-programmable ROMs.

• Similar to EPROMs, but the erase operation is accomplished electrically, rather than by exposure to ultraviolet light.

• Any byte within an EEPROM may be erased and rewritten. Once written, the new data will remain in the device forever--or at least until it is electrically erased.

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Flash memoryFlash memory

• Combines the best features of the memory devices described thus far.

• High density, low cost, nonvolatile, fast (to read, but not to write), and electrically reprogrammable.

• The use of flash memory has increased dramatically in embedded systems.

• Very similar to EEPROM. The major difference is that flash devices can only be erased one sector (256 bytes to 16KB)

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NOR Flash memories(http://en.wikipedia.org/wiki/Flash_memory)

NOR Flash memories(http://en.wikipedia.org/wiki/Flash_memory)

• Reading from NOR flash is similar to reading from random-access memory, can be executed directly without the need to first copy the

program into RAM. NOR flash may be programmed in a random-access manner similar to reading.

• Programming changes bits from a logical one to a zero.

• Reset all the bits in the erased block back to one. Typical block sizes are 64, 128, or 256 KB.

• For sequential data writes, NOR flash chips typically have slow write speeds compared with NAND flash.

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NAND flash NAND flash

• NAND flash architecture was introduced by Toshiba in 1989.

• The reduction in ground wires and bit lines allows a denser layout and greater storage capacity per chip.

• Forms the core of the removable USB storage devices

• These memories are accessed much like block devices such as hard disks or memory cards.

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NAND flashNAND flash

• While reading and programming is performed on a page basis, erasure can only be performed on a block basis.

• Data in a block can only be written sequentially.

• NAND is best suited to systems requiring high capacity data storage. This type of flash architecture offers higher densities and larger capacities at lower cost with faster erase, sequential write, and sequential read speeds, sacrificing the random-access and execute in place advantage of the NOR architecture.

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NVRAM (non-volatile RAM)NVRAM (non-volatile RAM)

• Usually just an SRAM with a battery backup.

• When the power is turned on, the NVRAM operates just like any other SRAM.

• When the power is turned off, the NVRAM draws just enough power from the battery to retain its data.

• NVRAM is fairly common in embedded systems. However, it is expensive--even more expensive than SRAM, because of the battery—

• applications are typically limited to the storage of a few hundred bytes of system-critical information that can't be stored in any better way.

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Characteristics of the various memory types Characteristics of the various memory types

Type Volatile?

Writeable? Erase Size

Max EraseCycles

Cost (per Byte) Speed

SRAM Yes Yes Byte Unlimited Expensive Fast

DRAM Yes Yes Byte Unlimited Moderate Moderate

Masked ROM

No No n/a n/a Inexpensive Fast

PROM No Once, with a device programmer

n/a n/a Moderate Fast

EPROM No Yes, with a device programmer

Entire Chip

Limited (consult datasheet)

Moderate Fast

EEPROM No Yes Byte Limited (consult datasheet)

Expensive Fast to read, slow to erase/write

Flash No Yes Sector Limited (consult datasheet)

Moderate Fast to read, slow to erase/write

NVRAM No Yes Byte Unlimited Expensive (SRAM + battery)